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Searched refs:REG_RMW_FIELD (Results 1 – 16 of 16) sorted by relevance

/linux-4.1.27/drivers/net/wireless/ath/ath9k/
Dar9003_paprd.c60 REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0, in ar9003_paprd_enable()
63 REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B1, in ar9003_paprd_enable()
66 REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B2, in ar9003_paprd_enable()
173 REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2AM, AR_PHY_PAPRD_AM2AM_MASK, in ar9003_paprd_setup_single_table()
175 REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2PM, AR_PHY_PAPRD_AM2PM_MASK, in ar9003_paprd_setup_single_table()
177 REG_RMW_FIELD(ah, AR_PHY_PAPRD_HT40, AR_PHY_PAPRD_HT40_MASK, in ar9003_paprd_setup_single_table()
184 REG_RMW_FIELD(ah, ctrl0[i], in ar9003_paprd_setup_single_table()
186 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
188 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
190 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
[all …]
Dar9003_phy.c226 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_SYNTH4, in ar9003_hw_set_channel()
316 REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_spur_mitigate_mrc_cck()
318 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
320 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
323 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
326 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
334 REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_spur_mitigate_mrc_cck()
336 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
338 REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT, in ar9003_hw_spur_mitigate_mrc_cck()
345 REG_RMW_FIELD(ah, AR_PHY_TIMING4, in ar9003_hw_spur_ofdm_clear()
[all …]
Dar9002_calib.c54 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0), in ar9002_hw_setup_calibration()
244 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i), in ar9002_hw_iqcalibrate()
247 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i), in ar9002_hw_iqcalibrate()
391 REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11, in ar9287_hw_olc_temp_compensation()
393 REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11, in ar9287_hw_olc_temp_compensation()
421 REG_RMW_FIELD(ah, in ar9280_hw_olc_temp_compensation()
471 REG_RMW_FIELD(ah, AR9285_AN_RF2G8, AR9285_AN_RF2G8_PADRVGN2TAB0, 7); in ar9271_hw_pa_cal()
476 REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0); in ar9271_hw_pa_cal()
478 REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff); in ar9271_hw_pa_cal()
487 REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0); in ar9271_hw_pa_cal()
[all …]
Dar9003_rtt.c50 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL, in ar9003_hw_rtt_set_mask()
61 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL, in ar9003_hw_rtt_force_restore()
215 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(0), in ar9003_hw_rtt_restore()
218 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(1), in ar9003_hw_rtt_restore()
222 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(0), in ar9003_hw_rtt_restore()
225 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(1), in ar9003_hw_rtt_restore()
229 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(1), in ar9003_hw_rtt_restore()
231 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(0), in ar9003_hw_rtt_restore()
Dar9003_calib.c50 REG_RMW_FIELD(ah, AR_PHY_TIMING4, in ar9003_hw_setup_calibration()
279 REG_RMW_FIELD(ah, offset_array[i], in ar9003_hw_iqcalibrate()
282 REG_RMW_FIELD(ah, offset_array[i], in ar9003_hw_iqcalibrate()
950 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_outlier_detection()
954 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_outlier_detection()
966 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3, in ar9003_hw_tx_iq_cal_outlier_detection()
968 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0, in ar9003_hw_tx_iq_cal_outlier_detection()
989 REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN, in ar9003_hw_tx_iq_cal_run()
992 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START, in ar9003_hw_tx_iq_cal_run()
1103 REG_RMW_FIELD(ah, in ar9003_hw_tx_iq_cal_post_proc()
[all …]
Dar9003_mci.c26 REG_RMW_FIELD(ah, AR_MCI_COMMAND2, in ar9003_mci_reset_req_wakeup()
29 REG_RMW_FIELD(ah, AR_MCI_COMMAND2, in ar9003_mci_reset_req_wakeup()
450 REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL, AR_GLB_DS_JTAG_DISABLE, 1); in ar9003_mci_observation_set_up()
451 REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL, AR_GLB_WLAN_UART_INTF_EN, 0); in ar9003_mci_observation_set_up()
454 REG_RMW_FIELD(ah, AR_BTCOEX_CTRL2, AR_BTCOEX_CTRL2_GPIO_OBS_SEL, 0); in ar9003_mci_observation_set_up()
455 REG_RMW_FIELD(ah, AR_BTCOEX_CTRL2, AR_BTCOEX_CTRL2_MAC_BB_OBS_SEL, 1); in ar9003_mci_observation_set_up()
457 REG_RMW_FIELD(ah, AR_DIAG_SW, AR_DIAG_OBS_PT_SEL1, 0x03); in ar9003_mci_observation_set_up()
458 REG_RMW_FIELD(ah, AR_DIAG_SW, AR_DIAG_OBS_PT_SEL2, 0x01); in ar9003_mci_observation_set_up()
459 REG_RMW_FIELD(ah, AR_MACMISC, AR_MACMISC_MISC_OBS_BUS_LSB, 0x02); in ar9003_mci_observation_set_up()
460 REG_RMW_FIELD(ah, AR_MACMISC, AR_MACMISC_MISC_OBS_BUS_MSB, 0x03); in ar9003_mci_observation_set_up()
[all …]
Deeprom_def.c64 REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_0, in ath9k_olc_get_pdadcs()
66 REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_1, in ath9k_olc_get_pdadcs()
69 REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL7, in ath9k_olc_get_pdadcs()
474 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
477 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
480 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
483 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
497 REG_RMW_FIELD(ah, in ath9k_hw_def_set_gain()
500 REG_RMW_FIELD(ah, in ath9k_hw_def_set_gain()
599 REG_RMW_FIELD(ah, AR_PHY_XPA_CFG, AR_PHY_FORCE_XPA_CFG, in ath9k_hw_def_set_board_values()
[all …]
Deeprom_4k.c393 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, in ath9k_hw_set_4k_power_cal_table()
395 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1, in ath9k_hw_set_4k_power_cal_table()
397 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2, in ath9k_hw_set_4k_power_cal_table()
399 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0); in ath9k_hw_set_4k_power_cal_table()
788 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
790 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
792 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
795 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ath9k_hw_4k_set_gain()
799 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
802 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ath9k_hw_4k_set_gain()
[all …]
Dar5008_phy.c758 REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_ADC_ON, 0xa); in ar5008_hw_process_ini()
847 REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5008_hw_set_delta_slope()
849 REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5008_hw_set_delta_slope()
857 REG_RMW_FIELD(ah, AR_PHY_HALFGI, in ar5008_hw_set_delta_slope()
859 REG_RMW_FIELD(ah, AR_PHY_HALFGI, in ar5008_hw_set_delta_slope()
973 REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5008_hw_ani_control_new()
976 REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5008_hw_ani_control_new()
979 REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5008_hw_ani_control_new()
981 REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5008_hw_ani_control_new()
983 REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5008_hw_ani_control_new()
[all …]
Dar9003_eeprom.c3540 REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias); in ar9003_hw_xpa_bias_level_apply()
3542 REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias); in ar9003_hw_xpa_bias_level_apply()
3544 REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias); in ar9003_hw_xpa_bias_level_apply()
3545 REG_RMW_FIELD(ah, AR_CH0_THERM, in ar9003_hw_xpa_bias_level_apply()
3548 REG_RMW_FIELD(ah, AR_CH0_THERM, in ar9003_hw_xpa_bias_level_apply()
3600 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM, in ar9003_hw_ant_ctrl_apply()
3603 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM, in ar9003_hw_ant_ctrl_apply()
3606 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM, in ar9003_hw_ant_ctrl_apply()
3625 REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL, in ar9003_hw_ant_ctrl_apply()
3636 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL, value); in ar9003_hw_ant_ctrl_apply()
[all …]
Deeprom_9287.c456 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, in ath9k_hw_set_ar9287_power_cal_table()
458 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1, in ath9k_hw_set_ar9287_power_cal_table()
460 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2, in ath9k_hw_set_ar9287_power_cal_table()
462 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, in ath9k_hw_set_ar9287_power_cal_table()
937 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_ar9287_set_board_values()
940 REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_ar9287_set_board_values()
943 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ath9k_hw_ar9287_set_board_values()
946 REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ath9k_hw_ar9287_set_board_values()
953 REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ath9k_hw_ar9287_set_board_values()
956 REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ath9k_hw_ar9287_set_board_values()
[all …]
Dbtcoex.c140 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ath9k_hw_btcoex_init_2wire()
160 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ath9k_hw_btcoex_init_3wire()
164 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ath9k_hw_btcoex_init_3wire()
292 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); in ath9k_hw_btcoex_enable_3wire()
293 REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0); in ath9k_hw_btcoex_enable_3wire()
308 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); in ath9k_hw_btcoex_enable_mci()
Dhw.c757 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
759 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
761 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
764 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL1, in ath9k_hw_init_pll()
766 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL1, in ath9k_hw_init_pll()
768 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL1, in ath9k_hw_init_pll()
771 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
773 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
775 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2, in ath9k_hw_init_pll()
779 REG_RMW_FIELD(ah, AR_CH0_BB_DPLL3, in ath9k_hw_init_pll()
[all …]
Dar9002_phy.c654 REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN, in ar9002_hw_spectral_scan_config()
656 REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN, in ar9002_hw_spectral_scan_config()
658 REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN, in ar9002_hw_spectral_scan_config()
Dar9003_wow.c382 REG_RMW_FIELD(ah, AR_RSSI_THR, AR_RSSI_THR_BM_THR, in ath9k_hw_wow_enable()
Dhw.h123 #define REG_RMW_FIELD(_a, _r, _f, _v) \ macro