Searched refs:RA (Results 1 - 126 of 126) sorted by relevance

/linux-4.1.27/arch/x86/crypto/
H A Dserpent-sse2-i586-asm_32.S42 #define RA %xmm0 define
528 read_blocks(%eax, RA, RB, RC, RD, RT0, RT1, RE);
530 K(RA, RB, RC, RD, RE, 0);
531 S0(RA, RB, RC, RD, RE); LK(RC, RB, RD, RA, RE, 1);
532 S1(RC, RB, RD, RA, RE); LK(RE, RD, RA, RC, RB, 2);
533 S2(RE, RD, RA, RC, RB); LK(RB, RD, RE, RC, RA, 3);
534 S3(RB, RD, RE, RC, RA); LK(RC, RA, RD, RB, RE, 4);
535 S4(RC, RA, RD, RB, RE); LK(RA, RD, RB, RE, RC, 5);
536 S5(RA, RD, RB, RE, RC); LK(RC, RA, RD, RE, RB, 6);
537 S6(RC, RA, RD, RE, RB); LK(RD, RB, RA, RE, RC, 7);
538 S7(RD, RB, RA, RE, RC); LK(RC, RA, RE, RD, RB, 8);
539 S0(RC, RA, RE, RD, RB); LK(RE, RA, RD, RC, RB, 9);
540 S1(RE, RA, RD, RC, RB); LK(RB, RD, RC, RE, RA, 10);
541 S2(RB, RD, RC, RE, RA); LK(RA, RD, RB, RE, RC, 11);
542 S3(RA, RD, RB, RE, RC); LK(RE, RC, RD, RA, RB, 12);
543 S4(RE, RC, RD, RA, RB); LK(RC, RD, RA, RB, RE, 13);
544 S5(RC, RD, RA, RB, RE); LK(RE, RC, RD, RB, RA, 14);
545 S6(RE, RC, RD, RB, RA); LK(RD, RA, RC, RB, RE, 15);
546 S7(RD, RA, RC, RB, RE); LK(RE, RC, RB, RD, RA, 16);
547 S0(RE, RC, RB, RD, RA); LK(RB, RC, RD, RE, RA, 17);
548 S1(RB, RC, RD, RE, RA); LK(RA, RD, RE, RB, RC, 18);
549 S2(RA, RD, RE, RB, RC); LK(RC, RD, RA, RB, RE, 19);
550 S3(RC, RD, RA, RB, RE); LK(RB, RE, RD, RC, RA, 20);
551 S4(RB, RE, RD, RC, RA); LK(RE, RD, RC, RA, RB, 21);
552 S5(RE, RD, RC, RA, RB); LK(RB, RE, RD, RA, RC, 22);
553 S6(RB, RE, RD, RA, RC); LK(RD, RC, RE, RA, RB, 23);
554 S7(RD, RC, RE, RA, RB); LK(RB, RE, RA, RD, RC, 24);
555 S0(RB, RE, RA, RD, RC); LK(RA, RE, RD, RB, RC, 25);
556 S1(RA, RE, RD, RB, RC); LK(RC, RD, RB, RA, RE, 26);
557 S2(RC, RD, RB, RA, RE); LK(RE, RD, RC, RA, RB, 27);
558 S3(RE, RD, RC, RA, RB); LK(RA, RB, RD, RE, RC, 28);
559 S4(RA, RB, RD, RE, RC); LK(RB, RD, RE, RC, RA, 29);
560 S5(RB, RD, RE, RC, RA); LK(RA, RB, RD, RC, RE, 30);
561 S6(RA, RB, RD, RC, RE); LK(RD, RE, RB, RC, RA, 31);
562 S7(RD, RE, RB, RC, RA); K(RA, RB, RC, RD, RE, 32);
569 write_blocks(%eax, RA, RB, RC, RD, RT0, RT1, RE);
574 xor_blocks(%eax, RA, RB, RC, RD, RT0, RT1, RE);
591 read_blocks(%eax, RA, RB, RC, RD, RT0, RT1, RE);
593 K(RA, RB, RC, RD, RE, 32);
594 SI7(RA, RB, RC, RD, RE); KL(RB, RD, RA, RE, RC, 31);
595 SI6(RB, RD, RA, RE, RC); KL(RA, RC, RE, RB, RD, 30);
596 SI5(RA, RC, RE, RB, RD); KL(RC, RD, RA, RE, RB, 29);
597 SI4(RC, RD, RA, RE, RB); KL(RC, RA, RB, RE, RD, 28);
598 SI3(RC, RA, RB, RE, RD); KL(RB, RC, RD, RE, RA, 27);
599 SI2(RB, RC, RD, RE, RA); KL(RC, RA, RE, RD, RB, 26);
600 SI1(RC, RA, RE, RD, RB); KL(RB, RA, RE, RD, RC, 25);
601 SI0(RB, RA, RE, RD, RC); KL(RE, RC, RA, RB, RD, 24);
602 SI7(RE, RC, RA, RB, RD); KL(RC, RB, RE, RD, RA, 23);
603 SI6(RC, RB, RE, RD, RA); KL(RE, RA, RD, RC, RB, 22);
604 SI5(RE, RA, RD, RC, RB); KL(RA, RB, RE, RD, RC, 21);
605 SI4(RA, RB, RE, RD, RC); KL(RA, RE, RC, RD, RB, 20);
606 SI3(RA, RE, RC, RD, RB); KL(RC, RA, RB, RD, RE, 19);
607 SI2(RC, RA, RB, RD, RE); KL(RA, RE, RD, RB, RC, 18);
608 SI1(RA, RE, RD, RB, RC); KL(RC, RE, RD, RB, RA, 17);
609 SI0(RC, RE, RD, RB, RA); KL(RD, RA, RE, RC, RB, 16);
610 SI7(RD, RA, RE, RC, RB); KL(RA, RC, RD, RB, RE, 15);
611 SI6(RA, RC, RD, RB, RE); KL(RD, RE, RB, RA, RC, 14);
612 SI5(RD, RE, RB, RA, RC); KL(RE, RC, RD, RB, RA, 13);
613 SI4(RE, RC, RD, RB, RA); KL(RE, RD, RA, RB, RC, 12);
614 SI3(RE, RD, RA, RB, RC); KL(RA, RE, RC, RB, RD, 11);
615 SI2(RA, RE, RC, RB, RD); KL(RE, RD, RB, RC, RA, 10);
616 SI1(RE, RD, RB, RC, RA); KL(RA, RD, RB, RC, RE, 9);
617 SI0(RA, RD, RB, RC, RE); KL(RB, RE, RD, RA, RC, 8);
618 SI7(RB, RE, RD, RA, RC); KL(RE, RA, RB, RC, RD, 7);
619 SI6(RE, RA, RB, RC, RD); KL(RB, RD, RC, RE, RA, 6);
620 SI5(RB, RD, RC, RE, RA); KL(RD, RA, RB, RC, RE, 5);
621 SI4(RD, RA, RB, RC, RE); KL(RD, RB, RE, RC, RA, 4);
622 SI3(RD, RB, RE, RC, RA); KL(RE, RD, RA, RC, RB, 3);
623 SI2(RE, RD, RA, RC, RB); KL(RD, RB, RC, RA, RE, 2);
624 SI1(RD, RB, RC, RA, RE); KL(RE, RB, RC, RA, RD, 1);
625 SI0(RE, RB, RC, RA, RD); K(RC, RD, RB, RE, RA, 0);
628 write_blocks(%eax, RC, RD, RB, RE, RT0, RT1, RA);
H A Dserpent-avx-x86_64-asm_64.S584 K2(RA, RB, RC, RD, RE, 0);
585 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
586 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
587 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
588 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
589 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
590 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
591 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
592 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
593 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
594 S(S1, RE, RA, RD, RC, RB); LK2(RB, RD, RC, RE, RA, 10);
595 S(S2, RB, RD, RC, RE, RA); LK2(RA, RD, RB, RE, RC, 11);
596 S(S3, RA, RD, RB, RE, RC); LK2(RE, RC, RD, RA, RB, 12);
597 S(S4, RE, RC, RD, RA, RB); LK2(RC, RD, RA, RB, RE, 13);
598 S(S5, RC, RD, RA, RB, RE); LK2(RE, RC, RD, RB, RA, 14);
599 S(S6, RE, RC, RD, RB, RA); LK2(RD, RA, RC, RB, RE, 15);
600 S(S7, RD, RA, RC, RB, RE); LK2(RE, RC, RB, RD, RA, 16);
601 S(S0, RE, RC, RB, RD, RA); LK2(RB, RC, RD, RE, RA, 17);
602 S(S1, RB, RC, RD, RE, RA); LK2(RA, RD, RE, RB, RC, 18);
603 S(S2, RA, RD, RE, RB, RC); LK2(RC, RD, RA, RB, RE, 19);
604 S(S3, RC, RD, RA, RB, RE); LK2(RB, RE, RD, RC, RA, 20);
605 S(S4, RB, RE, RD, RC, RA); LK2(RE, RD, RC, RA, RB, 21);
606 S(S5, RE, RD, RC, RA, RB); LK2(RB, RE, RD, RA, RC, 22);
607 S(S6, RB, RE, RD, RA, RC); LK2(RD, RC, RE, RA, RB, 23);
608 S(S7, RD, RC, RE, RA, RB); LK2(RB, RE, RA, RD, RC, 24);
609 S(S0, RB, RE, RA, RD, RC); LK2(RA, RE, RD, RB, RC, 25);
610 S(S1, RA, RE, RD, RB, RC); LK2(RC, RD, RB, RA, RE, 26);
611 S(S2, RC, RD, RB, RA, RE); LK2(RE, RD, RC, RA, RB, 27);
612 S(S3, RE, RD, RC, RA, RB); LK2(RA, RB, RD, RE, RC, 28);
613 S(S4, RA, RB, RD, RE, RC); LK2(RB, RD, RE, RC, RA, 29);
614 S(S5, RB, RD, RE, RC, RA); LK2(RA, RB, RD, RC, RE, 30);
615 S(S6, RA, RB, RD, RC, RE); LK2(RD, RE, RB, RC, RA, 31);
616 S(S7, RD, RE, RB, RC, RA); K2(RA, RB, RC, RD, RE, 32);
638 K2(RA, RB, RC, RD, RE, 32);
639 SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);
640 SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);
641 SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);
642 SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);
643 SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);
644 SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);
645 SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);
646 SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);
647 SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);
648 SP(SI6, RC, RB, RE, RD, RA, 22); KL2(RE, RA, RD, RC, RB, 22);
649 SP(SI5, RE, RA, RD, RC, RB, 21); KL2(RA, RB, RE, RD, RC, 21);
650 SP(SI4, RA, RB, RE, RD, RC, 20); KL2(RA, RE, RC, RD, RB, 20);
651 SP(SI3, RA, RE, RC, RD, RB, 19); KL2(RC, RA, RB, RD, RE, 19);
652 SP(SI2, RC, RA, RB, RD, RE, 18); KL2(RA, RE, RD, RB, RC, 18);
653 SP(SI1, RA, RE, RD, RB, RC, 17); KL2(RC, RE, RD, RB, RA, 17);
654 SP(SI0, RC, RE, RD, RB, RA, 16); KL2(RD, RA, RE, RC, RB, 16);
655 SP(SI7, RD, RA, RE, RC, RB, 15); KL2(RA, RC, RD, RB, RE, 15);
656 SP(SI6, RA, RC, RD, RB, RE, 14); KL2(RD, RE, RB, RA, RC, 14);
657 SP(SI5, RD, RE, RB, RA, RC, 13); KL2(RE, RC, RD, RB, RA, 13);
658 SP(SI4, RE, RC, RD, RB, RA, 12); KL2(RE, RD, RA, RB, RC, 12);
659 SP(SI3, RE, RD, RA, RB, RC, 11); KL2(RA, RE, RC, RB, RD, 11);
660 SP(SI2, RA, RE, RC, RB, RD, 10); KL2(RE, RD, RB, RC, RA, 10);
661 SP(SI1, RE, RD, RB, RC, RA, 9); KL2(RA, RD, RB, RC, RE, 9);
662 SP(SI0, RA, RD, RB, RC, RE, 8); KL2(RB, RE, RD, RA, RC, 8);
663 SP(SI7, RB, RE, RD, RA, RC, 7); KL2(RE, RA, RB, RC, RD, 7);
664 SP(SI6, RE, RA, RB, RC, RD, 6); KL2(RB, RD, RC, RE, RA, 6);
665 SP(SI5, RB, RD, RC, RE, RA, 5); KL2(RD, RA, RB, RC, RE, 5);
666 SP(SI4, RD, RA, RB, RC, RE, 4); KL2(RD, RB, RE, RC, RA, 4);
667 SP(SI3, RD, RB, RE, RC, RA, 3); KL2(RE, RD, RA, RC, RB, 3);
668 SP(SI2, RE, RD, RA, RC, RB, 2); KL2(RD, RB, RC, RA, RE, 2);
669 SP(SI1, RD, RB, RC, RA, RE, 1); KL2(RE, RB, RC, RA, RD, 1);
670 S(SI0, RE, RB, RC, RA, RD); K2(RC, RD, RB, RE, RA, 0);
H A Dserpent-avx2-asm_64.S576 K2(RA, RB, RC, RD, RE, 0);
577 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
578 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
579 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
580 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
581 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
582 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
583 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
584 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
585 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
586 S(S1, RE, RA, RD, RC, RB); LK2(RB, RD, RC, RE, RA, 10);
587 S(S2, RB, RD, RC, RE, RA); LK2(RA, RD, RB, RE, RC, 11);
588 S(S3, RA, RD, RB, RE, RC); LK2(RE, RC, RD, RA, RB, 12);
589 S(S4, RE, RC, RD, RA, RB); LK2(RC, RD, RA, RB, RE, 13);
590 S(S5, RC, RD, RA, RB, RE); LK2(RE, RC, RD, RB, RA, 14);
591 S(S6, RE, RC, RD, RB, RA); LK2(RD, RA, RC, RB, RE, 15);
592 S(S7, RD, RA, RC, RB, RE); LK2(RE, RC, RB, RD, RA, 16);
593 S(S0, RE, RC, RB, RD, RA); LK2(RB, RC, RD, RE, RA, 17);
594 S(S1, RB, RC, RD, RE, RA); LK2(RA, RD, RE, RB, RC, 18);
595 S(S2, RA, RD, RE, RB, RC); LK2(RC, RD, RA, RB, RE, 19);
596 S(S3, RC, RD, RA, RB, RE); LK2(RB, RE, RD, RC, RA, 20);
597 S(S4, RB, RE, RD, RC, RA); LK2(RE, RD, RC, RA, RB, 21);
598 S(S5, RE, RD, RC, RA, RB); LK2(RB, RE, RD, RA, RC, 22);
599 S(S6, RB, RE, RD, RA, RC); LK2(RD, RC, RE, RA, RB, 23);
600 S(S7, RD, RC, RE, RA, RB); LK2(RB, RE, RA, RD, RC, 24);
601 S(S0, RB, RE, RA, RD, RC); LK2(RA, RE, RD, RB, RC, 25);
602 S(S1, RA, RE, RD, RB, RC); LK2(RC, RD, RB, RA, RE, 26);
603 S(S2, RC, RD, RB, RA, RE); LK2(RE, RD, RC, RA, RB, 27);
604 S(S3, RE, RD, RC, RA, RB); LK2(RA, RB, RD, RE, RC, 28);
605 S(S4, RA, RB, RD, RE, RC); LK2(RB, RD, RE, RC, RA, 29);
606 S(S5, RB, RD, RE, RC, RA); LK2(RA, RB, RD, RC, RE, 30);
607 S(S6, RA, RB, RD, RC, RE); LK2(RD, RE, RB, RC, RA, 31);
608 S(S7, RD, RE, RB, RC, RA); K2(RA, RB, RC, RD, RE, 32);
630 K2(RA, RB, RC, RD, RE, 32);
631 SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);
632 SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);
633 SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);
634 SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);
635 SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);
636 SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);
637 SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);
638 SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);
639 SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);
640 SP(SI6, RC, RB, RE, RD, RA, 22); KL2(RE, RA, RD, RC, RB, 22);
641 SP(SI5, RE, RA, RD, RC, RB, 21); KL2(RA, RB, RE, RD, RC, 21);
642 SP(SI4, RA, RB, RE, RD, RC, 20); KL2(RA, RE, RC, RD, RB, 20);
643 SP(SI3, RA, RE, RC, RD, RB, 19); KL2(RC, RA, RB, RD, RE, 19);
644 SP(SI2, RC, RA, RB, RD, RE, 18); KL2(RA, RE, RD, RB, RC, 18);
645 SP(SI1, RA, RE, RD, RB, RC, 17); KL2(RC, RE, RD, RB, RA, 17);
646 SP(SI0, RC, RE, RD, RB, RA, 16); KL2(RD, RA, RE, RC, RB, 16);
647 SP(SI7, RD, RA, RE, RC, RB, 15); KL2(RA, RC, RD, RB, RE, 15);
648 SP(SI6, RA, RC, RD, RB, RE, 14); KL2(RD, RE, RB, RA, RC, 14);
649 SP(SI5, RD, RE, RB, RA, RC, 13); KL2(RE, RC, RD, RB, RA, 13);
650 SP(SI4, RE, RC, RD, RB, RA, 12); KL2(RE, RD, RA, RB, RC, 12);
651 SP(SI3, RE, RD, RA, RB, RC, 11); KL2(RA, RE, RC, RB, RD, 11);
652 SP(SI2, RA, RE, RC, RB, RD, 10); KL2(RE, RD, RB, RC, RA, 10);
653 SP(SI1, RE, RD, RB, RC, RA, 9); KL2(RA, RD, RB, RC, RE, 9);
654 SP(SI0, RA, RD, RB, RC, RE, 8); KL2(RB, RE, RD, RA, RC, 8);
655 SP(SI7, RB, RE, RD, RA, RC, 7); KL2(RE, RA, RB, RC, RD, 7);
656 SP(SI6, RE, RA, RB, RC, RD, 6); KL2(RB, RD, RC, RE, RA, 6);
657 SP(SI5, RB, RD, RC, RE, RA, 5); KL2(RD, RA, RB, RC, RE, 5);
658 SP(SI4, RD, RA, RB, RC, RE, 4); KL2(RD, RB, RE, RC, RA, 4);
659 SP(SI3, RD, RB, RE, RC, RA, 3); KL2(RE, RD, RA, RC, RB, 3);
660 SP(SI2, RE, RD, RA, RC, RB, 2); KL2(RD, RB, RC, RA, RE, 2);
661 SP(SI1, RD, RB, RC, RA, RE, 1); KL2(RE, RB, RC, RA, RD, 1);
662 S(SI0, RE, RB, RC, RA, RD); K2(RC, RD, RB, RE, RA, 0);
H A Dserpent-sse2-x86_64-asm_64.S651 K2(RA, RB, RC, RD, RE, 0);
652 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
653 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
654 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
655 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
656 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
657 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
658 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
659 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
660 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
661 S(S1, RE, RA, RD, RC, RB); LK2(RB, RD, RC, RE, RA, 10);
662 S(S2, RB, RD, RC, RE, RA); LK2(RA, RD, RB, RE, RC, 11);
663 S(S3, RA, RD, RB, RE, RC); LK2(RE, RC, RD, RA, RB, 12);
664 S(S4, RE, RC, RD, RA, RB); LK2(RC, RD, RA, RB, RE, 13);
665 S(S5, RC, RD, RA, RB, RE); LK2(RE, RC, RD, RB, RA, 14);
666 S(S6, RE, RC, RD, RB, RA); LK2(RD, RA, RC, RB, RE, 15);
667 S(S7, RD, RA, RC, RB, RE); LK2(RE, RC, RB, RD, RA, 16);
668 S(S0, RE, RC, RB, RD, RA); LK2(RB, RC, RD, RE, RA, 17);
669 S(S1, RB, RC, RD, RE, RA); LK2(RA, RD, RE, RB, RC, 18);
670 S(S2, RA, RD, RE, RB, RC); LK2(RC, RD, RA, RB, RE, 19);
671 S(S3, RC, RD, RA, RB, RE); LK2(RB, RE, RD, RC, RA, 20);
672 S(S4, RB, RE, RD, RC, RA); LK2(RE, RD, RC, RA, RB, 21);
673 S(S5, RE, RD, RC, RA, RB); LK2(RB, RE, RD, RA, RC, 22);
674 S(S6, RB, RE, RD, RA, RC); LK2(RD, RC, RE, RA, RB, 23);
675 S(S7, RD, RC, RE, RA, RB); LK2(RB, RE, RA, RD, RC, 24);
676 S(S0, RB, RE, RA, RD, RC); LK2(RA, RE, RD, RB, RC, 25);
677 S(S1, RA, RE, RD, RB, RC); LK2(RC, RD, RB, RA, RE, 26);
678 S(S2, RC, RD, RB, RA, RE); LK2(RE, RD, RC, RA, RB, 27);
679 S(S3, RE, RD, RC, RA, RB); LK2(RA, RB, RD, RE, RC, 28);
680 S(S4, RA, RB, RD, RE, RC); LK2(RB, RD, RE, RC, RA, 29);
681 S(S5, RB, RD, RE, RC, RA); LK2(RA, RB, RD, RC, RE, 30);
682 S(S6, RA, RB, RD, RC, RE); LK2(RD, RE, RB, RC, RA, 31);
683 S(S7, RD, RE, RB, RC, RA); K2(RA, RB, RC, RD, RE, 32);
715 K2(RA, RB, RC, RD, RE, 32);
716 SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);
717 SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);
718 SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);
719 SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);
720 SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);
721 SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);
722 SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);
723 SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);
724 SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);
725 SP(SI6, RC, RB, RE, RD, RA, 22); KL2(RE, RA, RD, RC, RB, 22);
726 SP(SI5, RE, RA, RD, RC, RB, 21); KL2(RA, RB, RE, RD, RC, 21);
727 SP(SI4, RA, RB, RE, RD, RC, 20); KL2(RA, RE, RC, RD, RB, 20);
728 SP(SI3, RA, RE, RC, RD, RB, 19); KL2(RC, RA, RB, RD, RE, 19);
729 SP(SI2, RC, RA, RB, RD, RE, 18); KL2(RA, RE, RD, RB, RC, 18);
730 SP(SI1, RA, RE, RD, RB, RC, 17); KL2(RC, RE, RD, RB, RA, 17);
731 SP(SI0, RC, RE, RD, RB, RA, 16); KL2(RD, RA, RE, RC, RB, 16);
732 SP(SI7, RD, RA, RE, RC, RB, 15); KL2(RA, RC, RD, RB, RE, 15);
733 SP(SI6, RA, RC, RD, RB, RE, 14); KL2(RD, RE, RB, RA, RC, 14);
734 SP(SI5, RD, RE, RB, RA, RC, 13); KL2(RE, RC, RD, RB, RA, 13);
735 SP(SI4, RE, RC, RD, RB, RA, 12); KL2(RE, RD, RA, RB, RC, 12);
736 SP(SI3, RE, RD, RA, RB, RC, 11); KL2(RA, RE, RC, RB, RD, 11);
737 SP(SI2, RA, RE, RC, RB, RD, 10); KL2(RE, RD, RB, RC, RA, 10);
738 SP(SI1, RE, RD, RB, RC, RA, 9); KL2(RA, RD, RB, RC, RE, 9);
739 SP(SI0, RA, RD, RB, RC, RE, 8); KL2(RB, RE, RD, RA, RC, 8);
740 SP(SI7, RB, RE, RD, RA, RC, 7); KL2(RE, RA, RB, RC, RD, 7);
741 SP(SI6, RE, RA, RB, RC, RD, 6); KL2(RB, RD, RC, RE, RA, 6);
742 SP(SI5, RB, RD, RC, RE, RA, 5); KL2(RD, RA, RB, RC, RE, 5);
743 SP(SI4, RD, RA, RB, RC, RE, 4); KL2(RD, RB, RE, RC, RA, 4);
744 SP(SI3, RD, RB, RE, RC, RA, 3); KL2(RE, RD, RA, RC, RB, 3);
745 SP(SI2, RE, RD, RA, RC, RB, 2); KL2(RD, RB, RC, RA, RE, 2);
746 SP(SI1, RD, RB, RC, RA, RE, 1); KL2(RE, RB, RC, RA, RD, 1);
747 S(SI0, RE, RB, RC, RA, RD); K2(RC, RD, RB, RE, RA, 0);
H A Dtwofish-avx-x86_64-asm_64.S206 encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
207 encrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l);
210 encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
211 encrypt_round(((2*n) + 1), RC, RD, RA, RB, dummy, dummy);
214 decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
215 decrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l);
218 decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
219 decrypt_round((2*n), RA, RB, RC, RD, dummy, dummy);
H A Dcast6-avx-x86_64-asm_64.S173 qop(RB, RA, 3); \
176 qop(RA, RD, 1);
180 qop(RA, RD, 1); \
183 qop(RB, RA, 3); \
H A Dsha1_avx2_x86_64_asm.S108 .set RA, REG_RA
337 .set RTB, RA
338 .set RA, T_REG
/linux-4.1.27/arch/powerpc/xmon/
H A Dspu-insns.h26 RRR | op | RC | RB | RA | RT | RI7 | op | I7 | RA | RT |
32 RI8 | op | I8 | RA | RT | RI10 | op | I10 | RA | RT |
44 RR | op | RB | RA | RT | LBT | op |RO| I16 | RO |
50 LBTI | op | // |RO| RA | RO |
64 ASM_RRR mnemonic RC, RA, RB, RT ASM_RI4 mnemonic RT, RA, I4
65 ASM_RI7 mnemonic RT, RA, I7
68 ASM_RUI8 mnemonic RT, RA, UI8 ASM_AI10 mnemonic RA, I10
69 ASM_RI10 mnemonic RT, RA, R10
70 ASM_RI10IDX mnemonic RT, I10(RA)
81 ASM_RA mnemonic RA ASM_LBTI mnemonic brinst, RA
82 ASM_RAB mnemonic RA, RB
84 ASM_RR mnemonic RT, RA, RB
86 ASM_RTA mnemonic RT, RA
96 The first(most significant) digit is always 0. Then it is followd by RC, RB, RA and RT digits.
101 For example, fms instruction has 00113 as the DEPENDENCY field. This means RC is not used in this operation, RB and RA are
133 /* 0[RC][RB][RA][RT] */
163 APUOP(M_BI, RR, 0x1a8, "bi", _A1(A_A), 00010, BR) /* BI IP<-RA */
164 APUOP(M_BISL, RR, 0x1a9, "bisl", _A2(A_T,A_A), 00012, BR) /* BISL RT,IP<-IP,RA */
169 APUOP(M_FREST, RR, 0x1b8, "frest", _A2(A_T,A_A), 00012, SHUF) /* FREST RT<-recip(RA) */
170 APUOP(M_FRSQEST, RR, 0x1b9, "frsqest", _A2(A_T,A_A), 00012, SHUF) /* FRSQEST RT<-rsqrt(RA) */
174 APUOP(M_GB, RR, 0x1b0, "gb", _A2(A_T,A_A), 00012, SHUF) /* GatherBits% RT<-gather(RA) */
175 APUOP(M_GBH, RR, 0x1b1, "gbh", _A2(A_T,A_A), 00012, SHUF) /* GatherBits% RT<-gather(RA) */
176 APUOP(M_GBB, RR, 0x1b2, "gbb", _A2(A_T,A_A), 00012, SHUF) /* GatherBits% RT<-gather(RA) */
181 APUOP(M_ROTQBII, RI7, 0x1f8, "rotqbii", _A3(A_T,A_A,A_U3), 00012, SHUF) /* ROTQBII RT<-RA<<<I7 */
182 APUOP(M_ROTQBYI, RI7, 0x1fc, "rotqbyi", _A3(A_T,A_A,A_S7N), 00012, SHUF) /* ROTQBYI RT<-RA<<<(I7*8) */
183 APUOP(M_ROTQMBII, RI7, 0x1f9, "rotqmbii", _A3(A_T,A_A,A_S3), 00012, SHUF) /* ROTQMBII RT<-RA<<I7 */
184 APUOP(M_ROTQMBYI, RI7, 0x1fd, "rotqmbyi", _A3(A_T,A_A,A_S6), 00012, SHUF) /* ROTQMBYI RT<-RA<<I7 */
185 APUOP(M_SHLQBII, RI7, 0x1fb, "shlqbii", _A3(A_T,A_A,A_U3), 00012, SHUF) /* SHLQBII RT<-RA<<I7 */
186 APUOP(M_SHLQBYI, RI7, 0x1ff, "shlqbyi", _A3(A_T,A_A,A_U5), 00012, SHUF) /* SHLQBYI RT<-RA<<I7 */
197 APUOP(M_ROTQBI, RR, 0x1d8, "rotqbi", _A3(A_T,A_A,A_B), 00112, SHUF) /* ROTQBI RT<-RA<<<Rb */
198 APUOP(M_ROTQMBI, RR, 0x1d9, "rotqmbi", _A3(A_T,A_A,A_B), 00112, SHUF) /* ROTQMBI RT<-RA<<Rb */
199 APUOP(M_SHLQBI, RR, 0x1db, "shlqbi", _A3(A_T,A_A,A_B), 00112, SHUF) /* SHLQBI RT<-RA<<Rb */
200 APUOP(M_ROTQBY, RR, 0x1dc, "rotqby", _A3(A_T,A_A,A_B), 00112, SHUF) /* ROTQBY RT<-RA<<<(Rb*8) */
201 APUOP(M_ROTQMBY, RR, 0x1dd, "rotqmby", _A3(A_T,A_A,A_B), 00112, SHUF) /* ROTQMBY RT<-RA<<Rb */
202 APUOP(M_SHLQBY, RR, 0x1df, "shlqby", _A3(A_T,A_A,A_B), 00112, SHUF) /* SHLQBY RT<-RA<<Rb */
203 APUOP(M_ROTQBYBI, RR, 0x1cc, "rotqbybi", _A3(A_T,A_A,A_B), 00112, SHUF) /* ROTQBYBI RT<-RA<<Rb */
204 APUOP(M_ROTQMBYBI, RR, 0x1cd, "rotqmbybi", _A3(A_T,A_A,A_B), 00112, SHUF) /* ROTQMBYBI RT<-RA<<Rb */
205 APUOP(M_SHLQBYBI, RR, 0x1cf, "shlqbybi", _A3(A_T,A_A,A_B), 00112, SHUF) /* SHLQBYBI RT<-RA<<Rb */
207 APUOP(M_SHUFB, RRR, 0x580, "shufb", _A4(A_C,A_A,A_B,A_T), 02111, SHUF) /* SHUFfleBytes RC<-f(RA,RB,RT) */
215 APUOP(M_ANDBI, RI10, 0x0b0, "andbi", _A3(A_T,A_A,A_S10B), 00012, FX2) /* AND%I RT<-RA&I10 */
216 APUOP(M_ANDHI, RI10, 0x0a8, "andhi", _A3(A_T,A_A,A_S10), 00012, FX2) /* AND%I RT<-RA&I10 */
217 APUOP(M_ANDI, RI10, 0x0a0, "andi", _A3(A_T,A_A,A_S10), 00012, FX2) /* AND%I RT<-RA&I10 */
218 APUOP(M_ORBI, RI10, 0x030, "orbi", _A3(A_T,A_A,A_S10B), 00012, FX2) /* OR%I RT<-RA|I10 */
219 APUOP(M_ORHI, RI10, 0x028, "orhi", _A3(A_T,A_A,A_S10), 00012, FX2) /* OR%I RT<-RA|I10 */
220 APUOP(M_ORI, RI10, 0x020, "ori", _A3(A_T,A_A,A_S10), 00012, FX2) /* OR%I RT<-RA|I10 */
221 APUOP(M_ORX, RR, 0x1f0, "orx", _A2(A_T,A_A), 00012, BR) /* ORX RT<-RA.w0|RA.w1|RA.w2|RA.w3 */
222 APUOP(M_XORBI, RI10, 0x230, "xorbi", _A3(A_T,A_A,A_S10B), 00012, FX2) /* XOR%I RT<-RA^I10 */
223 APUOP(M_XORHI, RI10, 0x228, "xorhi", _A3(A_T,A_A,A_S10), 00012, FX2) /* XOR%I RT<-RA^I10 */
224 APUOP(M_XORI, RI10, 0x220, "xori", _A3(A_T,A_A,A_S10), 00012, FX2) /* XOR%I RT<-RA^I10 */
225 APUOP(M_AHI, RI10, 0x0e8, "ahi", _A3(A_T,A_A,A_S10), 00012, FX2) /* Add%Immed RT<-RA+I10 */
226 APUOP(M_AI, RI10, 0x0e0, "ai", _A3(A_T,A_A,A_S10), 00012, FX2) /* Add%Immed RT<-RA+I10 */
227 APUOP(M_SFHI, RI10, 0x068, "sfhi", _A3(A_T,A_A,A_S10), 00012, FX2) /* SubFrom%Imm RT<-I10-RA */
228 APUOP(M_SFI, RI10, 0x060, "sfi", _A3(A_T,A_A,A_S10), 00012, FX2) /* SubFrom%Imm RT<-I10-RA */
229 APUOP(M_CGTBI, RI10, 0x270, "cgtbi", _A3(A_T,A_A,A_S10B), 00012, FX2) /* CGT%I RT<-(RA>I10) */
230 APUOP(M_CGTHI, RI10, 0x268, "cgthi", _A3(A_T,A_A,A_S10), 00012, FX2) /* CGT%I RT<-(RA>I10) */
231 APUOP(M_CGTI, RI10, 0x260, "cgti", _A3(A_T,A_A,A_S10), 00012, FX2) /* CGT%I RT<-(RA>I10) */
232 APUOP(M_CLGTBI, RI10, 0x2f0, "clgtbi", _A3(A_T,A_A,A_S10B), 00012, FX2) /* CLGT%I RT<-(RA>I10) */
233 APUOP(M_CLGTHI, RI10, 0x2e8, "clgthi", _A3(A_T,A_A,A_S10), 00012, FX2) /* CLGT%I RT<-(RA>I10) */
234 APUOP(M_CLGTI, RI10, 0x2e0, "clgti", _A3(A_T,A_A,A_S10), 00012, FX2) /* CLGT%I RT<-(RA>I10) */
235 APUOP(M_CEQBI, RI10, 0x3f0, "ceqbi", _A3(A_T,A_A,A_S10B), 00012, FX2) /* CEQ%I RT<-(RA=I10) */
236 APUOP(M_CEQHI, RI10, 0x3e8, "ceqhi", _A3(A_T,A_A,A_S10), 00012, FX2) /* CEQ%I RT<-(RA=I10) */
237 APUOP(M_CEQI, RI10, 0x3e0, "ceqi", _A3(A_T,A_A,A_S10), 00012, FX2) /* CEQ%I RT<-(RA=I10) */
238 APUOP(M_HGTI, RI10, 0x278, "hgti", _A3(A_T,A_A,A_S10), 00010, FX2) /* HaltGTI halt_if(RA>I10) */
239 APUOP(M_HGTI2, RI10, 0x278, "hgti", _A2(A_A,A_S10), 00010, FX2) /* HaltGTI halt_if(RA>I10) */
240 APUOP(M_HLGTI, RI10, 0x2f8, "hlgti", _A3(A_T,A_A,A_S10), 00010, FX2) /* HaltLGTI halt_if(RA>I10) */
241 APUOP(M_HLGTI2, RI10, 0x2f8, "hlgti", _A2(A_A,A_S10), 00010, FX2) /* HaltLGTI halt_if(RA>I10) */
242 APUOP(M_HEQI, RI10, 0x3f8, "heqi", _A3(A_T,A_A,A_S10), 00010, FX2) /* HaltEQImm halt_if(RA=I10) */
243 APUOP(M_HEQI2, RI10, 0x3f8, "heqi", _A2(A_A,A_S10), 00010, FX2) /* HaltEQImm halt_if(RA=I10) */
244 APUOP(M_MPYI, RI10, 0x3a0, "mpyi", _A3(A_T,A_A,A_S10), 00012, FP7) /* MPYI RT<-RA*I10 */
245 APUOP(M_MPYUI, RI10, 0x3a8, "mpyui", _A3(A_T,A_A,A_S10), 00012, FP7) /* MPYUI RT<-RA*I10 */
246 APUOP(M_CFLTS, RI8, 0x3b0, "cflts", _A3(A_T,A_A,A_U7A), 00012, FP7) /* CFLTS RT<-int(RA,I8) */
247 APUOP(M_CFLTU, RI8, 0x3b2, "cfltu", _A3(A_T,A_A,A_U7A), 00012, FP7) /* CFLTU RT<-int(RA,I8) */
248 APUOP(M_CSFLT, RI8, 0x3b4, "csflt", _A3(A_T,A_A,A_U7B), 00012, FP7) /* CSFLT RT<-flt(RA,I8) */
249 APUOP(M_CUFLT, RI8, 0x3b6, "cuflt", _A3(A_T,A_A,A_U7B), 00012, FP7) /* CUFLT RT<-flt(RA,I8) */
250 APUOP(M_FESD, RR, 0x3b8, "fesd", _A2(A_T,A_A), 00012, FPD) /* FESD RT<-double(RA) */
251 APUOP(M_FRDS, RR, 0x3b9, "frds", _A2(A_T,A_A), 00012, FPD) /* FRDS RT<-single(RA) */
253 APUOP(M_FSCRWR, RR, 0x3ba, "fscrwr", _A2(A_T,A_A), 00010, FP7) /* FSCRWR FP_status<-RA */
254 APUOP(M_FSCRWR2, RR, 0x3ba, "fscrwr", _A1(A_A), 00010, FP7) /* FSCRWR FP_status<-RA */
255 APUOP(M_CLZ, RR, 0x2a5, "clz", _A2(A_T,A_A), 00012, FX2) /* CLZ RT<-clz(RA) */
256 APUOP(M_CNTB, RR, 0x2b4, "cntb", _A2(A_T,A_A), 00012, FXB) /* CNT RT<-pop(RA) */
257 APUOP(M_XSBH, RR, 0x2b6, "xsbh", _A2(A_T,A_A), 00012, FX2) /* eXtSignBtoH RT<-sign_ext(RA) */
258 APUOP(M_XSHW, RR, 0x2ae, "xshw", _A2(A_T,A_A), 00012, FX2) /* eXtSignHtoW RT<-sign_ext(RA) */
259 APUOP(M_XSWD, RR, 0x2a6, "xswd", _A2(A_T,A_A), 00012, FX2) /* eXtSignWtoD RT<-sign_ext(RA) */
260 APUOP(M_ROTI, RI7, 0x078, "roti", _A3(A_T,A_A,A_S7N), 00012, FX3) /* ROT%I RT<-RA<<<I7 */
261 APUOP(M_ROTMI, RI7, 0x079, "rotmi", _A3(A_T,A_A,A_S7), 00012, FX3) /* ROT%MI RT<-RA<<I7 */
262 APUOP(M_ROTMAI, RI7, 0x07a, "rotmai", _A3(A_T,A_A,A_S7), 00012, FX3) /* ROTMA%I RT<-RA<<I7 */
263 APUOP(M_SHLI, RI7, 0x07b, "shli", _A3(A_T,A_A,A_U6), 00012, FX3) /* SHL%I RT<-RA<<I7 */
264 APUOP(M_ROTHI, RI7, 0x07c, "rothi", _A3(A_T,A_A,A_S7N), 00012, FX3) /* ROT%I RT<-RA<<<I7 */
265 APUOP(M_ROTHMI, RI7, 0x07d, "rothmi", _A3(A_T,A_A,A_S6), 00012, FX3) /* ROT%MI RT<-RA<<I7 */
266 APUOP(M_ROTMAHI, RI7, 0x07e, "rotmahi", _A3(A_T,A_A,A_S6), 00012, FX3) /* ROTMA%I RT<-RA<<I7 */
267 APUOP(M_SHLHI, RI7, 0x07f, "shlhi", _A3(A_T,A_A,A_U5), 00012, FX3) /* SHL%I RT<-RA<<I7 */
268 APUOP(M_A, RR, 0x0c0, "a", _A3(A_T,A_A,A_B), 00112, FX2) /* Add% RT<-RA+RB */
269 APUOP(M_AH, RR, 0x0c8, "ah", _A3(A_T,A_A,A_B), 00112, FX2) /* Add% RT<-RA+RB */
270 APUOP(M_SF, RR, 0x040, "sf", _A3(A_T,A_A,A_B), 00112, FX2) /* SubFrom% RT<-RB-RA */
271 APUOP(M_SFH, RR, 0x048, "sfh", _A3(A_T,A_A,A_B), 00112, FX2) /* SubFrom% RT<-RB-RA */
272 APUOP(M_CGT, RR, 0x240, "cgt", _A3(A_T,A_A,A_B), 00112, FX2) /* CGT% RT<-(RA>RB) */
273 APUOP(M_CGTB, RR, 0x250, "cgtb", _A3(A_T,A_A,A_B), 00112, FX2) /* CGT% RT<-(RA>RB) */
274 APUOP(M_CGTH, RR, 0x248, "cgth", _A3(A_T,A_A,A_B), 00112, FX2) /* CGT% RT<-(RA>RB) */
275 APUOP(M_CLGT, RR, 0x2c0, "clgt", _A3(A_T,A_A,A_B), 00112, FX2) /* CLGT% RT<-(RA>RB) */
276 APUOP(M_CLGTB, RR, 0x2d0, "clgtb", _A3(A_T,A_A,A_B), 00112, FX2) /* CLGT% RT<-(RA>RB) */
277 APUOP(M_CLGTH, RR, 0x2c8, "clgth", _A3(A_T,A_A,A_B), 00112, FX2) /* CLGT% RT<-(RA>RB) */
278 APUOP(M_CEQ, RR, 0x3c0, "ceq", _A3(A_T,A_A,A_B), 00112, FX2) /* CEQ% RT<-(RA=RB) */
279 APUOP(M_CEQB, RR, 0x3d0, "ceqb", _A3(A_T,A_A,A_B), 00112, FX2) /* CEQ% RT<-(RA=RB) */
280 APUOP(M_CEQH, RR, 0x3c8, "ceqh", _A3(A_T,A_A,A_B), 00112, FX2) /* CEQ% RT<-(RA=RB) */
281 APUOP(M_HGT, RR, 0x258, "hgt", _A3(A_T,A_A,A_B), 00110, FX2) /* HaltGT halt_if(RA>RB) */
282 APUOP(M_HGT2, RR, 0x258, "hgt", _A2(A_A,A_B), 00110, FX2) /* HaltGT halt_if(RA>RB) */
283 APUOP(M_HLGT, RR, 0x2d8, "hlgt", _A3(A_T,A_A,A_B), 00110, FX2) /* HaltLGT halt_if(RA>RB) */
284 APUOP(M_HLGT2, RR, 0x2d8, "hlgt", _A2(A_A,A_B), 00110, FX2) /* HaltLGT halt_if(RA>RB) */
285 APUOP(M_HEQ, RR, 0x3d8, "heq", _A3(A_T,A_A,A_B), 00110, FX2) /* HaltEQ halt_if(RA=RB) */
286 APUOP(M_HEQ2, RR, 0x3d8, "heq", _A2(A_A,A_B), 00110, FX2) /* HaltEQ halt_if(RA=RB) */
287 APUOP(M_FCEQ, RR, 0x3c2, "fceq", _A3(A_T,A_A,A_B), 00112, FX2) /* FCEQ RT<-(RA=RB) */
288 APUOP(M_FCMEQ, RR, 0x3ca, "fcmeq", _A3(A_T,A_A,A_B), 00112, FX2) /* FCMEQ RT<-(|RA|=|RB|) */
289 APUOP(M_FCGT, RR, 0x2c2, "fcgt", _A3(A_T,A_A,A_B), 00112, FX2) /* FCGT RT<-(RA<RB) */
290 APUOP(M_FCMGT, RR, 0x2ca, "fcmgt", _A3(A_T,A_A,A_B), 00112, FX2) /* FCMGT RT<-(|RA|<|RB|) */
291 APUOP(M_AND, RR, 0x0c1, "and", _A3(A_T,A_A,A_B), 00112, FX2) /* AND RT<-RA&RB */
292 APUOP(M_NAND, RR, 0x0c9, "nand", _A3(A_T,A_A,A_B), 00112, FX2) /* NAND RT<-!(RA&RB) */
293 APUOP(M_OR, RR, 0x041, "or", _A3(A_T,A_A,A_B), 00112, FX2) /* OR RT<-RA|RB */
294 APUOP(M_NOR, RR, 0x049, "nor", _A3(A_T,A_A,A_B), 00112, FX2) /* NOR RT<-!(RA&RB) */
295 APUOP(M_XOR, RR, 0x241, "xor", _A3(A_T,A_A,A_B), 00112, FX2) /* XOR RT<-RA^RB */
296 APUOP(M_EQV, RR, 0x249, "eqv", _A3(A_T,A_A,A_B), 00112, FX2) /* EQuiValent RT<-!(RA^RB) */
297 APUOP(M_ANDC, RR, 0x2c1, "andc", _A3(A_T,A_A,A_B), 00112, FX2) /* ANDComplement RT<-RA&!RB */
298 APUOP(M_ORC, RR, 0x2c9, "orc", _A3(A_T,A_A,A_B), 00112, FX2) /* ORComplement RT<-RA|!RB */
299 APUOP(M_ABSDB, RR, 0x053, "absdb", _A3(A_T,A_A,A_B), 00112, FXB) /* ABSoluteDiff RT<-|RA-RB| */
300 APUOP(M_AVGB, RR, 0x0d3, "avgb", _A3(A_T,A_A,A_B), 00112, FXB) /* AVG% RT<-(RA+RB+1)/2 */
301 APUOP(M_SUMB, RR, 0x253, "sumb", _A3(A_T,A_A,A_B), 00112, FXB) /* SUM% RT<-f(RA,RB) */
302 APUOP(M_DFA, RR, 0x2cc, "dfa", _A3(A_T,A_A,A_B), 00112, FPD) /* DFAdd RT<-RA+RB */
303 APUOP(M_DFM, RR, 0x2ce, "dfm", _A3(A_T,A_A,A_B), 00112, FPD) /* DFMul RT<-RA*RB */
304 APUOP(M_DFS, RR, 0x2cd, "dfs", _A3(A_T,A_A,A_B), 00112, FPD) /* DFSub RT<-RA-RB */
305 APUOP(M_FA, RR, 0x2c4, "fa", _A3(A_T,A_A,A_B), 00112, FP6) /* FAdd RT<-RA+RB */
306 APUOP(M_FM, RR, 0x2c6, "fm", _A3(A_T,A_A,A_B), 00112, FP6) /* FMul RT<-RA*RB */
307 APUOP(M_FS, RR, 0x2c5, "fs", _A3(A_T,A_A,A_B), 00112, FP6) /* FSub RT<-RA-RB */
308 APUOP(M_MPY, RR, 0x3c4, "mpy", _A3(A_T,A_A,A_B), 00112, FP7) /* MPY RT<-RA*RB */
312 APUOP(M_MPYS, RR, 0x3c7, "mpys", _A3(A_T,A_A,A_B), 00112, FP7) /* MPYS RT<-(RA*RB)>>16 */
313 APUOP(M_MPYU, RR, 0x3cc, "mpyu", _A3(A_T,A_A,A_B), 00112, FP7) /* MPYU RT<-RA*RB */
314 APUOP(M_FI, RR, 0x3d4, "fi", _A3(A_T,A_A,A_B), 00112, FP7) /* FInterpolate RT<-f(RA,RB) */
315 APUOP(M_ROT, RR, 0x058, "rot", _A3(A_T,A_A,A_B), 00112, FX3) /* ROT% RT<-RA<<<RB */
316 APUOP(M_ROTM, RR, 0x059, "rotm", _A3(A_T,A_A,A_B), 00112, FX3) /* ROT%M RT<-RA<<Rb */
317 APUOP(M_ROTMA, RR, 0x05a, "rotma", _A3(A_T,A_A,A_B), 00112, FX3) /* ROTMA% RT<-RA<<Rb */
318 APUOP(M_SHL, RR, 0x05b, "shl", _A3(A_T,A_A,A_B), 00112, FX3) /* SHL% RT<-RA<<Rb */
319 APUOP(M_ROTH, RR, 0x05c, "roth", _A3(A_T,A_A,A_B), 00112, FX3) /* ROT% RT<-RA<<<RB */
320 APUOP(M_ROTHM, RR, 0x05d, "rothm", _A3(A_T,A_A,A_B), 00112, FX3) /* ROT%M RT<-RA<<Rb */
321 APUOP(M_ROTMAH, RR, 0x05e, "rotmah", _A3(A_T,A_A,A_B), 00112, FX3) /* ROTMA% RT<-RA<<Rb */
322 APUOP(M_SHLH, RR, 0x05f, "shlh", _A3(A_T,A_A,A_B), 00112, FX3) /* SHL% RT<-RA<<Rb */
325 APUOP(M_DFMA, RR, 0x35c, "dfma", _A3(A_T,A_A,A_B), 00113, FPD) /* DFMAdd RT<-RT+RA*RB */
326 APUOP(M_DFMS, RR, 0x35d, "dfms", _A3(A_T,A_A,A_B), 00113, FPD) /* DFMSub RT<-RA*RB-RT */
327 APUOP(M_DFNMS, RR, 0x35e, "dfnms", _A3(A_T,A_A,A_B), 00113, FPD) /* DFNMSub RT<-RT-RA*RB */
328 APUOP(M_DFNMA, RR, 0x35f, "dfnma", _A3(A_T,A_A,A_B), 00113, FPD) /* DFNMAdd RT<-(-RT)-RA*RB */
329 APUOP(M_FMA, RRR, 0x700, "fma", _A4(A_C,A_A,A_B,A_T), 02111, FP6) /* FMAdd RC<-RT+RA*RB */
330 APUOP(M_FMS, RRR, 0x780, "fms", _A4(A_C,A_A,A_B,A_T), 02111, FP6) /* FMSub RC<-RA*RB-RT */
331 APUOP(M_FNMS, RRR, 0x680, "fnms", _A4(A_C,A_A,A_B,A_T), 02111, FP6) /* FNMSub RC<-RT-RA*RB */
332 APUOP(M_MPYA, RRR, 0x600, "mpya", _A4(A_C,A_A,A_B,A_T), 02111, FP7) /* MPYA RC<-RA*RB+RT */
333 APUOP(M_SELB, RRR, 0x400, "selb", _A4(A_C,A_A,A_B,A_T), 02111, FX2) /* SELectBits RC<-RA&RT|RB&!RT */
353 APUOP(M_ADDX, RR, 0x340, "addx", _A3(A_T,A_A,A_B), 00113, FX2) /* Add_eXtended RT<-RA+RB+RT */
354 APUOP(M_CG, RR, 0x0c2, "cg", _A3(A_T,A_A,A_B), 00112, FX2) /* CarryGenerate RT<-cout(RA+RB) */
355 APUOP(M_CGX, RR, 0x342, "cgx", _A3(A_T,A_A,A_B), 00113, FX2) /* CarryGen_eXtd RT<-cout(RA+RB+RT) */
356 APUOP(M_SFX, RR, 0x341, "sfx", _A3(A_T,A_A,A_B), 00113, FX2) /* Add_eXtended RT<-RA+RB+RT */
357 APUOP(M_BG, RR, 0x042, "bg", _A3(A_T,A_A,A_B), 00112, FX2) /* CarryGenerate RT<-cout(RA+RB) */
358 APUOP(M_BGX, RR, 0x343, "bgx", _A3(A_T,A_A,A_B), 00113, FX2) /* CarryGen_eXtd RT<-cout(RA+RB+RT) */
370 APUOPFB(M_BID, RR, 0x1a8, 0x20, "bid", _A1(A_A), 00010, BR) /* BI IP<-RA */
371 APUOPFB(M_BIE, RR, 0x1a8, 0x10, "bie", _A1(A_A), 00010, BR) /* BI IP<-RA */
372 APUOPFB(M_BISLD, RR, 0x1a9, 0x20, "bisld", _A2(A_T,A_A), 00012, BR) /* BISL RT,IP<-IP,RA */
373 APUOPFB(M_BISLE, RR, 0x1a9, 0x10, "bisle", _A2(A_T,A_A), 00012, BR) /* BISL RT,IP<-IP,RA */
392 APUOP(M_LR, RI10, 0x020, "lr", _A2(A_T,A_A), 00012, FX2) /* OR%I RT<-RA|I10 */
H A Dppc-opc.c375 /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */
376 #define RA NSI + 1
380 /* As above, but 0 in the RA field means zero, not r0. */
381 #define RA0 RA + 1
384 /* The RA field in the DQ form lq instruction, which has special
389 /* The RA field in a D or X form instruction which is an updating
390 load, which means that the RA field may not be zero and may not
395 /* The RA field in an lmw instruction, which has special value
400 /* The RA field in a D or X form instruction which is an updating
401 store or an updating floating point load, which means that the RA
406 /* The RA field of the tlbwe instruction, which is optional. */
1294 /* The RA field in a D or X form instruction which is an updating
1295 load, which means that the RA field may not be zero and may not
1310 /* The RA field in an lmw instruction, which has special value
1324 /* The RA field in the DQ form lq instruction, which has special
1340 /* The RA field in a D or X form instruction which is an updating
1341 store or an updating floating point load, which means that the RA
1597 /* The main opcode mask with the RA field clear. */
1682 /* An X_MASK with the RA field fixed. */
1694 /* An X_MASK with the RA and RB fields fixed. */
1700 /* An X_MASK with the RT and RA fields fixed. */
1941 { "tdlgti", OPTO(2,TOLGT), OPTO_MASK, PPC64, { RA, SI } },
1942 { "tdllti", OPTO(2,TOLLT), OPTO_MASK, PPC64, { RA, SI } },
1943 { "tdeqi", OPTO(2,TOEQ), OPTO_MASK, PPC64, { RA, SI } },
1944 { "tdlgei", OPTO(2,TOLGE), OPTO_MASK, PPC64, { RA, SI } },
1945 { "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, { RA, SI } },
1946 { "tdllei", OPTO(2,TOLLE), OPTO_MASK, PPC64, { RA, SI } },
1947 { "tdlngi", OPTO(2,TOLNG), OPTO_MASK, PPC64, { RA, SI } },
1948 { "tdgti", OPTO(2,TOGT), OPTO_MASK, PPC64, { RA, SI } },
1949 { "tdgei", OPTO(2,TOGE), OPTO_MASK, PPC64, { RA, SI } },
1950 { "tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, { RA, SI } },
1951 { "tdlti", OPTO(2,TOLT), OPTO_MASK, PPC64, { RA, SI } },
1952 { "tdlei", OPTO(2,TOLE), OPTO_MASK, PPC64, { RA, SI } },
1953 { "tdngi", OPTO(2,TONG), OPTO_MASK, PPC64, { RA, SI } },
1954 { "tdnei", OPTO(2,TONE), OPTO_MASK, PPC64, { RA, SI } },
1955 { "tdi", OP(2), OP_MASK, PPC64, { TO, RA, SI } },
1957 { "twlgti", OPTO(3,TOLGT), OPTO_MASK, PPCCOM, { RA, SI } },
1958 { "tlgti", OPTO(3,TOLGT), OPTO_MASK, PWRCOM, { RA, SI } },
1959 { "twllti", OPTO(3,TOLLT), OPTO_MASK, PPCCOM, { RA, SI } },
1960 { "tllti", OPTO(3,TOLLT), OPTO_MASK, PWRCOM, { RA, SI } },
1961 { "tweqi", OPTO(3,TOEQ), OPTO_MASK, PPCCOM, { RA, SI } },
1962 { "teqi", OPTO(3,TOEQ), OPTO_MASK, PWRCOM, { RA, SI } },
1963 { "twlgei", OPTO(3,TOLGE), OPTO_MASK, PPCCOM, { RA, SI } },
1964 { "tlgei", OPTO(3,TOLGE), OPTO_MASK, PWRCOM, { RA, SI } },
1965 { "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, { RA, SI } },
1966 { "tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, { RA, SI } },
1967 { "twllei", OPTO(3,TOLLE), OPTO_MASK, PPCCOM, { RA, SI } },
1968 { "tllei", OPTO(3,TOLLE), OPTO_MASK, PWRCOM, { RA, SI } },
1969 { "twlngi", OPTO(3,TOLNG), OPTO_MASK, PPCCOM, { RA, SI } },
1970 { "tlngi", OPTO(3,TOLNG), OPTO_MASK, PWRCOM, { RA, SI } },
1971 { "twgti", OPTO(3,TOGT), OPTO_MASK, PPCCOM, { RA, SI } },
1972 { "tgti", OPTO(3,TOGT), OPTO_MASK, PWRCOM, { RA, SI } },
1973 { "twgei", OPTO(3,TOGE), OPTO_MASK, PPCCOM, { RA, SI } },
1974 { "tgei", OPTO(3,TOGE), OPTO_MASK, PWRCOM, { RA, SI } },
1975 { "twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, { RA, SI } },
1976 { "tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, { RA, SI } },
1977 { "twlti", OPTO(3,TOLT), OPTO_MASK, PPCCOM, { RA, SI } },
1978 { "tlti", OPTO(3,TOLT), OPTO_MASK, PWRCOM, { RA, SI } },
1979 { "twlei", OPTO(3,TOLE), OPTO_MASK, PPCCOM, { RA, SI } },
1980 { "tlei", OPTO(3,TOLE), OPTO_MASK, PWRCOM, { RA, SI } },
1981 { "twngi", OPTO(3,TONG), OPTO_MASK, PPCCOM, { RA, SI } },
1982 { "tngi", OPTO(3,TONG), OPTO_MASK, PWRCOM, { RA, SI } },
1983 { "twnei", OPTO(3,TONE), OPTO_MASK, PPCCOM, { RA, SI } },
1984 { "tnei", OPTO(3,TONE), OPTO_MASK, PWRCOM, { RA, SI } },
1985 { "twi", OP(3), OP_MASK, PPCCOM, { TO, RA, SI } },
1986 { "ti", OP(3), OP_MASK, PWRCOM, { TO, RA, SI } },
1988 { "macchw", XO(4,172,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1989 { "macchw.", XO(4,172,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1990 { "macchwo", XO(4,172,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1991 { "macchwo.", XO(4,172,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1992 { "macchws", XO(4,236,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1993 { "macchws.", XO(4,236,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1994 { "macchwso", XO(4,236,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1995 { "macchwso.", XO(4,236,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1996 { "macchwsu", XO(4,204,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1997 { "macchwsu.", XO(4,204,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1998 { "macchwsuo", XO(4,204,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
1999 { "macchwsuo.", XO(4,204,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2000 { "macchwu", XO(4,140,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2001 { "macchwu.", XO(4,140,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2002 { "macchwuo", XO(4,140,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2003 { "macchwuo.", XO(4,140,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2004 { "machhw", XO(4,44,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2005 { "machhw.", XO(4,44,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2006 { "machhwo", XO(4,44,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2007 { "machhwo.", XO(4,44,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2008 { "machhws", XO(4,108,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2009 { "machhws.", XO(4,108,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2010 { "machhwso", XO(4,108,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2011 { "machhwso.", XO(4,108,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2012 { "machhwsu", XO(4,76,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2013 { "machhwsu.", XO(4,76,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2014 { "machhwsuo", XO(4,76,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2015 { "machhwsuo.", XO(4,76,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2016 { "machhwu", XO(4,12,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2017 { "machhwu.", XO(4,12,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2018 { "machhwuo", XO(4,12,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2019 { "machhwuo.", XO(4,12,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2020 { "maclhw", XO(4,428,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2021 { "maclhw.", XO(4,428,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2022 { "maclhwo", XO(4,428,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2023 { "maclhwo.", XO(4,428,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2024 { "maclhws", XO(4,492,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2025 { "maclhws.", XO(4,492,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2026 { "maclhwso", XO(4,492,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2027 { "maclhwso.", XO(4,492,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2028 { "maclhwsu", XO(4,460,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2029 { "maclhwsu.", XO(4,460,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2030 { "maclhwsuo", XO(4,460,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2031 { "maclhwsuo.", XO(4,460,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2032 { "maclhwu", XO(4,396,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2033 { "maclhwu.", XO(4,396,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2034 { "maclhwuo", XO(4,396,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2035 { "maclhwuo.", XO(4,396,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2036 { "mulchw", XRC(4,168,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2037 { "mulchw.", XRC(4,168,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2038 { "mulchwu", XRC(4,136,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2039 { "mulchwu.", XRC(4,136,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2040 { "mulhhw", XRC(4,40,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2041 { "mulhhw.", XRC(4,40,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2042 { "mulhhwu", XRC(4,8,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2043 { "mulhhwu.", XRC(4,8,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2044 { "mullhw", XRC(4,424,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2045 { "mullhw.", XRC(4,424,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2046 { "mullhwu", XRC(4,392,0), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2047 { "mullhwu.", XRC(4,392,1), X_MASK, PPC405|PPC440, { RT, RA, RB } },
2048 { "nmacchw", XO(4,174,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2049 { "nmacchw.", XO(4,174,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2050 { "nmacchwo", XO(4,174,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2051 { "nmacchwo.", XO(4,174,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2052 { "nmacchws", XO(4,238,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2053 { "nmacchws.", XO(4,238,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2054 { "nmacchwso", XO(4,238,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2055 { "nmacchwso.", XO(4,238,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2056 { "nmachhw", XO(4,46,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2057 { "nmachhw.", XO(4,46,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2058 { "nmachhwo", XO(4,46,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2059 { "nmachhwo.", XO(4,46,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2060 { "nmachhws", XO(4,110,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2061 { "nmachhws.", XO(4,110,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2062 { "nmachhwso", XO(4,110,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2063 { "nmachhwso.", XO(4,110,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2064 { "nmaclhw", XO(4,430,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2065 { "nmaclhw.", XO(4,430,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2066 { "nmaclhwo", XO(4,430,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2067 { "nmaclhwo.", XO(4,430,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2068 { "nmaclhws", XO(4,494,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2069 { "nmaclhws.", XO(4,494,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2070 { "nmaclhwso", XO(4,494,1,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2071 { "nmaclhwso.", XO(4,494,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
2079 { "efdabs", VX(4, 740), VX_MASK, PPCEFS, { RS, RA } },
2080 { "efdnabs", VX(4, 741), VX_MASK, PPCEFS, { RS, RA } },
2081 { "efdneg", VX(4, 742), VX_MASK, PPCEFS, { RS, RA } },
2082 { "efdadd", VX(4, 736), VX_MASK, PPCEFS, { RS, RA, RB } },
2083 { "efdsub", VX(4, 737), VX_MASK, PPCEFS, { RS, RA, RB } },
2084 { "efdmul", VX(4, 744), VX_MASK, PPCEFS, { RS, RA, RB } },
2085 { "efddiv", VX(4, 745), VX_MASK, PPCEFS, { RS, RA, RB } },
2086 { "efdcmpgt", VX(4, 748), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2087 { "efdcmplt", VX(4, 749), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2088 { "efdcmpeq", VX(4, 750), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2089 { "efdtstgt", VX(4, 764), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2090 { "efdtstlt", VX(4, 765), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2091 { "efdtsteq", VX(4, 766), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2265 { "evaddw", VX(4, 512), VX_MASK, PPCSPE, { RS, RA, RB } },
2267 { "evsubfw", VX(4, 516), VX_MASK, PPCSPE, { RS, RA, RB } },
2268 { "evsubw", VX(4, 516), VX_MASK, PPCSPE, { RS, RB, RA } },
2271 { "evabs", VX(4, 520), VX_MASK, PPCSPE, { RS, RA } },
2272 { "evneg", VX(4, 521), VX_MASK, PPCSPE, { RS, RA } },
2273 { "evextsb", VX(4, 522), VX_MASK, PPCSPE, { RS, RA } },
2274 { "evextsh", VX(4, 523), VX_MASK, PPCSPE, { RS, RA } },
2275 { "evrndw", VX(4, 524), VX_MASK, PPCSPE, { RS, RA } },
2276 { "evcntlzw", VX(4, 525), VX_MASK, PPCSPE, { RS, RA } },
2277 { "evcntlsw", VX(4, 526), VX_MASK, PPCSPE, { RS, RA } },
2279 { "brinc", VX(4, 527), VX_MASK, PPCSPE, { RS, RA, RB } },
2281 { "evand", VX(4, 529), VX_MASK, PPCSPE, { RS, RA, RB } },
2282 { "evandc", VX(4, 530), VX_MASK, PPCSPE, { RS, RA, RB } },
2283 { "evmr", VX(4, 535), VX_MASK, PPCSPE, { RS, RA, BBA } },
2284 { "evor", VX(4, 535), VX_MASK, PPCSPE, { RS, RA, RB } },
2285 { "evorc", VX(4, 539), VX_MASK, PPCSPE, { RS, RA, RB } },
2286 { "evxor", VX(4, 534), VX_MASK, PPCSPE, { RS, RA, RB } },
2287 { "eveqv", VX(4, 537), VX_MASK, PPCSPE, { RS, RA, RB } },
2288 { "evnand", VX(4, 542), VX_MASK, PPCSPE, { RS, RA, RB } },
2289 { "evnot", VX(4, 536), VX_MASK, PPCSPE, { RS, RA, BBA } },
2290 { "evnor", VX(4, 536), VX_MASK, PPCSPE, { RS, RA, RB } },
2292 { "evrlw", VX(4, 552), VX_MASK, PPCSPE, { RS, RA, RB } },
2293 { "evrlwi", VX(4, 554), VX_MASK, PPCSPE, { RS, RA, EVUIMM } },
2294 { "evslw", VX(4, 548), VX_MASK, PPCSPE, { RS, RA, RB } },
2295 { "evslwi", VX(4, 550), VX_MASK, PPCSPE, { RS, RA, EVUIMM } },
2296 { "evsrws", VX(4, 545), VX_MASK, PPCSPE, { RS, RA, RB } },
2297 { "evsrwu", VX(4, 544), VX_MASK, PPCSPE, { RS, RA, RB } },
2298 { "evsrwis", VX(4, 547), VX_MASK, PPCSPE, { RS, RA, EVUIMM } },
2299 { "evsrwiu", VX(4, 546), VX_MASK, PPCSPE, { RS, RA, EVUIMM } },
2302 { "evmergehi", VX(4, 556), VX_MASK, PPCSPE, { RS, RA, RB } },
2303 { "evmergelo", VX(4, 557), VX_MASK, PPCSPE, { RS, RA, RB } },
2304 { "evmergehilo",VX(4,558), VX_MASK, PPCSPE, { RS, RA, RB } },
2305 { "evmergelohi",VX(4,559), VX_MASK, PPCSPE, { RS, RA, RB } },
2307 { "evcmpgts", VX(4, 561), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2308 { "evcmpgtu", VX(4, 560), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2309 { "evcmplts", VX(4, 563), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2310 { "evcmpltu", VX(4, 562), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2311 { "evcmpeq", VX(4, 564), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2312 { "evsel", EVSEL(4,79),EVSEL_MASK, PPCSPE, { RS, RA, RB, CRFS } },
2314 { "evldd", VX(4, 769), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } },
2315 { "evlddx", VX(4, 768), VX_MASK, PPCSPE, { RS, RA, RB } },
2316 { "evldw", VX(4, 771), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } },
2317 { "evldwx", VX(4, 770), VX_MASK, PPCSPE, { RS, RA, RB } },
2318 { "evldh", VX(4, 773), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } },
2319 { "evldhx", VX(4, 772), VX_MASK, PPCSPE, { RS, RA, RB } },
2320 { "evlwhe", VX(4, 785), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } },
2321 { "evlwhex", VX(4, 784), VX_MASK, PPCSPE, { RS, RA, RB } },
2322 { "evlwhou", VX(4, 789), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } },
2323 { "evlwhoux", VX(4, 788), VX_MASK, PPCSPE, { RS, RA, RB } },
2324 { "evlwhos", VX(4, 791), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } },
2325 { "evlwhosx", VX(4, 790), VX_MASK, PPCSPE, { RS, RA, RB } },
2326 { "evlwwsplat",VX(4, 793), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } },
2327 { "evlwwsplatx",VX(4, 792), VX_MASK, PPCSPE, { RS, RA, RB } },
2328 { "evlwhsplat",VX(4, 797), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } },
2329 { "evlwhsplatx",VX(4, 796), VX_MASK, PPCSPE, { RS, RA, RB } },
2330 { "evlhhesplat",VX(4, 777), VX_MASK, PPCSPE, { RS, EVUIMM_2, RA } },
2331 { "evlhhesplatx",VX(4, 776), VX_MASK, PPCSPE, { RS, RA, RB } },
2332 { "evlhhousplat",VX(4, 781), VX_MASK, PPCSPE, { RS, EVUIMM_2, RA } },
2333 { "evlhhousplatx",VX(4, 780), VX_MASK, PPCSPE, { RS, RA, RB } },
2334 { "evlhhossplat",VX(4, 783), VX_MASK, PPCSPE, { RS, EVUIMM_2, RA } },
2335 { "evlhhossplatx",VX(4, 782), VX_MASK, PPCSPE, { RS, RA, RB } },
2337 { "evstdd", VX(4, 801), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } },
2338 { "evstddx", VX(4, 800), VX_MASK, PPCSPE, { RS, RA, RB } },
2339 { "evstdw", VX(4, 803), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } },
2340 { "evstdwx", VX(4, 802), VX_MASK, PPCSPE, { RS, RA, RB } },
2341 { "evstdh", VX(4, 805), VX_MASK, PPCSPE, { RS, EVUIMM_8, RA } },
2342 { "evstdhx", VX(4, 804), VX_MASK, PPCSPE, { RS, RA, RB } },
2343 { "evstwwe", VX(4, 825), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } },
2344 { "evstwwex", VX(4, 824), VX_MASK, PPCSPE, { RS, RA, RB } },
2345 { "evstwwo", VX(4, 829), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } },
2346 { "evstwwox", VX(4, 828), VX_MASK, PPCSPE, { RS, RA, RB } },
2347 { "evstwhe", VX(4, 817), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } },
2348 { "evstwhex", VX(4, 816), VX_MASK, PPCSPE, { RS, RA, RB } },
2349 { "evstwho", VX(4, 821), VX_MASK, PPCSPE, { RS, EVUIMM_4, RA } },
2350 { "evstwhox", VX(4, 820), VX_MASK, PPCSPE, { RS, RA, RB } },
2352 { "evfsabs", VX(4, 644), VX_MASK, PPCSPE, { RS, RA } },
2353 { "evfsnabs", VX(4, 645), VX_MASK, PPCSPE, { RS, RA } },
2354 { "evfsneg", VX(4, 646), VX_MASK, PPCSPE, { RS, RA } },
2355 { "evfsadd", VX(4, 640), VX_MASK, PPCSPE, { RS, RA, RB } },
2356 { "evfssub", VX(4, 641), VX_MASK, PPCSPE, { RS, RA, RB } },
2357 { "evfsmul", VX(4, 648), VX_MASK, PPCSPE, { RS, RA, RB } },
2358 { "evfsdiv", VX(4, 649), VX_MASK, PPCSPE, { RS, RA, RB } },
2359 { "evfscmpgt", VX(4, 652), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2360 { "evfscmplt", VX(4, 653), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2361 { "evfscmpeq", VX(4, 654), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2362 { "evfststgt", VX(4, 668), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2363 { "evfststlt", VX(4, 669), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2364 { "evfststeq", VX(4, 670), VX_MASK, PPCSPE, { CRFD, RA, RB } },
2376 { "efsabs", VX(4, 708), VX_MASK, PPCEFS, { RS, RA } },
2377 { "efsnabs", VX(4, 709), VX_MASK, PPCEFS, { RS, RA } },
2378 { "efsneg", VX(4, 710), VX_MASK, PPCEFS, { RS, RA } },
2379 { "efsadd", VX(4, 704), VX_MASK, PPCEFS, { RS, RA, RB } },
2380 { "efssub", VX(4, 705), VX_MASK, PPCEFS, { RS, RA, RB } },
2381 { "efsmul", VX(4, 712), VX_MASK, PPCEFS, { RS, RA, RB } },
2382 { "efsdiv", VX(4, 713), VX_MASK, PPCEFS, { RS, RA, RB } },
2383 { "efscmpgt", VX(4, 716), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2384 { "efscmplt", VX(4, 717), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2385 { "efscmpeq", VX(4, 718), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2386 { "efststgt", VX(4, 732), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2387 { "efststlt", VX(4, 733), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2388 { "efststeq", VX(4, 734), VX_MASK, PPCEFS, { CRFD, RA, RB } },
2400 { "evmhossf", VX(4, 1031), VX_MASK, PPCSPE, { RS, RA, RB } },
2401 { "evmhossfa", VX(4, 1063), VX_MASK, PPCSPE, { RS, RA, RB } },
2402 { "evmhosmf", VX(4, 1039), VX_MASK, PPCSPE, { RS, RA, RB } },
2403 { "evmhosmfa", VX(4, 1071), VX_MASK, PPCSPE, { RS, RA, RB } },
2404 { "evmhosmi", VX(4, 1037), VX_MASK, PPCSPE, { RS, RA, RB } },
2405 { "evmhosmia", VX(4, 1069), VX_MASK, PPCSPE, { RS, RA, RB } },
2406 { "evmhoumi", VX(4, 1036), VX_MASK, PPCSPE, { RS, RA, RB } },
2407 { "evmhoumia", VX(4, 1068), VX_MASK, PPCSPE, { RS, RA, RB } },
2408 { "evmhessf", VX(4, 1027), VX_MASK, PPCSPE, { RS, RA, RB } },
2409 { "evmhessfa", VX(4, 1059), VX_MASK, PPCSPE, { RS, RA, RB } },
2410 { "evmhesmf", VX(4, 1035), VX_MASK, PPCSPE, { RS, RA, RB } },
2411 { "evmhesmfa", VX(4, 1067), VX_MASK, PPCSPE, { RS, RA, RB } },
2412 { "evmhesmi", VX(4, 1033), VX_MASK, PPCSPE, { RS, RA, RB } },
2413 { "evmhesmia", VX(4, 1065), VX_MASK, PPCSPE, { RS, RA, RB } },
2414 { "evmheumi", VX(4, 1032), VX_MASK, PPCSPE, { RS, RA, RB } },
2415 { "evmheumia", VX(4, 1064), VX_MASK, PPCSPE, { RS, RA, RB } },
2417 { "evmhossfaaw",VX(4, 1287), VX_MASK, PPCSPE, { RS, RA, RB } },
2418 { "evmhossiaaw",VX(4, 1285), VX_MASK, PPCSPE, { RS, RA, RB } },
2419 { "evmhosmfaaw",VX(4, 1295), VX_MASK, PPCSPE, { RS, RA, RB } },
2420 { "evmhosmiaaw",VX(4, 1293), VX_MASK, PPCSPE, { RS, RA, RB } },
2421 { "evmhousiaaw",VX(4, 1284), VX_MASK, PPCSPE, { RS, RA, RB } },
2422 { "evmhoumiaaw",VX(4, 1292), VX_MASK, PPCSPE, { RS, RA, RB } },
2423 { "evmhessfaaw",VX(4, 1283), VX_MASK, PPCSPE, { RS, RA, RB } },
2424 { "evmhessiaaw",VX(4, 1281), VX_MASK, PPCSPE, { RS, RA, RB } },
2425 { "evmhesmfaaw",VX(4, 1291), VX_MASK, PPCSPE, { RS, RA, RB } },
2426 { "evmhesmiaaw",VX(4, 1289), VX_MASK, PPCSPE, { RS, RA, RB } },
2427 { "evmheusiaaw",VX(4, 1280), VX_MASK, PPCSPE, { RS, RA, RB } },
2428 { "evmheumiaaw",VX(4, 1288), VX_MASK, PPCSPE, { RS, RA, RB } },
2430 { "evmhossfanw",VX(4, 1415), VX_MASK, PPCSPE, { RS, RA, RB } },
2431 { "evmhossianw",VX(4, 1413), VX_MASK, PPCSPE, { RS, RA, RB } },
2432 { "evmhosmfanw",VX(4, 1423), VX_MASK, PPCSPE, { RS, RA, RB } },
2433 { "evmhosmianw",VX(4, 1421), VX_MASK, PPCSPE, { RS, RA, RB } },
2434 { "evmhousianw",VX(4, 1412), VX_MASK, PPCSPE, { RS, RA, RB } },
2435 { "evmhoumianw",VX(4, 1420), VX_MASK, PPCSPE, { RS, RA, RB } },
2436 { "evmhessfanw",VX(4, 1411), VX_MASK, PPCSPE, { RS, RA, RB } },
2437 { "evmhessianw",VX(4, 1409), VX_MASK, PPCSPE, { RS, RA, RB } },
2438 { "evmhesmfanw",VX(4, 1419), VX_MASK, PPCSPE, { RS, RA, RB } },
2439 { "evmhesmianw",VX(4, 1417), VX_MASK, PPCSPE, { RS, RA, RB } },
2440 { "evmheusianw",VX(4, 1408), VX_MASK, PPCSPE, { RS, RA, RB } },
2441 { "evmheumianw",VX(4, 1416), VX_MASK, PPCSPE, { RS, RA, RB } },
2443 { "evmhogsmfaa",VX(4, 1327), VX_MASK, PPCSPE, { RS, RA, RB } },
2444 { "evmhogsmiaa",VX(4, 1325), VX_MASK, PPCSPE, { RS, RA, RB } },
2445 { "evmhogumiaa",VX(4, 1324), VX_MASK, PPCSPE, { RS, RA, RB } },
2446 { "evmhegsmfaa",VX(4, 1323), VX_MASK, PPCSPE, { RS, RA, RB } },
2447 { "evmhegsmiaa",VX(4, 1321), VX_MASK, PPCSPE, { RS, RA, RB } },
2448 { "evmhegumiaa",VX(4, 1320), VX_MASK, PPCSPE, { RS, RA, RB } },
2450 { "evmhogsmfan",VX(4, 1455), VX_MASK, PPCSPE, { RS, RA, RB } },
2451 { "evmhogsmian",VX(4, 1453), VX_MASK, PPCSPE, { RS, RA, RB } },
2452 { "evmhogumian",VX(4, 1452), VX_MASK, PPCSPE, { RS, RA, RB } },
2453 { "evmhegsmfan",VX(4, 1451), VX_MASK, PPCSPE, { RS, RA, RB } },
2454 { "evmhegsmian",VX(4, 1449), VX_MASK, PPCSPE, { RS, RA, RB } },
2455 { "evmhegumian",VX(4, 1448), VX_MASK, PPCSPE, { RS, RA, RB } },
2457 { "evmwhssf", VX(4, 1095), VX_MASK, PPCSPE, { RS, RA, RB } },
2458 { "evmwhssfa", VX(4, 1127), VX_MASK, PPCSPE, { RS, RA, RB } },
2459 { "evmwhsmf", VX(4, 1103), VX_MASK, PPCSPE, { RS, RA, RB } },
2460 { "evmwhsmfa", VX(4, 1135), VX_MASK, PPCSPE, { RS, RA, RB } },
2461 { "evmwhsmi", VX(4, 1101), VX_MASK, PPCSPE, { RS, RA, RB } },
2462 { "evmwhsmia", VX(4, 1133), VX_MASK, PPCSPE, { RS, RA, RB } },
2463 { "evmwhumi", VX(4, 1100), VX_MASK, PPCSPE, { RS, RA, RB } },
2464 { "evmwhumia", VX(4, 1132), VX_MASK, PPCSPE, { RS, RA, RB } },
2466 { "evmwlumi", VX(4, 1096), VX_MASK, PPCSPE, { RS, RA, RB } },
2467 { "evmwlumia", VX(4, 1128), VX_MASK, PPCSPE, { RS, RA, RB } },
2469 { "evmwlssiaaw",VX(4, 1345), VX_MASK, PPCSPE, { RS, RA, RB } },
2470 { "evmwlsmiaaw",VX(4, 1353), VX_MASK, PPCSPE, { RS, RA, RB } },
2471 { "evmwlusiaaw",VX(4, 1344), VX_MASK, PPCSPE, { RS, RA, RB } },
2472 { "evmwlumiaaw",VX(4, 1352), VX_MASK, PPCSPE, { RS, RA, RB } },
2474 { "evmwlssianw",VX(4, 1473), VX_MASK, PPCSPE, { RS, RA, RB } },
2475 { "evmwlsmianw",VX(4, 1481), VX_MASK, PPCSPE, { RS, RA, RB } },
2476 { "evmwlusianw",VX(4, 1472), VX_MASK, PPCSPE, { RS, RA, RB } },
2477 { "evmwlumianw",VX(4, 1480), VX_MASK, PPCSPE, { RS, RA, RB } },
2479 { "evmwssf", VX(4, 1107), VX_MASK, PPCSPE, { RS, RA, RB } },
2480 { "evmwssfa", VX(4, 1139), VX_MASK, PPCSPE, { RS, RA, RB } },
2481 { "evmwsmf", VX(4, 1115), VX_MASK, PPCSPE, { RS, RA, RB } },
2482 { "evmwsmfa", VX(4, 1147), VX_MASK, PPCSPE, { RS, RA, RB } },
2483 { "evmwsmi", VX(4, 1113), VX_MASK, PPCSPE, { RS, RA, RB } },
2484 { "evmwsmia", VX(4, 1145), VX_MASK, PPCSPE, { RS, RA, RB } },
2485 { "evmwumi", VX(4, 1112), VX_MASK, PPCSPE, { RS, RA, RB } },
2486 { "evmwumia", VX(4, 1144), VX_MASK, PPCSPE, { RS, RA, RB } },
2488 { "evmwssfaa", VX(4, 1363), VX_MASK, PPCSPE, { RS, RA, RB } },
2489 { "evmwsmfaa", VX(4, 1371), VX_MASK, PPCSPE, { RS, RA, RB } },
2490 { "evmwsmiaa", VX(4, 1369), VX_MASK, PPCSPE, { RS, RA, RB } },
2491 { "evmwumiaa", VX(4, 1368), VX_MASK, PPCSPE, { RS, RA, RB } },
2493 { "evmwssfan", VX(4, 1491), VX_MASK, PPCSPE, { RS, RA, RB } },
2494 { "evmwsmfan", VX(4, 1499), VX_MASK, PPCSPE, { RS, RA, RB } },
2495 { "evmwsmian", VX(4, 1497), VX_MASK, PPCSPE, { RS, RA, RB } },
2496 { "evmwumian", VX(4, 1496), VX_MASK, PPCSPE, { RS, RA, RB } },
2498 { "evaddssiaaw",VX(4, 1217), VX_MASK, PPCSPE, { RS, RA } },
2499 { "evaddsmiaaw",VX(4, 1225), VX_MASK, PPCSPE, { RS, RA } },
2500 { "evaddusiaaw",VX(4, 1216), VX_MASK, PPCSPE, { RS, RA } },
2501 { "evaddumiaaw",VX(4, 1224), VX_MASK, PPCSPE, { RS, RA } },
2503 { "evsubfssiaaw",VX(4, 1219), VX_MASK, PPCSPE, { RS, RA } },
2504 { "evsubfsmiaaw",VX(4, 1227), VX_MASK, PPCSPE, { RS, RA } },
2505 { "evsubfusiaaw",VX(4, 1218), VX_MASK, PPCSPE, { RS, RA } },
2506 { "evsubfumiaaw",VX(4, 1226), VX_MASK, PPCSPE, { RS, RA } },
2508 { "evmra", VX(4, 1220), VX_MASK, PPCSPE, { RS, RA } },
2510 { "evdivws", VX(4, 1222), VX_MASK, PPCSPE, { RS, RA, RB } },
2511 { "evdivwu", VX(4, 1223), VX_MASK, PPCSPE, { RS, RA, RB } },
2513 { "mulli", OP(7), OP_MASK, PPCCOM, { RT, RA, SI } },
2514 { "muli", OP(7), OP_MASK, PWRCOM, { RT, RA, SI } },
2516 { "subfic", OP(8), OP_MASK, PPCCOM, { RT, RA, SI } },
2517 { "sfi", OP(8), OP_MASK, PWRCOM, { RT, RA, SI } },
2519 { "dozi", OP(9), OP_MASK, M601, { RT, RA, SI } },
2526 { "cmplwi", OPL(10,0), OPL_MASK, PPCCOM, { OBF, RA, UI } },
2527 { "cmpldi", OPL(10,1), OPL_MASK, PPC64, { OBF, RA, UI } },
2528 { "cmpli", OP(10), OP_MASK, PPC, { BF, L, RA, UI } },
2529 { "cmpli", OP(10), OP_MASK, PWRCOM, { BF, RA, UI } },
2531 { "cmpwi", OPL(11,0), OPL_MASK, PPCCOM, { OBF, RA, SI } },
2532 { "cmpdi", OPL(11,1), OPL_MASK, PPC64, { OBF, RA, SI } },
2533 { "cmpi", OP(11), OP_MASK, PPC, { BF, L, RA, SI } },
2534 { "cmpi", OP(11), OP_MASK, PWRCOM, { BF, RA, SI } },
2536 { "addic", OP(12), OP_MASK, PPCCOM, { RT, RA, SI } },
2537 { "ai", OP(12), OP_MASK, PWRCOM, { RT, RA, SI } },
2538 { "subic", OP(12), OP_MASK, PPCCOM, { RT, RA, NSI } },
2540 { "addic.", OP(13), OP_MASK, PPCCOM, { RT, RA, SI } },
2541 { "ai.", OP(13), OP_MASK, PWRCOM, { RT, RA, SI } },
2542 { "subic.", OP(13), OP_MASK, PPCCOM, { RT, RA, NSI } },
3251 { "rlwimi", M(20,0), M_MASK, PPCCOM, { RA,RS,SH,MBE,ME } },
3252 { "rlimi", M(20,0), M_MASK, PWRCOM, { RA,RS,SH,MBE,ME } },
3254 { "rlwimi.", M(20,1), M_MASK, PPCCOM, { RA,RS,SH,MBE,ME } },
3255 { "rlimi.", M(20,1), M_MASK, PWRCOM, { RA,RS,SH,MBE,ME } },
3257 { "rotlwi", MME(21,31,0), MMBME_MASK, PPCCOM, { RA, RS, SH } },
3258 { "clrlwi", MME(21,31,0), MSHME_MASK, PPCCOM, { RA, RS, MB } },
3259 { "rlwinm", M(21,0), M_MASK, PPCCOM, { RA,RS,SH,MBE,ME } },
3260 { "rlinm", M(21,0), M_MASK, PWRCOM, { RA,RS,SH,MBE,ME } },
3261 { "rotlwi.", MME(21,31,1), MMBME_MASK, PPCCOM, { RA,RS,SH } },
3262 { "clrlwi.", MME(21,31,1), MSHME_MASK, PPCCOM, { RA, RS, MB } },
3263 { "rlwinm.", M(21,1), M_MASK, PPCCOM, { RA,RS,SH,MBE,ME } },
3264 { "rlinm.", M(21,1), M_MASK, PWRCOM, { RA,RS,SH,MBE,ME } },
3266 { "rlmi", M(22,0), M_MASK, M601, { RA,RS,RB,MBE,ME } },
3267 { "rlmi.", M(22,1), M_MASK, M601, { RA,RS,RB,MBE,ME } },
3274 { "rotlw", MME(23,31,0), MMBME_MASK, PPCCOM, { RA, RS, RB } },
3275 { "rlwnm", M(23,0), M_MASK, PPCCOM, { RA,RS,RB,MBE,ME } },
3276 { "rlnm", M(23,0), M_MASK, PWRCOM, { RA,RS,RB,MBE,ME } },
3277 { "rotlw.", MME(23,31,1), MMBME_MASK, PPCCOM, { RA, RS, RB } },
3278 { "rlwnm.", M(23,1), M_MASK, PPCCOM, { RA,RS,RB,MBE,ME } },
3279 { "rlnm.", M(23,1), M_MASK, PWRCOM, { RA,RS,RB,MBE,ME } },
3282 { "ori", OP(24), OP_MASK, PPCCOM, { RA, RS, UI } },
3283 { "oril", OP(24), OP_MASK, PWRCOM, { RA, RS, UI } },
3285 { "oris", OP(25), OP_MASK, PPCCOM, { RA, RS, UI } },
3286 { "oriu", OP(25), OP_MASK, PWRCOM, { RA, RS, UI } },
3288 { "xori", OP(26), OP_MASK, PPCCOM, { RA, RS, UI } },
3289 { "xoril", OP(26), OP_MASK, PWRCOM, { RA, RS, UI } },
3291 { "xoris", OP(27), OP_MASK, PPCCOM, { RA, RS, UI } },
3292 { "xoriu", OP(27), OP_MASK, PWRCOM, { RA, RS, UI } },
3294 { "andi.", OP(28), OP_MASK, PPCCOM, { RA, RS, UI } },
3295 { "andil.", OP(28), OP_MASK, PWRCOM, { RA, RS, UI } },
3297 { "andis.", OP(29), OP_MASK, PPCCOM, { RA, RS, UI } },
3298 { "andiu.", OP(29), OP_MASK, PWRCOM, { RA, RS, UI } },
3300 { "rotldi", MD(30,0,0), MDMB_MASK, PPC64, { RA, RS, SH6 } },
3301 { "clrldi", MD(30,0,0), MDSH_MASK, PPC64, { RA, RS, MB6 } },
3302 { "rldicl", MD(30,0,0), MD_MASK, PPC64, { RA, RS, SH6, MB6 } },
3303 { "rotldi.", MD(30,0,1), MDMB_MASK, PPC64, { RA, RS, SH6 } },
3304 { "clrldi.", MD(30,0,1), MDSH_MASK, PPC64, { RA, RS, MB6 } },
3305 { "rldicl.", MD(30,0,1), MD_MASK, PPC64, { RA, RS, SH6, MB6 } },
3307 { "rldicr", MD(30,1,0), MD_MASK, PPC64, { RA, RS, SH6, ME6 } },
3308 { "rldicr.", MD(30,1,1), MD_MASK, PPC64, { RA, RS, SH6, ME6 } },
3310 { "rldic", MD(30,2,0), MD_MASK, PPC64, { RA, RS, SH6, MB6 } },
3311 { "rldic.", MD(30,2,1), MD_MASK, PPC64, { RA, RS, SH6, MB6 } },
3313 { "rldimi", MD(30,3,0), MD_MASK, PPC64, { RA, RS, SH6, MB6 } },
3314 { "rldimi.", MD(30,3,1), MD_MASK, PPC64, { RA, RS, SH6, MB6 } },
3316 { "rotld", MDS(30,8,0), MDSMB_MASK, PPC64, { RA, RS, RB } },
3317 { "rldcl", MDS(30,8,0), MDS_MASK, PPC64, { RA, RS, RB, MB6 } },
3318 { "rotld.", MDS(30,8,1), MDSMB_MASK, PPC64, { RA, RS, RB } },
3319 { "rldcl.", MDS(30,8,1), MDS_MASK, PPC64, { RA, RS, RB, MB6 } },
3321 { "rldcr", MDS(30,9,0), MDS_MASK, PPC64, { RA, RS, RB, ME6 } },
3322 { "rldcr.", MDS(30,9,1), MDS_MASK, PPC64, { RA, RS, RB, ME6 } },
3324 { "cmpw", XOPL(31,0,0), XCMPL_MASK, PPCCOM, { OBF, RA, RB } },
3325 { "cmpd", XOPL(31,0,1), XCMPL_MASK, PPC64, { OBF, RA, RB } },
3326 { "cmp", X(31,0), XCMP_MASK, PPC, { BF, L, RA, RB } },
3327 { "cmp", X(31,0), XCMPL_MASK, PWRCOM, { BF, RA, RB } },
3329 { "twlgt", XTO(31,4,TOLGT), XTO_MASK, PPCCOM, { RA, RB } },
3330 { "tlgt", XTO(31,4,TOLGT), XTO_MASK, PWRCOM, { RA, RB } },
3331 { "twllt", XTO(31,4,TOLLT), XTO_MASK, PPCCOM, { RA, RB } },
3332 { "tllt", XTO(31,4,TOLLT), XTO_MASK, PWRCOM, { RA, RB } },
3333 { "tweq", XTO(31,4,TOEQ), XTO_MASK, PPCCOM, { RA, RB } },
3334 { "teq", XTO(31,4,TOEQ), XTO_MASK, PWRCOM, { RA, RB } },
3335 { "twlge", XTO(31,4,TOLGE), XTO_MASK, PPCCOM, { RA, RB } },
3336 { "tlge", XTO(31,4,TOLGE), XTO_MASK, PWRCOM, { RA, RB } },
3337 { "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, { RA, RB } },
3338 { "tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, { RA, RB } },
3339 { "twlle", XTO(31,4,TOLLE), XTO_MASK, PPCCOM, { RA, RB } },
3340 { "tlle", XTO(31,4,TOLLE), XTO_MASK, PWRCOM, { RA, RB } },
3341 { "twlng", XTO(31,4,TOLNG), XTO_MASK, PPCCOM, { RA, RB } },
3342 { "tlng", XTO(31,4,TOLNG), XTO_MASK, PWRCOM, { RA, RB } },
3343 { "twgt", XTO(31,4,TOGT), XTO_MASK, PPCCOM, { RA, RB } },
3344 { "tgt", XTO(31,4,TOGT), XTO_MASK, PWRCOM, { RA, RB } },
3345 { "twge", XTO(31,4,TOGE), XTO_MASK, PPCCOM, { RA, RB } },
3346 { "tge", XTO(31,4,TOGE), XTO_MASK, PWRCOM, { RA, RB } },
3347 { "twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, { RA, RB } },
3348 { "tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, { RA, RB } },
3349 { "twlt", XTO(31,4,TOLT), XTO_MASK, PPCCOM, { RA, RB } },
3350 { "tlt", XTO(31,4,TOLT), XTO_MASK, PWRCOM, { RA, RB } },
3351 { "twle", XTO(31,4,TOLE), XTO_MASK, PPCCOM, { RA, RB } },
3352 { "tle", XTO(31,4,TOLE), XTO_MASK, PWRCOM, { RA, RB } },
3353 { "twng", XTO(31,4,TONG), XTO_MASK, PPCCOM, { RA, RB } },
3354 { "tng", XTO(31,4,TONG), XTO_MASK, PWRCOM, { RA, RB } },
3355 { "twne", XTO(31,4,TONE), XTO_MASK, PPCCOM, { RA, RB } },
3356 { "tne", XTO(31,4,TONE), XTO_MASK, PWRCOM, { RA, RB } },
3358 { "tw", X(31,4), X_MASK, PPCCOM, { TO, RA, RB } },
3359 { "t", X(31,4), X_MASK, PWRCOM, { TO, RA, RB } },
3361 { "subfc", XO(31,8,0,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3362 { "sf", XO(31,8,0,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3363 { "subc", XO(31,8,0,0), XO_MASK, PPC, { RT, RB, RA } },
3364 { "subfc.", XO(31,8,0,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3365 { "sf.", XO(31,8,0,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3366 { "subc.", XO(31,8,0,1), XO_MASK, PPCCOM, { RT, RB, RA } },
3367 { "subfco", XO(31,8,1,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3368 { "sfo", XO(31,8,1,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3369 { "subco", XO(31,8,1,0), XO_MASK, PPC, { RT, RB, RA } },
3370 { "subfco.", XO(31,8,1,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3371 { "sfo.", XO(31,8,1,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3372 { "subco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RB, RA } },
3374 { "mulhdu", XO(31,9,0,0), XO_MASK, PPC64, { RT, RA, RB } },
3375 { "mulhdu.", XO(31,9,0,1), XO_MASK, PPC64, { RT, RA, RB } },
3377 { "addc", XO(31,10,0,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3378 { "a", XO(31,10,0,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3379 { "addc.", XO(31,10,0,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3380 { "a.", XO(31,10,0,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3381 { "addco", XO(31,10,1,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3382 { "ao", XO(31,10,1,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3383 { "addco.", XO(31,10,1,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3384 { "ao.", XO(31,10,1,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3386 { "mulhwu", XO(31,11,0,0), XO_MASK, PPC, { RT, RA, RB } },
3387 { "mulhwu.", XO(31,11,0,1), XO_MASK, PPC, { RT, RA, RB } },
3389 { "isellt", X(31,15), X_MASK, PPCISEL, { RT, RA, RB } },
3390 { "iselgt", X(31,47), X_MASK, PPCISEL, { RT, RA, RB } },
3391 { "iseleq", X(31,79), X_MASK, PPCISEL, { RT, RA, RB } },
3392 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
3402 { "icbt", X(31,22), X_MASK, BOOKE|PPCE300, { CT, RA, RB } },
3403 { "icbt", X(31,262), XRT_MASK, PPC403, { RA, RB } },
3406 { "lx", X(31,23), X_MASK, PWRCOM, { RT, RA, RB } },
3408 { "slw", XRC(31,24,0), X_MASK, PPCCOM, { RA, RS, RB } },
3409 { "sl", XRC(31,24,0), X_MASK, PWRCOM, { RA, RS, RB } },
3410 { "slw.", XRC(31,24,1), X_MASK, PPCCOM, { RA, RS, RB } },
3411 { "sl.", XRC(31,24,1), X_MASK, PWRCOM, { RA, RS, RB } },
3413 { "cntlzw", XRC(31,26,0), XRB_MASK, PPCCOM, { RA, RS } },
3414 { "cntlz", XRC(31,26,0), XRB_MASK, PWRCOM, { RA, RS } },
3415 { "cntlzw.", XRC(31,26,1), XRB_MASK, PPCCOM, { RA, RS } },
3416 { "cntlz.", XRC(31,26,1), XRB_MASK, PWRCOM, { RA, RS } },
3418 { "sld", XRC(31,27,0), X_MASK, PPC64, { RA, RS, RB } },
3419 { "sld.", XRC(31,27,1), X_MASK, PPC64, { RA, RS, RB } },
3421 { "and", XRC(31,28,0), X_MASK, COM, { RA, RS, RB } },
3422 { "and.", XRC(31,28,1), X_MASK, COM, { RA, RS, RB } },
3424 { "maskg", XRC(31,29,0), X_MASK, M601, { RA, RS, RB } },
3425 { "maskg.", XRC(31,29,1), X_MASK, M601, { RA, RS, RB } },
3427 { "icbte", X(31,30), X_MASK, BOOKE64, { CT, RA, RB } },
3431 { "cmplw", XOPL(31,32,0), XCMPL_MASK, PPCCOM, { OBF, RA, RB } },
3432 { "cmpld", XOPL(31,32,1), XCMPL_MASK, PPC64, { OBF, RA, RB } },
3433 { "cmpl", X(31,32), XCMP_MASK, PPC, { BF, L, RA, RB } },
3434 { "cmpl", X(31,32), XCMPL_MASK, PWRCOM, { BF, RA, RB } },
3436 { "subf", XO(31,40,0,0), XO_MASK, PPC, { RT, RA, RB } },
3437 { "sub", XO(31,40,0,0), XO_MASK, PPC, { RT, RB, RA } },
3438 { "subf.", XO(31,40,0,1), XO_MASK, PPC, { RT, RA, RB } },
3439 { "sub.", XO(31,40,0,1), XO_MASK, PPC, { RT, RB, RA } },
3440 { "subfo", XO(31,40,1,0), XO_MASK, PPC, { RT, RA, RB } },
3441 { "subo", XO(31,40,1,0), XO_MASK, PPC, { RT, RB, RA } },
3442 { "subfo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RA, RB } },
3443 { "subo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RB, RA } },
3447 { "dcbst", X(31,54), XRT_MASK, PPC, { RA, RB } },
3450 { "lux", X(31,55), X_MASK, PWRCOM, { RT, RA, RB } },
3452 { "dcbste", X(31,62), XRT_MASK, BOOKE64, { RA, RB } },
3456 { "cntlzd", XRC(31,58,0), XRB_MASK, PPC64, { RA, RS } },
3457 { "cntlzd.", XRC(31,58,1), XRB_MASK, PPC64, { RA, RS } },
3459 { "andc", XRC(31,60,0), X_MASK, COM, { RA, RS, RB } },
3460 { "andc.", XRC(31,60,1), X_MASK, COM, { RA, RS, RB } },
3462 { "tdlgt", XTO(31,68,TOLGT), XTO_MASK, PPC64, { RA, RB } },
3463 { "tdllt", XTO(31,68,TOLLT), XTO_MASK, PPC64, { RA, RB } },
3464 { "tdeq", XTO(31,68,TOEQ), XTO_MASK, PPC64, { RA, RB } },
3465 { "tdlge", XTO(31,68,TOLGE), XTO_MASK, PPC64, { RA, RB } },
3466 { "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, { RA, RB } },
3467 { "tdlle", XTO(31,68,TOLLE), XTO_MASK, PPC64, { RA, RB } },
3468 { "tdlng", XTO(31,68,TOLNG), XTO_MASK, PPC64, { RA, RB } },
3469 { "tdgt", XTO(31,68,TOGT), XTO_MASK, PPC64, { RA, RB } },
3470 { "tdge", XTO(31,68,TOGE), XTO_MASK, PPC64, { RA, RB } },
3471 { "tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, { RA, RB } },
3472 { "tdlt", XTO(31,68,TOLT), XTO_MASK, PPC64, { RA, RB } },
3473 { "tdle", XTO(31,68,TOLE), XTO_MASK, PPC64, { RA, RB } },
3474 { "tdng", XTO(31,68,TONG), XTO_MASK, PPC64, { RA, RB } },
3475 { "tdne", XTO(31,68,TONE), XTO_MASK, PPC64, { RA, RB } },
3476 { "td", X(31,68), X_MASK, PPC64, { TO, RA, RB } },
3478 { "mulhd", XO(31,73,0,0), XO_MASK, PPC64, { RT, RA, RB } },
3479 { "mulhd.", XO(31,73,0,1), XO_MASK, PPC64, { RT, RA, RB } },
3481 { "mulhw", XO(31,75,0,0), XO_MASK, PPC, { RT, RA, RB } },
3482 { "mulhw.", XO(31,75,0,1), XO_MASK, PPC, { RT, RA, RB } },
3484 { "dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440, { RA, RS, RB } },
3485 { "dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440, { RA, RS, RB } },
3493 { "dcbfl", XOPL(31,86,1), XRT_MASK, POWER5, { RA, RB } },
3494 { "dcbf", X(31,86), XLRT_MASK, PPC, { RA, RB, XRT_L } },
3498 { "dcbfe", X(31,94), XRT_MASK, BOOKE64, { RA, RB } },
3502 { "neg", XO(31,104,0,0), XORB_MASK, COM, { RT, RA } },
3503 { "neg.", XO(31,104,0,1), XORB_MASK, COM, { RT, RA } },
3504 { "nego", XO(31,104,1,0), XORB_MASK, COM, { RT, RA } },
3505 { "nego.", XO(31,104,1,1), XORB_MASK, COM, { RT, RA } },
3507 { "mul", XO(31,107,0,0), XO_MASK, M601, { RT, RA, RB } },
3508 { "mul.", XO(31,107,0,1), XO_MASK, M601, { RT, RA, RB } },
3509 { "mulo", XO(31,107,1,0), XO_MASK, M601, { RT, RA, RB } },
3510 { "mulo.", XO(31,107,1,1), XO_MASK, M601, { RT, RA, RB } },
3514 { "clf", X(31,118), XTO_MASK, POWER, { RA, RB } },
3518 { "popcntb", X(31,122), XRB_MASK, POWER5, { RA, RS } },
3520 { "not", XRC(31,124,0), X_MASK, COM, { RA, RS, RBS } },
3521 { "nor", XRC(31,124,0), X_MASK, COM, { RA, RS, RB } },
3522 { "not.", XRC(31,124,1), X_MASK, COM, { RA, RS, RBS } },
3523 { "nor.", XRC(31,124,1), X_MASK, COM, { RA, RS, RB } },
3531 { "dcbtstls",X(31,134), X_MASK, PPCCHLK, { CT, RA, RB }},
3533 { "subfe", XO(31,136,0,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3534 { "sfe", XO(31,136,0,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3535 { "subfe.", XO(31,136,0,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3536 { "sfe.", XO(31,136,0,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3537 { "subfeo", XO(31,136,1,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3538 { "sfeo", XO(31,136,1,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3539 { "subfeo.", XO(31,136,1,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3540 { "sfeo.", XO(31,136,1,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3542 { "adde", XO(31,138,0,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3543 { "ae", XO(31,138,0,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3544 { "adde.", XO(31,138,0,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3545 { "ae.", XO(31,138,0,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3546 { "addeo", XO(31,138,1,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3547 { "aeo", XO(31,138,1,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3548 { "addeo.", XO(31,138,1,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3549 { "aeo.", XO(31,138,1,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3551 { "dcbtstlse",X(31,142),X_MASK, PPCCHLK64, { CT, RA, RB }},
3564 { "stx", X(31,151), X_MASK, PWRCOM, { RS, RA, RB } },
3570 { "slq", XRC(31,152,0), X_MASK, M601, { RA, RS, RB } },
3571 { "slq.", XRC(31,152,1), X_MASK, M601, { RA, RS, RB } },
3573 { "sle", XRC(31,153,0), X_MASK, M601, { RA, RS, RB } },
3574 { "sle.", XRC(31,153,1), X_MASK, M601, { RA, RS, RB } },
3576 { "prtyw", X(31,154), XRB_MASK, POWER6, { RA, RS } },
3580 { "dcbtls", X(31,166), X_MASK, PPCCHLK, { CT, RA, RB }},
3581 { "dcbtlse", X(31,174), X_MASK, PPCCHLK64, { CT, RA, RB }},
3590 { "sliq", XRC(31,184,0), X_MASK, M601, { RA, RS, SH } },
3591 { "sliq.", XRC(31,184,1), X_MASK, M601, { RA, RS, SH } },
3593 { "prtyd", X(31,186), XRB_MASK, POWER6, { RA, RS } },
3597 { "subfze", XO(31,200,0,0), XORB_MASK, PPCCOM, { RT, RA } },
3598 { "sfze", XO(31,200,0,0), XORB_MASK, PWRCOM, { RT, RA } },
3599 { "subfze.", XO(31,200,0,1), XORB_MASK, PPCCOM, { RT, RA } },
3600 { "sfze.", XO(31,200,0,1), XORB_MASK, PWRCOM, { RT, RA } },
3601 { "subfzeo", XO(31,200,1,0), XORB_MASK, PPCCOM, { RT, RA } },
3602 { "sfzeo", XO(31,200,1,0), XORB_MASK, PWRCOM, { RT, RA } },
3603 { "subfzeo.",XO(31,200,1,1), XORB_MASK, PPCCOM, { RT, RA } },
3604 { "sfzeo.", XO(31,200,1,1), XORB_MASK, PWRCOM, { RT, RA } },
3606 { "addze", XO(31,202,0,0), XORB_MASK, PPCCOM, { RT, RA } },
3607 { "aze", XO(31,202,0,0), XORB_MASK, PWRCOM, { RT, RA } },
3608 { "addze.", XO(31,202,0,1), XORB_MASK, PPCCOM, { RT, RA } },
3609 { "aze.", XO(31,202,0,1), XORB_MASK, PWRCOM, { RT, RA } },
3610 { "addzeo", XO(31,202,1,0), XORB_MASK, PPCCOM, { RT, RA } },
3611 { "azeo", XO(31,202,1,0), XORB_MASK, PWRCOM, { RT, RA } },
3612 { "addzeo.", XO(31,202,1,1), XORB_MASK, PPCCOM, { RT, RA } },
3613 { "azeo.", XO(31,202,1,1), XORB_MASK, PWRCOM, { RT, RA } },
3621 { "sllq", XRC(31,216,0), X_MASK, M601, { RA, RS, RB } },
3622 { "sllq.", XRC(31,216,1), X_MASK, M601, { RA, RS, RB } },
3624 { "sleq", XRC(31,217,0), X_MASK, M601, { RA, RS, RB } },
3625 { "sleq.", XRC(31,217,1), X_MASK, M601, { RA, RS, RB } },
3629 { "icblc", X(31,230), X_MASK, PPCCHLK, { CT, RA, RB }},
3631 { "subfme", XO(31,232,0,0), XORB_MASK, PPCCOM, { RT, RA } },
3632 { "sfme", XO(31,232,0,0), XORB_MASK, PWRCOM, { RT, RA } },
3633 { "subfme.", XO(31,232,0,1), XORB_MASK, PPCCOM, { RT, RA } },
3634 { "sfme.", XO(31,232,0,1), XORB_MASK, PWRCOM, { RT, RA } },
3635 { "subfmeo", XO(31,232,1,0), XORB_MASK, PPCCOM, { RT, RA } },
3636 { "sfmeo", XO(31,232,1,0), XORB_MASK, PWRCOM, { RT, RA } },
3637 { "subfmeo.",XO(31,232,1,1), XORB_MASK, PPCCOM, { RT, RA } },
3638 { "sfmeo.", XO(31,232,1,1), XORB_MASK, PWRCOM, { RT, RA } },
3640 { "mulld", XO(31,233,0,0), XO_MASK, PPC64, { RT, RA, RB } },
3641 { "mulld.", XO(31,233,0,1), XO_MASK, PPC64, { RT, RA, RB } },
3642 { "mulldo", XO(31,233,1,0), XO_MASK, PPC64, { RT, RA, RB } },
3643 { "mulldo.", XO(31,233,1,1), XO_MASK, PPC64, { RT, RA, RB } },
3645 { "addme", XO(31,234,0,0), XORB_MASK, PPCCOM, { RT, RA } },
3646 { "ame", XO(31,234,0,0), XORB_MASK, PWRCOM, { RT, RA } },
3647 { "addme.", XO(31,234,0,1), XORB_MASK, PPCCOM, { RT, RA } },
3648 { "ame.", XO(31,234,0,1), XORB_MASK, PWRCOM, { RT, RA } },
3649 { "addmeo", XO(31,234,1,0), XORB_MASK, PPCCOM, { RT, RA } },
3650 { "ameo", XO(31,234,1,0), XORB_MASK, PWRCOM, { RT, RA } },
3651 { "addmeo.", XO(31,234,1,1), XORB_MASK, PPCCOM, { RT, RA } },
3652 { "ameo.", XO(31,234,1,1), XORB_MASK, PWRCOM, { RT, RA } },
3654 { "mullw", XO(31,235,0,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3655 { "muls", XO(31,235,0,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3656 { "mullw.", XO(31,235,0,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3657 { "muls.", XO(31,235,0,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3658 { "mullwo", XO(31,235,1,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3659 { "mulso", XO(31,235,1,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3660 { "mullwo.", XO(31,235,1,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3661 { "mulso.", XO(31,235,1,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3663 { "icblce", X(31,238), X_MASK, PPCCHLK64, { CT, RA, RB }},
3667 { "dcbtst", X(31,246), X_MASK, PPC, { CT, RA, RB } },
3671 { "slliq", XRC(31,248,0), X_MASK, M601, { RA, RS, SH } },
3672 { "slliq.", XRC(31,248,1), X_MASK, M601, { RA, RS, SH } },
3674 { "dcbtste", X(31,253), X_MASK, BOOKE64, { CT, RA, RB } },
3678 { "mfdcrx", X(31,259), X_MASK, BOOKE, { RS, RA } },
3680 { "doz", XO(31,264,0,0), XO_MASK, M601, { RT, RA, RB } },
3681 { "doz.", XO(31,264,0,1), XO_MASK, M601, { RT, RA, RB } },
3682 { "dozo", XO(31,264,1,0), XO_MASK, M601, { RT, RA, RB } },
3683 { "dozo.", XO(31,264,1,1), XO_MASK, M601, { RT, RA, RB } },
3685 { "add", XO(31,266,0,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3686 { "cax", XO(31,266,0,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3687 { "add.", XO(31,266,0,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3688 { "cax.", XO(31,266,0,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3689 { "addo", XO(31,266,1,0), XO_MASK, PPCCOM, { RT, RA, RB } },
3690 { "caxo", XO(31,266,1,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3691 { "addo.", XO(31,266,1,1), XO_MASK, PPCCOM, { RT, RA, RB } },
3692 { "caxo.", XO(31,266,1,1), XO_MASK, PWRCOM, { RT, RA, RB } },
3696 { "mfapidi", X(31,275), X_MASK, BOOKE, { RT, RA } },
3698 { "lscbx", XRC(31,277,0), X_MASK, M601, { RT, RA, RB } },
3699 { "lscbx.", XRC(31,277,1), X_MASK, M601, { RT, RA, RB } },
3701 { "dcbt", X(31,278), X_MASK, PPC, { CT, RA, RB } },
3705 { "eqv", XRC(31,284,0), X_MASK, COM, { RA, RS, RB } },
3706 { "eqv.", XRC(31,284,1), X_MASK, COM, { RA, RS, RB } },
3708 { "dcbte", X(31,286), X_MASK, BOOKE64, { CT, RA, RB } },
3715 { "eciwx", X(31,310), X_MASK, PPC, { RT, RA, RB } },
3719 { "xor", XRC(31,316,0), X_MASK, COM, { RA, RS, RB } },
3720 { "xor.", XRC(31,316,1), X_MASK, COM, { RA, RS, RB } },
3760 { "div", XO(31,331,0,0), XO_MASK, M601, { RT, RA, RB } },
3761 { "div.", XO(31,331,0,1), XO_MASK, M601, { RT, RA, RB } },
3762 { "divo", XO(31,331,1,0), XO_MASK, M601, { RT, RA, RB } },
3763 { "divo.", XO(31,331,1,1), XO_MASK, M601, { RT, RA, RB } },
3958 { "dst", XDSS(31,342,0), XDSS_MASK, PPCVEC, { RA, RB, STRM } },
3959 { "dstt", XDSS(31,342,1), XDSS_MASK, PPCVEC, { RA, RB, STRM } },
3965 { "dstst", XDSS(31,374,0), XDSS_MASK, PPCVEC, { RA, RB, STRM } },
3966 { "dststt", XDSS(31,374,1), XDSS_MASK, PPCVEC, { RA, RB, STRM } },
3968 { "dccci", X(31,454), XRT_MASK, PPC403|PPC440, { RA, RB } },
3970 { "abs", XO(31,360,0,0), XORB_MASK, M601, { RT, RA } },
3971 { "abs.", XO(31,360,0,1), XORB_MASK, M601, { RT, RA } },
3972 { "abso", XO(31,360,1,0), XORB_MASK, M601, { RT, RA } },
3973 { "abso.", XO(31,360,1,1), XORB_MASK, M601, { RT, RA } },
3975 { "divs", XO(31,363,0,0), XO_MASK, M601, { RT, RA, RB } },
3976 { "divs.", XO(31,363,0,1), XO_MASK, M601, { RT, RA, RB } },
3977 { "divso", XO(31,363,1,0), XO_MASK, M601, { RT, RA, RB } },
3978 { "divso.", XO(31,363,1,1), XO_MASK, M601, { RT, RA, RB } },
3988 { "mtdcrx", X(31,387), X_MASK, BOOKE, { RA, RS } },
3990 { "dcblc", X(31,390), X_MASK, PPCCHLK, { CT, RA, RB }},
3992 { "subfe64", XO(31,392,0,0), XO_MASK, BOOKE64, { RT, RA, RB } },
3993 { "subfe64o",XO(31,392,1,0), XO_MASK, BOOKE64, { RT, RA, RB } },
3995 { "adde64", XO(31,394,0,0), XO_MASK, BOOKE64, { RT, RA, RB } },
3996 { "adde64o", XO(31,394,1,0), XO_MASK, BOOKE64, { RT, RA, RB } },
3998 { "dcblce", X(31,398), X_MASK, PPCCHLK64, { CT, RA, RB }},
4004 { "cmpb", X(31,508), X_MASK, POWER6, { RA, RS, RB } },
4006 { "lfqx", X(31,791), X_MASK, POWER2, { FRT, RA, RB } },
4008 { "lfdpx", X(31,791), X_MASK, POWER6, { FRT, RA, RB } },
4010 { "lfqux", X(31,823), X_MASK, POWER2, { FRT, RA, RB } },
4012 { "stfqx", X(31,919), X_MASK, POWER2, { FRS, RA, RB } },
4014 { "stfdpx", X(31,919), X_MASK, POWER6, { FRS, RA, RB } },
4016 { "stfqux", X(31,951), X_MASK, POWER2, { FRS, RA, RB } },
4018 { "orc", XRC(31,412,0), X_MASK, COM, { RA, RS, RB } },
4019 { "orc.", XRC(31,412,1), X_MASK, COM, { RA, RS, RB } },
4021 { "sradi", XS(31,413,0), XS_MASK, PPC64, { RA, RS, SH6 } },
4022 { "sradi.", XS(31,413,1), XS_MASK, PPC64, { RA, RS, SH6 } },
4028 { "ecowx", X(31,438), X_MASK, PPC, { RT, RA, RB } },
4034 { "mr", XRC(31,444,0), X_MASK, COM, { RA, RS, RBS } },
4035 { "or", XRC(31,444,0), X_MASK, COM, { RA, RS, RB } },
4036 { "mr.", XRC(31,444,1), X_MASK, COM, { RA, RS, RBS } },
4037 { "or.", XRC(31,444,1), X_MASK, COM, { RA, RS, RB } },
4075 { "subfze64",XO(31,456,0,0), XORB_MASK, BOOKE64, { RT, RA } },
4076 { "subfze64o",XO(31,456,1,0), XORB_MASK, BOOKE64, { RT, RA } },
4078 { "divdu", XO(31,457,0,0), XO_MASK, PPC64, { RT, RA, RB } },
4079 { "divdu.", XO(31,457,0,1), XO_MASK, PPC64, { RT, RA, RB } },
4080 { "divduo", XO(31,457,1,0), XO_MASK, PPC64, { RT, RA, RB } },
4081 { "divduo.", XO(31,457,1,1), XO_MASK, PPC64, { RT, RA, RB } },
4083 { "addze64", XO(31,458,0,0), XORB_MASK, BOOKE64, { RT, RA } },
4084 { "addze64o",XO(31,458,1,0), XORB_MASK, BOOKE64, { RT, RA } },
4086 { "divwu", XO(31,459,0,0), XO_MASK, PPC, { RT, RA, RB } },
4087 { "divwu.", XO(31,459,0,1), XO_MASK, PPC, { RT, RA, RB } },
4088 { "divwuo", XO(31,459,1,0), XO_MASK, PPC, { RT, RA, RB } },
4089 { "divwuo.", XO(31,459,1,1), XO_MASK, PPC, { RT, RA, RB } },
4245 { "dcbi", X(31,470), XRT_MASK, PPC, { RA, RB } },
4247 { "nand", XRC(31,476,0), X_MASK, COM, { RA, RS, RB } },
4248 { "nand.", XRC(31,476,1), X_MASK, COM, { RA, RS, RB } },
4250 { "dcbie", X(31,478), XRT_MASK, BOOKE64, { RA, RB } },
4252 { "dcread", X(31,486), X_MASK, PPC403|PPC440, { RT, RA, RB }},
4256 { "icbtls", X(31,486), X_MASK, PPCCHLK, { CT, RA, RB }},
4258 { "nabs", XO(31,488,0,0), XORB_MASK, M601, { RT, RA } },
4259 { "subfme64",XO(31,488,0,0), XORB_MASK, BOOKE64, { RT, RA } },
4260 { "nabs.", XO(31,488,0,1), XORB_MASK, M601, { RT, RA } },
4261 { "nabso", XO(31,488,1,0), XORB_MASK, M601, { RT, RA } },
4262 { "subfme64o",XO(31,488,1,0), XORB_MASK, BOOKE64, { RT, RA } },
4263 { "nabso.", XO(31,488,1,1), XORB_MASK, M601, { RT, RA } },
4265 { "divd", XO(31,489,0,0), XO_MASK, PPC64, { RT, RA, RB } },
4266 { "divd.", XO(31,489,0,1), XO_MASK, PPC64, { RT, RA, RB } },
4267 { "divdo", XO(31,489,1,0), XO_MASK, PPC64, { RT, RA, RB } },
4268 { "divdo.", XO(31,489,1,1), XO_MASK, PPC64, { RT, RA, RB } },
4270 { "addme64", XO(31,490,0,0), XORB_MASK, BOOKE64, { RT, RA } },
4271 { "addme64o",XO(31,490,1,0), XORB_MASK, BOOKE64, { RT, RA } },
4273 { "divw", XO(31,491,0,0), XO_MASK, PPC, { RT, RA, RB } },
4274 { "divw.", XO(31,491,0,1), XO_MASK, PPC, { RT, RA, RB } },
4275 { "divwo", XO(31,491,1,0), XO_MASK, PPC, { RT, RA, RB } },
4276 { "divwo.", XO(31,491,1,1), XO_MASK, PPC, { RT, RA, RB } },
4278 { "icbtlse", X(31,494), X_MASK, PPCCHLK64, { CT, RA, RB }},
4282 { "cli", X(31,502), XRB_MASK, POWER, { RT, RA } },
4284 { "stdcxe.", XRC(31,511,1), X_MASK, BOOKE64, { RS, RA, RB } },
4291 { "clcs", X(31,531), XRB_MASK, M601, { RT, RA } },
4296 { "lsx", X(31,533), X_MASK, PWRCOM, { RT, RA, RB } },
4299 { "lbrx", X(31,534), X_MASK, PWRCOM, { RT, RA, RB } },
4303 { "srw", XRC(31,536,0), X_MASK, PPCCOM, { RA, RS, RB } },
4304 { "sr", XRC(31,536,0), X_MASK, PWRCOM, { RA, RS, RB } },
4305 { "srw.", XRC(31,536,1), X_MASK, PPCCOM, { RA, RS, RB } },
4306 { "sr.", XRC(31,536,1), X_MASK, PWRCOM, { RA, RS, RB } },
4308 { "rrib", XRC(31,537,0), X_MASK, M601, { RA, RS, RB } },
4309 { "rrib.", XRC(31,537,1), X_MASK, M601, { RA, RS, RB } },
4311 { "srd", XRC(31,539,0), X_MASK, PPC64, { RA, RS, RB } },
4312 { "srd.", XRC(31,539,1), X_MASK, PPC64, { RA, RS, RB } },
4314 { "maskir", XRC(31,541,0), X_MASK, M601, { RA, RS, RB } },
4315 { "maskir.", XRC(31,541,1), X_MASK, M601, { RA, RS, RB } },
4346 { "mfsri", X(31,627), X_MASK, PWRCOM, { RT, RA, RB } },
4348 { "dclst", X(31,630), XRB_MASK, PWRCOM, { RS, RA } },
4366 { "srq", XRC(31,664,0), X_MASK, M601, { RA, RS, RB } },
4367 { "srq.", XRC(31,664,1), X_MASK, M601, { RA, RS, RB } },
4369 { "sre", XRC(31,665,0), X_MASK, M601, { RA, RS, RB } },
4370 { "sre.", XRC(31,665,1), X_MASK, M601, { RA, RS, RB } },
4378 { "sriq", XRC(31,696,0), X_MASK, M601, { RA, RS, SH } },
4379 { "sriq.", XRC(31,696,1), X_MASK, M601, { RA, RS, SH } },
4388 { "srlq", XRC(31,728,0), X_MASK, M601, { RA, RS, RB } },
4389 { "srlq.", XRC(31,728,1), X_MASK, M601, { RA, RS, RB } },
4391 { "sreq", XRC(31,729,0), X_MASK, M601, { RA, RS, RB } },
4392 { "sreq.", XRC(31,729,1), X_MASK, M601, { RA, RS, RB } },
4398 { "dcba", X(31,758), XRT_MASK, PPC405 | BOOKE, { RA, RB } },
4402 { "srliq", XRC(31,760,0), X_MASK, M601, { RA, RS, SH } },
4403 { "srliq.", XRC(31,760,1), X_MASK, M601, { RA, RS, SH } },
4405 { "dcbae", X(31,766), XRT_MASK, BOOKE64, { RA, RB } },
4409 { "tlbivax", X(31,786), XRT_MASK, BOOKE, { RA, RB } },
4410 { "tlbivaxe",X(31,787), XRT_MASK, BOOKE64, { RA, RB } },
4416 { "sraw", XRC(31,792,0), X_MASK, PPCCOM, { RA, RS, RB } },
4417 { "sra", XRC(31,792,0), X_MASK, PWRCOM, { RA, RS, RB } },
4418 { "sraw.", XRC(31,792,1), X_MASK, PPCCOM, { RA, RS, RB } },
4419 { "sra.", XRC(31,792,1), X_MASK, PWRCOM, { RA, RS, RB } },
4421 { "srad", XRC(31,794,0), X_MASK, PPC64, { RA, RS, RB } },
4422 { "srad.", XRC(31,794,1), X_MASK, PPC64, { RA, RS, RB } },
4429 { "rac", X(31,818), X_MASK, PWRCOM, { RT, RA, RB } },
4436 { "srawi", XRC(31,824,0), X_MASK, PPCCOM, { RA, RS, SH } },
4437 { "srai", XRC(31,824,0), X_MASK, PWRCOM, { RA, RS, SH } },
4438 { "srawi.", XRC(31,824,1), X_MASK, PPCCOM, { RA, RS, SH } },
4439 { "srai.", XRC(31,824,1), X_MASK, PWRCOM, { RA, RS, SH } },
4452 { "tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE, { RTO, RA, RB } },
4453 { "tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE, { RTO, RA, RB } },
4454 { "tlbsxe", XRC(31,915,0), X_MASK, BOOKE64, { RA, RB } },
4455 { "tlbsxe.", XRC(31,915,1), X_MASK, BOOKE64, { RA, RB } },
4463 { "sraq", XRC(31,920,0), X_MASK, M601, { RA, RS, RB } },
4464 { "sraq.", XRC(31,920,1), X_MASK, M601, { RA, RS, RB } },
4466 { "srea", XRC(31,921,0), X_MASK, M601, { RA, RS, RB } },
4467 { "srea.", XRC(31,921,1), X_MASK, M601, { RA, RS, RB } },
4469 { "extsh", XRC(31,922,0), XRB_MASK, PPCCOM, { RA, RS } },
4470 { "exts", XRC(31,922,0), XRB_MASK, PWRCOM, { RA, RS } },
4471 { "extsh.", XRC(31,922,1), XRB_MASK, PPCCOM, { RA, RS } },
4472 { "exts.", XRC(31,922,1), XRB_MASK, PWRCOM, { RA, RS } },
4478 { "tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, { RT, RA } },
4479 { "tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, { RT, RA } },
4484 { "sraiq", XRC(31,952,0), X_MASK, M601, { RA, RS, SH } },
4485 { "sraiq.", XRC(31,952,1), X_MASK, M601, { RA, RS, SH } },
4487 { "extsb", XRC(31,954,0), XRB_MASK, PPC, { RA, RS} },
4488 { "extsb.", XRC(31,954,1), XRB_MASK, PPC, { RA, RS} },
4492 { "iccci", X(31,966), XRT_MASK, PPC403|PPC440, { RA, RB } },
4494 { "tlbwehi", XTLB(31,978,0), XTLB_MASK, PPC403, { RT, RA } },
4495 { "tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, { RT, RA } },
4501 { "icbi", X(31,982), XRT_MASK, PPC, { RA, RB } },
4505 { "extsw", XRC(31,986,0), XRB_MASK, PPC64 | BOOKE64,{ RA, RS } },
4506 { "extsw.", XRC(31,986,1), XRB_MASK, PPC64, { RA, RS } },
4508 { "icread", X(31,998), XRT_MASK, PPC403|PPC440, { RA, RB } },
4510 { "icbie", X(31,990), XRT_MASK, BOOKE64, { RA, RB } },
4517 { "dcbzl", XOPL(31,1014,1), XRT_MASK,POWER4, { RA, RB } },
4518 { "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
4519 { "dclz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
4521 { "dcbze", X(31,1022), XRT_MASK, BOOKE64, { RA, RB } },
4523 { "lvebx", X(31, 7), X_MASK, PPCVEC, { VD, RA, RB } },
4524 { "lvehx", X(31, 39), X_MASK, PPCVEC, { VD, RA, RB } },
4525 { "lvewx", X(31, 71), X_MASK, PPCVEC, { VD, RA, RB } },
4526 { "lvsl", X(31, 6), X_MASK, PPCVEC, { VD, RA, RB } },
4527 { "lvsr", X(31, 38), X_MASK, PPCVEC, { VD, RA, RB } },
4528 { "lvx", X(31, 103), X_MASK, PPCVEC, { VD, RA, RB } },
4529 { "lvxl", X(31, 359), X_MASK, PPCVEC, { VD, RA, RB } },
4530 { "stvebx", X(31, 135), X_MASK, PPCVEC, { VS, RA, RB } },
4531 { "stvehx", X(31, 167), X_MASK, PPCVEC, { VS, RA, RB } },
4532 { "stvewx", X(31, 199), X_MASK, PPCVEC, { VS, RA, RB } },
4533 { "stvx", X(31, 231), X_MASK, PPCVEC, { VS, RA, RB } },
4534 { "stvxl", X(31, 487), X_MASK, PPCVEC, { VS, RA, RB } },
4729 { "stfq", OP(60), OP_MASK, POWER2, { FRS, D, RA } },
4731 { "stfqu", OP(61), OP_MASK, POWER2, { FRS, D, RA } },
374 #define RA global() macro
H A Dspu-opc.c32 QUAD WORD (0,RC,RB,RA,RT) latency
H A Dxmon.c2855 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n", dump_tlb_book3e()
/linux-4.1.27/arch/powerpc/crypto/
H A Dsha1-powerpc-asm.S16 #define RA(t) ((((t)+4)%6)+7) define
31 rotlwi RT(t),RA(t),5; \
43 rotlwi RT(t),RA(t),5; \
57 rotlwi RT(t),RA(t),5; \
67 rotlwi RT(t),RA(t),5; \
82 rotlwi RT(t),RA(t),5; \
121 lwz RA(0),0(r3) /* A */
168 add RA(0),RA(80),r16
170 stw RA(0),0(r3)
/linux-4.1.27/arch/arm/crypto/
H A Dsha512-armv7-neon.S32 #define RA d0 define
284 vld1.64 {RA-RD}, [%r0]!;
310 rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1, RW01q, RW2,
315 rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1, RW01q, RW2,
318 rounds2_0_63(RG, RH, RA, RB, RC, RD, RE, RF, RW2, RW3, RW23q, RW4,
320 rounds2_0_63(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5, RW45q, RW6,
322 rounds2_0_63(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7, RW67q, RW8,
324 rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9, RW89q, RW10,
326 rounds2_0_63(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11, RW1011q, RW12,
329 rounds2_0_63(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13, RW1213q, RW14,
332 rounds2_0_63(RC, RD, RE, RF, RG, RH, RA, RB, RW14, RW15, RW1415q, RW0,
338 rounds2_64_79(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1,
340 rounds2_64_79(RG, RH, RA, RB, RC, RD, RE, RF, RW2, RW3,
344 rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5,
346 rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7,
353 rounds2_64_79(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9,
354 vadd_rg_RT0, RA, vadd_rg_RT1, RA);
355 rounds2_64_79(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11,
362 rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13,
364 rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW14, RW15,
371 vadd_rg_RT0(RA);
372 vadd_rg_RT1(RA);
384 vadd.u64 RA, RT0;
394 vst1.64 {RA-RD}, [%r0]!;
403 rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5,
405 rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7,
407 rounds2_64_79(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9,
408 vadd_rg_RT0, RA, vadd_rg_RT1, RA);
409 rounds2_64_79(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11,
411 rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13,
413 rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW14, RW15,
418 vadd_rg_RT0(RA);
420 vadd_rg_RT1(RA);
423 vadd.u64 RA, RW0;
433 vst1.64 {RA-RD}, [%r0]!;
/linux-4.1.27/include/uapi/linux/
H A Dipv6_route.h21 #define RTF_ADDRCONF 0x00040000 /* addrconf route - RA */
22 #define RTF_PREFIX_RT 0x00080000 /* A prefix only route - RA */
28 #define RTF_ROUTEINFO 0x00800000 /* route information - RA */
/linux-4.1.27/arch/powerpc/kvm/
H A Dbook3s_32_sr.S103 #define KVM_LOAD_BAT(n, reg, RA, RB) \
104 lwz RA,(n*16)+0(reg); \
106 mtspr SPRN_IBAT##n##U,RA; \
108 lwz RA,(n*16)+8(reg); \
110 mtspr SPRN_DBAT##n##U,RA; \
/linux-4.1.27/arch/x86/vdso/vdso32/
H A Dsysenter.S89 .byte 0x08 /* RA at offset 8 now */
92 .byte 0x0c /* RA at offset 12 now */
95 .byte 0x10 /* RA at offset 16 now */
100 .byte 0x0c /* RA at offset 12 now */
104 .byte 0x08 /* RA at offset 8 now */
107 .byte 0x04 /* RA at offset 4 now */
/linux-4.1.27/drivers/net/wireless/mwifiex/
H A Dwmm.c92 * The function also initializes the list with the provided RA.
139 * This function allocates and adds a RA list for all TIDs
140 * with the given RA.
458 * This function deletes all packets in an RA list node.
462 * cleanup. The RA list node itself is freed at the end.
476 * This function deletes all packets in an RA list.
478 * Each nodes in the RA list are freed individually first, and then
479 * the RA list itself is freed.
492 * This function deletes all packets in all RA lists.
507 * This function deletes all route addresses from all RA lists.
539 * - All packets in RA lists
543 * - All RA lists
576 * This function retrieves a particular RA list node, matching with the
577 * given TID and RA address.
595 * This function retrieves an RA list node for a given TID and
596 * RA address pair.
616 * This function deletes RA list nodes for given mac for all TIDs.
642 * This function checks if a particular RA list node exists in a given TID
666 * Otherwise, the correct RA list node is located and the packet
937 * This function retrieves the highest priority RA list table pointer.
1131 * This function checks if the first packet in the given RA list
H A Duap_txrx.c27 /* This function checks if particular RA list has packets more than low bridge
28 * packet threshold and then deletes packet from this RA list.
29 * Function deletes packets from such RA list and returns true. If no such list
64 /* This function deletes packets from particular RA List. RA list index
65 * from which packets are deleted is preserved so that packets from next RA
209 * If a packet is unicast and RA is present in associated station list,
211 * If a packet is unicast and RA is not in associated station list,
H A Dwmm.h52 * This function retrieves the TID of the given RA list.
83 * This function checks if a RA list is empty or not.
H A D11n.c500 * table which matches the given RA/TID pair.
523 * given RA/TID pair.
555 * This function sends an add BA request to the given TID/RA pair.
616 * This function sends a delete BA request to the given TID/RA pair.
724 * This function retrieves the entry for specific tx BA stream table by RA and
H A D11n.h141 * Upon successfully locating, both the TID and the RA are returned.
H A D11n_aggr.c152 * from the RA list. Each individual buffer is encapsulated as an AMSDU
H A Dmain.h1108 * This function checks if the queuing is RA based or not.
1114 * Currently we assume if we are in Infra, then DA=RA. This might not be mwifiex_queuing_ra_based()
H A D11n_rxreorder.c687 "event: TID, RA not found in table\n"); mwifiex_del_ba_tbl()
H A Ddebugfs.c407 * - Tx BA stream table (TID, RA)
H A Dutil.c482 * This function should be called after acquiring RA list spinlock.
/linux-4.1.27/net/ipv6/
H A Dndisc.c22 * of an RA.
1084 "RA: %s, dev: %s\n", ndisc_router_discovery()
1087 ND_PRINTK(2, warn, "RA: source address is not link-local\n"); ndisc_router_discovery()
1091 ND_PRINTK(2, warn, "RA: packet too short\n"); ndisc_router_discovery()
1097 ND_PRINTK(2, warn, "RA: from host or unauthorized router\n"); ndisc_router_discovery()
1108 ND_PRINTK(0, err, "RA: can't find inet6 device for %s\n", ndisc_router_discovery()
1114 ND_PRINTK(2, warn, "RA: invalid ND options\n"); ndisc_router_discovery()
1120 "RA: %s, did not accept ra for dev: %s\n", ndisc_router_discovery()
1129 "RA: %s, nodetype is NODEFAULT, dev: %s\n", ndisc_router_discovery()
1137 * flag that an RA was received after an RS was sent ndisc_router_discovery()
1145 * received RA message (RFC 2462) -- yoshfuji ndisc_router_discovery()
1156 "RA: %s, defrtr is false for dev: %s\n", ndisc_router_discovery()
1161 /* Do not accept RA with source-addr found on local machine unless ndisc_router_discovery()
1168 "RA from local address detected on dev: %s: default router ignored\n", ndisc_router_discovery()
1189 "RA: %s got default router without neighbour\n", ndisc_router_discovery()
1200 ND_PRINTK(3, info, "RA: rt: %p lifetime: %d, for dev: %s\n", ndisc_router_discovery()
1203 ND_PRINTK(3, info, "RA: adding default router\n"); ndisc_router_discovery()
1208 "RA: %s failed to add default route\n", ndisc_router_discovery()
1216 "RA: %s got default router without neighbour\n", ndisc_router_discovery()
1236 ND_PRINTK(2, warn, "RA: Got route advertisement with lower hop_limit than minimum\n"); ndisc_router_discovery()
1293 "RA: invalid link-layer address length\n"); ndisc_router_discovery()
1306 "RA: %s, accept_ra is false for dev: %s\n", ndisc_router_discovery()
1316 "RA from local address detected on dev: %s: router info ignored.\n", ndisc_router_discovery()
1349 "RA: %s, nodetype is NODEFAULT (interior routes), dev: %s\n", ndisc_router_discovery()
1374 ND_PRINTK(2, warn, "RA: invalid mtu: %d\n", mtu); ndisc_router_discovery()
1395 ND_PRINTK(2, warn, "RA: invalid RA options\n"); ndisc_router_discovery()
H A Dip6_input.c339 /* unknown RA - process it normally */ ip6_mc_input()
H A Dexthdrs.c554 net_dbg_ratelimited("ipv6_hop_ra: wrong RA length %d\n", ipv6_hop_ra()
H A Dip6_output.c395 * RA packets, pushing them to user level AS IS ip6_forward()
402 * Defragmentation also would be mistake, RA packets ip6_forward()
H A Dipv6_sockglue.c65 /* RA packet may be delivered ONLY to IPPROTO_RAW socket */ ip6_ra_control()
H A Daddrconf.c957 * Note: subsequent RA will update lifetime.
/linux-4.1.27/arch/metag/tbx/
H A Dtbipcx.S272 ADD RA,D0Ar4,#(0*8) /* Re-read read pipeline */
273 ADDNZ RA,D0Ar4,D0Ar2 /* If Bit 0 set issue RA */
276 ADDCS RA,D0Ar4,D0Ar2 /* If C issue RA */
278 ADDNZ RA,D0Ar4,D0Ar2 /* If Bit 0 set issue RA */
281 ADDCS RA,D0Ar4,D0Ar2 /* If C issue RA */
283 ADDNZ RA,D0Ar4,D0Ar2 /* If Bit 0 set issue RA */
/linux-4.1.27/drivers/staging/rtl8188eu/include/
H A DHal8188ERateAdaptive.h10 Prototype of RA and related data structure.
H A Dodm_precomp.h42 #include "Hal8188ERateAdaptive.h"/* for RA,Power training */
H A Dsta_info.h198 u8 rssi_level; /* for Refresh RA mask */
H A Dodm.h602 u8 RAstage; /* StageRA, decide how many times RA will be done
H A Dieee80211.h756 Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
/linux-4.1.27/include/linux/
H A Datmel_tc.h168 #define ATMEL_TC_LDRA (3 << 16) /* RA loading edge (of TIOA) */
198 #define ATMEL_TC_ACPA (3 << 16) /* RA compare changes TIOA */
257 #define ATMEL_TC_CPAS (1 << 2) /* RA compare */
260 #define ATMEL_TC_LDRAS (1 << 5) /* RA loading */
H A Dieee80211.h28 * RA = receiver address
32 * ToDS FromDS A1(RA) A2(TA) A3 A4 Use
37 * 1 1 RA TA DA SA unspecified (WDS)
/linux-4.1.27/drivers/net/wireless/iwlwifi/dvm/
H A Ddev.h129 * These states relate to a specific RA / TID.
135 * HW queue to be empty from packets for this RA /TID.
137 * HW queue to be empty from packets for this RA /TID.
152 * duplicated for each RA / TID.
174 * struct iwl_tid_data - one for each RA / TID
176 * This structs holds the states for each RA / TID.
H A Dtx.c552 /* There are still packets for this RA / TID in the HW */ iwlagn_tx_agg_stop()
778 /* There are no packets for this RA / TID in the HW any more */ iwlagn_check_ratid_empty()
791 /* There are no packets for this RA / TID in the HW any more */ iwlagn_check_ratid_empty()
/linux-4.1.27/drivers/pwm/
H A Dpwm-atmel-tcb.c100 __raw_readl(regs + ATMEL_TC_REG(group, RA)); atmel_tcb_pwm_request()
234 * a specific action on RA/RB and RC compare. atmel_tcb_pwm_enable()
257 __raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RA)); atmel_tcb_pwm_enable()
/linux-4.1.27/drivers/net/wireless/hostap/
H A Dhostap_80211_tx.c153 /* From&To DS: Addr1 = RA, Addr2 = TA, Addr3 = DA, hostap_data_start_xmit()
162 /* From DS: Addr1 = DA (used as RA), hostap_data_start_xmit()
174 /* send broadcast and multicast frames to broadcast RA, if hostap_data_start_xmit()
175 * configured; otherwise, use unicast RA of the WDS link */ hostap_data_start_xmit()
H A Dhostap_80211_rx.c570 /* RA (or BSSID) is not ours - drop */ hostap_rx_frame_wds()
574 fc & IEEE80211_FCTL_FROMDS ? "RA" : "BSSID", hostap_rx_frame_wds()
789 * receiver address is a unicast address ("individual RA"). If hostap_80211_rx()
H A Dhostap_ap.c1011 memcpy(hdr->addr1, addr, ETH_ALEN); /* DA / RA */ prism2_send_mgmt()
/linux-4.1.27/arch/mips/dec/
H A Dkn02xa-berr.c119 * The interrupt is asynchronously delivered thus EPC and RA dec_kn02xa_be_interrupt()
H A Dkn01-berr.c170 * The interrupt is asynchronously delivered thus EPC and RA dec_kn01_be_interrupt()
H A Decc-berr.c215 * The interrupt is asynchronously delivered thus EPC and RA dec_ecc_be_interrupt()
/linux-4.1.27/drivers/staging/lustre/lustre/llite/
H A Drw.c729 /* Enlarge the RA window to encompass the full read */ ll_readahead()
743 * Align RA window to an optimal boundary. ll_readahead()
760 /* Truncate RA window to end of file */ ll_readahead()
1002 * ra_max_read_ahead_whole_pages trigger RA on all pages in the ras_update()
1004 * and only occurs once per open file. Normal RA behavior is reverted ras_update()
1050 /*If stride-RA hit cache miss, the stride dector ras_update()
1058 /* Reset both stride window and normal RA ras_update()
1091 /* Trigger RA in the mmap case where ras_consecutive_requests ras_update()
1092 * is not incremented and thus can't be used to trigger RA */ ras_update()
H A Dllite_internal.h346 * ras_lock, then the following ll_read_ahead_pages will read RA
/linux-4.1.27/drivers/net/wireless/iwlwifi/mvm/
H A Dsta.h234 * These states relate to a specific RA / TID.
240 * HW queue to be empty from packets for this RA /TID.
242 * HW queue to be empty from packets for this RA /TID.
253 * struct iwl_mvm_tid_data - holds the states for each RA / TID
H A Dsta.c1062 /* There are still packets for this RA / TID in the HW */ iwl_mvm_sta_tx_agg_stop()
/linux-4.1.27/arch/sh/boards/mach-r2d/
H A Dsetup.c293 * RA = 1 - Internal Memory Remain in Active State: Do not remain. rts7751r2d_setup()
/linux-4.1.27/arch/powerpc/lib/
H A Dcopyuser_power7.S23 #define LVS(VRT,RA,RB) lvsl VRT,RA,RB
26 #define LVS(VRT,RA,RB) lvsr VRT,RA,RB
H A Dmemcpy_power7.S25 #define LVS(VRT,RA,RB) lvsl VRT,RA,RB
28 #define LVS(VRT,RA,RB) lvsr VRT,RA,RB
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/
H A Dcopyuser_power7.S23 #define LVS(VRT,RA,RB) lvsl VRT,RA,RB
26 #define LVS(VRT,RA,RB) lvsr VRT,RA,RB
H A Dmemcpy_power7.S25 #define LVS(VRT,RA,RB) lvsl VRT,RA,RB
28 #define LVS(VRT,RA,RB) lvsr VRT,RA,RB
/linux-4.1.27/arch/powerpc/kernel/
H A Dhead_32.S39 #define LOAD_BAT(n, reg, RA, RB) \
41 li RA,0; \
42 mtspr SPRN_IBAT##n##U,RA; \
43 mtspr SPRN_DBAT##n##U,RA; \
44 lwz RA,(n*16)+0(reg); \
46 mtspr SPRN_IBAT##n##U,RA; \
49 lwz RA,(n*16)+8(reg); \
51 mtspr SPRN_DBAT##n##U,RA; \
H A Dhead_8xx.S543 andis. r10,r11,0x1f /* test if reg RA is r0 */
547 oris r11,r11,640 /* Transform instr. to a "add r10,RA,RB" */
558 subf r10,r0,r10 /* r10=r10-r0, only if reg RA is r0 */
604 rlwinm. r11,r11,19,24,28 /* offset into jump table for reg RA */
605 beq 152f /* if reg RA is zero, don't add it */
H A Dalign.c1037 /* Update RA as needed */ fix_alignment()
H A Dhead_64.S321 * Assumes we're mapped EA == RA if the MMU is on.
/linux-4.1.27/drivers/net/ethernet/intel/ixgb/
H A Dixgb_hw.c415 IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); ixgb_init_rx_addrs()
416 IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); ixgb_init_rx_addrs()
452 IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); ixgb_mc_addr_list_update()
453 IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); ixgb_mc_addr_list_update()
598 IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low); ixgb_rar_set()
599 IXGB_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high); ixgb_rar_set()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8192se/
H A Dphy.c1243 /* We re-map RA related CMD IO to combinational ones */ _rtl92s_phy_set_fwcmd_io()
1418 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "RA init!!\n"); rtl92s_phy_set_fw_cmd()
1472 /* Clear RA BG mode control. */ rtl92s_phy_set_fw_cmd()
1475 /* Clear FW parameter in terms of RA parts. */ rtl92s_phy_set_fw_cmd()
1479 "[FW CMD] [New Version] Set RA/IOT Comb in n mode!! FwCmdMap(%#x), FwParam(%#x)\n", rtl92s_phy_set_fw_cmd()
1491 /* Clear RA n-mode control. */ rtl92s_phy_set_fw_cmd()
1493 /* Clear FW parameter in terms of RA parts. */ rtl92s_phy_set_fw_cmd()
H A Dhw.c1094 /* We enable high power and RA related mechanism after NIC rtl92se_hw_init()
/linux-4.1.27/arch/mips/mm/
H A Dpage.c51 #define RA 31 macro
342 uasm_i_jr(&buf, RA); build_clear_page()
586 uasm_i_jr(&buf, RA); build_copy_page()
/linux-4.1.27/drivers/staging/rtl8723au/include/
H A Dsta_info.h214 u8 rssi_level; /* for Refresh RA mask */
/linux-4.1.27/arch/sparc/include/asm/
H A Dthread_info_64.h100 #define FAULT_CODE_BAD_RA 0x20 /* Bad RA for sun4v */
/linux-4.1.27/arch/metag/kernel/
H A Dsignal.c121 * handler. Also clear out the CBRP RA/RD pipe bit incase setup_sigcontext()
/linux-4.1.27/arch/alpha/kernel/
H A Dsys_nautilus.c124 printk("PC %lx RA %lx\n", regs->pc, regs->r26); naut_sys_machine_check()
/linux-4.1.27/drivers/clocksource/
H A Dtcb_clksrc.c230 __raw_writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA)); tcb_setup_dual_chan()
/linux-4.1.27/arch/sparc/kernel/
H A Dpci_msi.c433 printk(KERN_INFO "%s: MSI queues at RA [%016lx]\n", sparc64_pbm_msi_init()
/linux-4.1.27/arch/mips/kernel/
H A Dkgdb.c266 /* GP, SP, FP, RA */ sleeping_thread_to_gdb_regs()
/linux-4.1.27/arch/parisc/math-emu/
H A Ddecode_exc.c210 * and the round away bit (RA) decode_fpu()
/linux-4.1.27/drivers/net/wireless/iwlwifi/
H A Diwl-prph.h187 * contains TFDs for a unique combination of Recipient Address (RA)
/linux-4.1.27/drivers/net/wireless/iwlwifi/pcie/
H A Dinternal.h218 * @ampdu: true if this queue is an ampdu queue for an specific RA/TID
/linux-4.1.27/drivers/net/wireless/ipw2x00/
H A Dlibipw_tx.c53 Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | Frame | fcs |
H A Dlibipw.h327 Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
H A Dlibipw_rx.c439 * receiver address is a unicast address ("individual RA"). If libipw_rx()
/linux-4.1.27/arch/mn10300/kernel/
H A Dkprobes.c98 #define RA (1 << 10) macro
/linux-4.1.27/drivers/net/wireless/iwlegacy/
H A Dprph.h277 * contains TFDs for a unique combination of Recipient Address (RA)
494 * for only one combination of receiver address (RA) and traffic ID (TID), i.e.
H A D3945.c821 /* RA 0 is active */ il3945_tx_reset()
H A D4965-mac.c1447 * own queue per aggregation session (RA/TID combination), such queues are
/linux-4.1.27/drivers/edac/
H A Dcpc925_edac.c444 * physical address(PA) bits to row address(RA) bits mappings are:
445 * RA 0 1 2 3 4 5 6 7 8 9 10 11 12
/linux-4.1.27/net/mac80211/
H A Dmesh.c526 /* RA TA DA SA */ ieee80211_fill_mesh_addresses()
527 eth_zero_addr(hdr->addr1); /* RA is resolved later */ ieee80211_fill_mesh_addresses()
H A Dtx.c2024 /* RA TA DA SA */ ieee80211_build_hdr()
2061 /* RA TA DA SA */ ieee80211_build_hdr()
2130 /* RA TA mDA mSA AE:DA SA */ ieee80211_build_hdr()
2145 /* we already did checks when looking up the RA STA */ ieee80211_build_hdr()
2158 /* RA TA DA SA */ ieee80211_build_hdr()
H A Dieee80211_i.h1380 /* this struct represents 802.11n's RA/TID combination */
/linux-4.1.27/drivers/staging/rtl8192e/
H A Drtllib_tx.c76 * Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | Frame | fcs |
H A Drtllib.h1059 * Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
/linux-4.1.27/drivers/staging/rtl8192u/ieee80211/
H A Dieee80211_tx.c80 Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | Frame | fcs |
H A Dieee80211.h980 Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
H A Dieee80211_rx.c983 * receiver address is a unicast address ("individual RA"). If ieee80211_rx()
/linux-4.1.27/drivers/staging/rtl8712/
H A Dieee80211.h548 Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs |
H A Drtl871x_cmd.h669 /*dynamic on/off RA*/
H A Drtl871x_recv.c450 * For AP mode, RA=BSSID, TX=STA(SRC_ADDR), A3=DST_ADDR */ sta2ap_data_frame()
/linux-4.1.27/drivers/staging/rtl8188eu/hal/
H A DHal8188ERateAdaptive.c276 /* Start RA decision */ odm_RateDecision_8188E()
H A Drtl8188e_cmd.c143 DBG_88E("==>%s fw dont support RA\n", __func__); rtl8188e_set_raid_cmd()
H A Dusb_halinit.c1933 DBG_88E("============ RA status check ===================\n"); GetHalDefVar8188EUsb()
/linux-4.1.27/arch/mips/kvm/
H A Dlocore.S619 /* Restore RA, which is the address we will return to */
/linux-4.1.27/drivers/net/wireless/ath/ath10k/
H A Drx_desc.h176 * MPDU is a directed packet which means that the RA matched
/linux-4.1.27/drivers/staging/rtl8723au/core/
H A Drtw_mlme_ext.c2028 /* check RA matches or not */ OnAction23a_back23a()
2115 /* check RA matches or not */ on_action_public23a()
3734 ether_addr_copy(mgmt->da, ra); /* RA */ issue_action_spct_ch_switch23a()
3736 ether_addr_copy(mgmt->bssid, ra); /* DA = RA */ issue_action_spct_ch_switch23a()
H A Drtw_recv.c984 /* For AP mode, RA = BSSID, TX = STA(SRC_ADDR), A3 = DST_ADDR */ sta2ap_data_frame()
/linux-4.1.27/drivers/staging/rtl8188eu/core/
H A Drtw_mlme_ext.c1605 /* check RA matches or not */ OnAction_back()
1756 /* check RA matches or not */ on_action_public()
3240 memcpy(pwlanhdr->addr1, ra, ETH_ALEN); /* RA */ issue_action_spct_ch_switch()
3242 memcpy(pwlanhdr->addr3, ra, ETH_ALEN); /* DA = RA */ issue_action_spct_ch_switch()
H A Drtw_recv.c925 /* For AP mode, RA = BSSID, TX = STA(SRC_ADDR), A3 = DST_ADDR */ sta2ap_data_frame()
/linux-4.1.27/drivers/net/wireless/ath/carl9170/
H A Drx.c801 /* FC + DU + RA + FCS */ carl9170_rx_untie_data()
/linux-4.1.27/include/net/
H A Dipv6.h313 /* If forwarding is enabled, RA are not accepted unless the special ipv6_accept_ra()
H A Dmac80211.h2922 * The RA/TID combination determines the destination and TID we want
4652 * the need to start aggregation on a certain RA/TID, the session level
4679 * the need to stop aggregation on a certain RA/TID, the session level
/linux-4.1.27/net/wireless/
H A Dutil.c433 * 1 1 RA TA DA SA ieee80211_data_to_8023()
/linux-4.1.27/drivers/net/wireless/rt2x00/
H A Drt2800.h2838 * aggregate consecutive frames with the same RA and QoS TID. If
2839 * a frame A with the same RA and QoS TID but AMPDU=0 is queued
/linux-4.1.27/drivers/staging/rtl8192u/
H A Dr8192U_dm.c261 * 07/10/08 MH Modify for RA smooth scheme. init_rate_adaptive()
344 /* 2007/10/08 MH We support RA smooth scheme now. When it is the first dm_check_rate_adaptive()
/linux-4.1.27/drivers/net/ethernet/intel/e1000/
H A De1000_ethtool.c794 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), e1000_reg_test()
H A De1000_hw.c4313 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); e1000_init_rx_addrs()
4315 E1000_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); e1000_init_rx_addrs()
4401 E1000_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low); e1000_rar_set()
4403 E1000_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high); e1000_rar_set()
H A De1000_main.c2317 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2319 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
/linux-4.1.27/drivers/net/fddi/skfp/h/
H A Dsupern_2.h379 #define FM_SELRA 0x0080 /* select input from PHY (1=RA,0=RB) */
/linux-4.1.27/drivers/scsi/qla4xxx/
H A Dql4_mbx.c903 * RA: This mailbox has been changed to pass connection error and qla4xxx_get_fwddb_entry()
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmsmac/
H A Dd11.h997 #define ADDR_BMP_RA (1 << 0) /* Receiver Address (RA) */
/linux-4.1.27/arch/sparc/mm/
H A Dinit_64.c808 u64 offset; /* RA-to-PA */
/linux-4.1.27/net/bridge/
H A Dbr_multicast.c461 hopopt[3] = 2; /* Length of RA Option */ br_ip6_multicast_alloc_query()
/linux-4.1.27/kernel/
H A Dkprobes.c1803 /* TODO: consider to only swap the RA after the last pre_handler fired */ pre_handler_kretprobe()
/linux-4.1.27/drivers/net/wireless/ath/wcn36xx/
H A Dhal.h1218 /* Max Ampdu density. Used by RA. 3 : 0~7 : 2^(11nAMPDUdensity -4) */
1333 /* Max Ampdu density. Used by RA. 3 : 0~7 : 2^(11nAMPDUdensity -4) */
/linux-4.1.27/drivers/net/ethernet/freescale/
H A Dgianfar.c21 * RA 11 31 24.2
/linux-4.1.27/drivers/net/wireless/
H A Dmwl8k.c5446 * packets for this RA/TID that are not part of this BA mwl8k_ampdu_action()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8821ae/
H A Dhw.c3850 "rtl8821ae_update_hal_rate_tbl() Error! 8821ae FW RA Only");*/ rtl8821ae_update_hal_rate_tbl()
/linux-4.1.27/fs/xfs/libxfs/
H A Dxfs_btree.c818 * Bits in lr are set from XFS_BTCUR_{LEFT,RIGHT}RA.
/linux-4.1.27/fs/btrfs/
H A Dioctl.c1094 * It's a good idea to start RA on this range
/linux-4.1.27/drivers/staging/rtl8723au/hal/
H A Drtl8723a_bt-coexist.c5953 /* Recover original RA setting */ btdm_1AntBTStateChangeHandler()
9460 rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "Low penalty RA", \ BTDM_Display8723ABtCoexInfo()

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