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/linux-4.1.27/Documentation/PCI/
DPCIEBUS-HOWTO.txt1 The PCI Express Port Bus Driver Guide HOWTO
7 This guide describes the basics of the PCI Express Port Bus driver
9 register/unregister with the PCI Express Port Bus Driver.
13 3. What is the PCI Express Port Bus Driver
15 A PCI Express Port is a logical PCI-PCI Bridge structure. There
16 are two types of PCI Express Port: the Root Port and the Switch
17 Port. The Root Port originates a PCI Express link from a PCI Express
18 Root Complex and the Switch Port connects PCI Express links to
19 internal logical PCI buses. The Switch Port, which has its secondary
21 switch's Upstream Port. The switch's Downstream Port is bridging from
[all …]
D00-INDEX6 - a guide describing the PCI Express Port Bus driver
Dpci.txt309 determine MMIO and IO Port resource availability _after_ calling
313 (for MMIO ranges) and request_region() (for IO Port ranges).
426 Disable device from responding to MMIO/IO Port addresses
427 Release MMIO/IO Port resource(s)
491 4.6 Disable Device from responding to MMIO/IO Port addresses
493 io_unmap() MMIO or IO Port resources and then call pci_disable_device().
498 4.7 Release MMIO/IO Port Resource(s)
500 Call pci_release_region() to mark the MMIO or IO Port range as available.
600 Converting a driver from using I/O Port space to using MMIO space
603 already do this. I/O Port space guarantees write transactions reach the PCI
[all …]
Dpcieaer-howto.txt45 The PCI Express AER Root driver is a Root Port service driver attached
46 to the PCI Express Port Bus driver. If a user wants to use it, the driver
112 an error. The Root Port, upon receiving an error reporting message,
118 Error Command Register, the Root Port generates an interrupt if an
/linux-4.1.27/drivers/usb/serial/
Dio_ionsp.h128 #define IOSP_BUILD_DATA_HDR1(Port, Len) ((__u8) (((Port) | ((__u8) (((__u16) (Len)) >> 5) & 0x78))… argument
129 #define IOSP_BUILD_DATA_HDR2(Port, Len) ((__u8) (Len)) argument
135 #define IOSP_BUILD_CMD_HDR1(Port, Cmd) ((__u8) (IOSP_CMD_STAT_BIT | (Port) | ((__u8) ((Cmd) << 3))… argument
197 #define MAKE_CMD_WRITE_REG(ppBuf, pLen, Port, Reg, Val) \ argument
199 (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), \
207 #define MAKE_CMD_EXT_CMD(ppBuf, pLen, Port, ExtCmd, Param) \ argument
209 (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), IOSP_EXT_CMD); \
DKconfig93 tristate "USB Belkin and Peracom Single Port Serial Driver"
103 tristate "USB Winchiphead CH341 Single Port Serial Driver"
170 tristate "USB FTDI Single Port Serial Driver"
250 tristate "USB Fintek F81232 Single Port Serial Driver"
291 tristate "USB Keyspan PDA Single Port Serial Driver"
426 tristate "USB MCT Single Port Serial Driver"
485 [2 Port]
486 - UPort 1250 : 2 Port RS-232/422/485 USB to Serial Hub
487 - UPort 1250I : 2 Port RS-232/422/485 USB to Serial Hub with
490 [4 Port]
[all …]
Dio_edgeport.h45 int Port[MAX_RS232_PORTS]; /* Actual used port numbers */ member
/linux-4.1.27/arch/arm/boot/dts/
Darmada-xp-mv78460.dtsi119 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
120 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
121 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
122 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
123 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
124 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
125 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */
126 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
127 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
128 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
[all …]
Darmada-xp-mv78260.dtsi102 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
103 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
104 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
105 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
106 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
107 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
108 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
109 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
110 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
111 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
[all …]
Darmada-xp-mv78230.dtsi101 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
102 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
103 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
104 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
105 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
106 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
107 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
108 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
109 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 0.1 IO */
110 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */
[all …]
Darmada-385.dtsi95 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
96 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
97 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
98 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
99 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
100 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */
101 0x82000000 0x4 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 3 MEM */
102 0x81000000 0x4 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 3 IO */>;
Darmada-380.dtsi90 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
91 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
92 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
93 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
94 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
95 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */>;
Dkirkwood-6282.dtsi17 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
18 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
19 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
20 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
Darmada-xp-db.dts116 /* Port 0, Lane 0 */
120 /* Port 0, Lane 1 */
124 /* Port 0, Lane 2 */
128 /* Port 0, Lane 3 */
132 /* Port 2, Lane 0 */
136 /* Port 3, Lane 0 */
Dkirkwood-98dx4122.dtsi15 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
16 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
Darmada-39x.dtsi410 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
411 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
412 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
413 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
414 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
415 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */
416 0x82000000 0x4 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 3 MEM */
417 0x81000000 0x4 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 3 IO */>;
Dkirkwood-6281.dtsi15 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
16 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
Dkirkwood-6192.dtsi15 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
16 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
Darmada-xp-axpwifiap.dts79 /* Port 0, Lane 0 */
85 /* Port 0, Lane 1 */
91 /* Port 0, Lane 3 */
Darmada-385-db-ap.dts187 /* Port 0, Lane 0 */
192 /* Port 1, Lane 0 */
197 /* Port 2, Lane 0 */
Domap3-beagle-xm-ab.dts12 /* HS USB Port 2 Power enable was inverted with the xM C */
Darmada-370.dtsi87 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
88 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
89 0x82000000 0x2 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
90 0x81000000 0x2 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
Darmada-xp-gp.dts135 /* Port 0, Lane 0 */
139 /* Port 2, Lane 0 */
143 /* Port 3, Lane 0 */
Darmada-388-db.dts177 /* Port 0, Lane 0 */
181 /* Port 1, Lane 0 */
Darmada-xp-linksys-mamba.dts79 /* Port 0, Lane 0 */
85 /* Port 0, Lane 1 */
91 /* Port 0, Lane 3 */
Darmada-370-mirabox.dts71 /* Port 0, Lane 0 */
77 /* Port 1, Lane 0 */
Darmada-375-db.dts195 /* Port 0, Lane 0 */
199 /* Port 1, Lane 0 */
Darmada-xp-netgear-rn2120.dts73 /* Port 0, Lane 0 */
79 /* Port 0, Lane 1 */
85 /* Port 1, Lane 0 */
Darmada-388-gp.dts235 /* Port 0, Lane 0 */
244 /* Port 1, Lane 0 */
248 /* Port 2, Lane 0 */
Darmada-375.dtsi576 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0 MEM */
577 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0 IO */
578 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1 MEM */
579 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1 IO */>;
Ddove.dtsi62 0x82000000 0x1 0x0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 Mem */
63 0x81000000 0x1 0x0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 I/O */
64 0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */
65 0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */
Darmada-370-rd.dts84 /* Port 0, Lane 0 */
90 /* Port 1, Lane 0 */
Domap3-cm-t3x.dtsi23 /* HS USB Port 1 Power */
32 /* HS USB Port 2 Power */
Darmada-370-netgear-rn104.dts73 /* Port 0, Lane 0 */
79 /* Port 1, Lane 0 */
Darmada-370-netgear-rn102.dts73 /* Port 0, Lane 0 */
79 /* Port 1, Lane 0 */
Darmada-370-db.dts180 /* Port 0, Lane 0 */
185 /* Port 1, Lane 0 */
Darmada-xp-lenovo-ix4-300d.dts74 /* Port 0, Lane 0 */
80 /* Port 1, Lane 0 */
Darmada-xp-matrix.dts104 /* Port 0, Lane 0 */
Darmada-xp-synology-ds414.dts90 /* Port 0, Lane 0 */
99 /* Port 1, Lane 0 */
Darmada-388-rd.dts137 /* Port 0, Lane 0 */
Dkirkwood-netgear_readynas_nv+_v2.dts37 /* Port 0, Lane 0 */
Domap3-igep0020-common.dtsi46 /* HS USB Port 1 Power */
Domap3-overo-base.dtsi32 /* HS USB Port 2 Power */
Darmada-xp-openblocks-ax3-4.dts102 /* Port 0, Lane 0 */
Domap3-beagle-xm.dts77 /* HS USB Port 2 Power */
Domap3-tao3530.dtsi34 /* HS USB Port 2 Power */
Domap3-beagle.dts52 /* HS USB Port 2 Power */
Domap4-panda-common.dtsi65 /* HS USB Port 1 Power */
/linux-4.1.27/Documentation/devicetree/bindings/pci/
Dmvebu-pci.txt97 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
98 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
99 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
100 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
101 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
102 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
103 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */
104 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
105 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
106 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
[all …]
Dxilinx-pcie.txt1 * Xilinx AXI PCIe Root Port Bridge DT description
/linux-4.1.27/drivers/isdn/hardware/eicon/
Dio.c667 byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); in io_in() local
668 outppw(Port + 4, (word)(unsigned long)adr); in io_in()
669 val = inpp(Port); in io_in()
670 DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); in io_in()
676 byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); in io_inw() local
677 outppw(Port + 4, (word)(unsigned long)adr); in io_inw()
678 val = inppw(Port); in io_inw()
679 DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); in io_inw()
684 byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); in io_in_buffer() local
687 outppw(Port + 4, (word)(unsigned long)adr); in io_in_buffer()
[all …]
Dos_bri.c520 byte __iomem *Port; in diva_bri_reset_adapter() local
531 Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); in diva_bri_reset_adapter()
532 addrHi = Port + in diva_bri_reset_adapter()
534 addrLo = Port + ADDR; in diva_bri_reset_adapter()
535 ioaddr = Port + DATA; in diva_bri_reset_adapter()
568 DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); in diva_bri_reset_adapter()
608 byte __iomem *Port; in diva_bri_write_sdram_block() local
614 Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); in diva_bri_write_sdram_block()
615 addrHi = Port + in diva_bri_write_sdram_block()
617 addrLo = Port + ADDR; in diva_bri_write_sdram_block()
[all …]
Ds_bri.c48 byte __iomem *Port; in bri_cpu_trapped() local
54 Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); in bri_cpu_trapped()
55 addrHi = Port + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH); in bri_cpu_trapped()
56 addrLo = Port + ADDR; in bri_cpu_trapped()
57 ioaddr = Port + DATA; in bri_cpu_trapped()
99 DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); in bri_cpu_trapped()
/linux-4.1.27/Documentation/devicetree/bindings/mfd/
Domap-usb-host.txt44 * "refclk_60m_ext_p1" - 60MHz external ref. clock for Port 1's UTMI clock mux.
45 * "refclk_60m_ext_p2" - 60MHz external ref. clock for Port 2's UTMI clock mux
46 * "utmi_p1_gfclk" - Port 1 UTMI clock mux.
47 * "utmi_p2_gfclk" - Port 2 UTMI clock mux.
48 * "usb_host_hs_utmi_p1_clk" - Port 1 UTMI clock gate.
49 * "usb_host_hs_utmi_p2_clk" - Port 2 UTMI clock gate.
50 * "usb_host_hs_utmi_p3_clk" - Port 3 UTMI clock gate.
51 * "usb_host_hs_hsic480m_p1_clk" - Port 1 480MHz HSIC clock gate.
52 * "usb_host_hs_hsic480m_p2_clk" - Port 2 480MHz HSIC clock gate.
53 * "usb_host_hs_hsic480m_p3_clk" - Port 3 480MHz HSIC clock gate.
[all …]
/linux-4.1.27/Documentation/s390/
Dqeth.txt3 HiperSockets Bridge Port Support
8 a primary or a secondary Bridge Port. For more information, see
11 When run on HiperSockets Bridge Capable Port hardware, and the state
12 of some configured Bridge Port device on the channel changes, a udev
16 BRIDGEPORT=statechange - indicates that the Bridge Port device changed
23 When run on HiperSockets Bridge Capable Port hardware with host address
31 deregistered on the Bridge Port HiperSockets channel, or address
D00-INDEX24 - HiperSockets Bridge Port Support.
/linux-4.1.27/drivers/pci/pcie/aer/
DKconfig2 # PCI Express Root Port Device AER Configuration
6 bool "Root Port Advanced Error Reporting support"
11 This enables PCI Express Root Port Advanced Error Reporting
13 Port will be handled by PCI Express AER driver.
DKconfig.debug2 # PCI Express Root Port Device AER Debug Configuration
10 This enables PCI Express Root Port Advanced Error Reporting
/linux-4.1.27/drivers/staging/media/lirc/
DKconfig30 tristate "Homebrew Parallel Port Receiver"
33 Driver for Homebrew Parallel Port Receivers
42 tristate "Homebrew Serial Port Receiver"
45 Driver for Homebrew Serial Port Receivers
48 bool "Serial Port Transmitter"
52 Serial Port Transmitter support
/linux-4.1.27/firmware/dsp56k/
Dbootstrap.asm10 M_BCR EQU $FFFE ; Port A Bus Control Register
11 M_PBC EQU $FFE0 ; Port B Control Register
12 M_PBDDR EQU $FFE2 ; Port B Data Direction Register
13 M_PBD EQU $FFE4 ; Port B Data Register
14 M_PCC EQU $FFE1 ; Port C Control Register
15 M_PCDDR EQU $FFE3 ; Port C Data Direction Register
16 M_PCD EQU $FFE5 ; Port C Data Register
/linux-4.1.27/Documentation/infiniband/
Dsysfs.txt22 cap_mask - Port capability mask
23 lid - Port LID
24 lid_mask_count - Port LID mask count
25 rate - Port data rate (active width * active speed)
28 state - Port state (DOWN, INIT, ARMED, ACTIVE or ACTIVE_DEFER)
29 phys_state - Port physical state (Sleep, Polling, LinkUp, etc)
/linux-4.1.27/arch/mips/boot/dts/cavium-octeon/
Docteon_3xxx.dts236 reg = <0x0>; /* Port */
243 reg = <0x1>; /* Port */
250 reg = <0x2>; /* Port */
257 reg = <0x3>; /* Port */
264 reg = <0x4>; /* Port */
269 reg = <0x5>; /* Port */
274 reg = <0x6>; /* Port */
279 reg = <0x7>; /* Port */
284 reg = <0x8>; /* Port */
289 reg = <0x9>; /* Port */
[all …]
Docteon_68xx.dts268 reg = <0x0>; /* Port */
274 reg = <0x1>; /* Port */
280 reg = <0x2>; /* Port */
286 reg = <0x3>; /* Port */
300 reg = <0x0>; /* Port */
306 reg = <0x1>; /* Port */
312 reg = <0x2>; /* Port */
318 reg = <0x3>; /* Port */
332 reg = <0x0>; /* Port */
338 reg = <0x1>; /* Port */
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/net/
Dcavium-pip.txt56 reg = <0x0>; /* Port */
62 reg = <0x1>; /* Port */
68 reg = <0x2>; /* Port */
74 reg = <0x3>; /* Port */
88 reg = <0x0>; /* Port */
Dkeystone-netcp.txt38 |-> Ethernet Port 0
40 |-> Ethernet Port 1
42 |-> Ethernet Port 2
44 |-> Ethernet Port 3
Dapm-xgene-enet.txt21 - port-id: Port number (0 or 1)
/linux-4.1.27/arch/arc/boot/dts/
Dabilis_tb101.dtsi44 /* Port 1 */
57 /* Port 2 */
70 /* Port 3 */
83 /* Port 4 */
96 /* Port 5 */
115 /* Port 6 */
131 /* Port 7 */
144 /* Port 8 */
151 /* Port 9 */
Dabilis_tb100.dtsi44 /* Port 1 */
57 /* Port 2 */
70 /* Port 3 */
83 /* Port 4 */
96 /* Port 5 */
109 /* Port 6 */
125 /* Port 7 */
138 /* Port 8 */
142 /* Port 9 */
/linux-4.1.27/Documentation/devicetree/bindings/bus/
Dmvebu-mbus.txt250 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
251 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
252 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
253 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
254 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
255 0x82000800 0 0xe0000000 MBUS_ID(0x04, 0xe8) 0xe0000000 0 0x08000000 /* Port 0.0 MEM */
256 0x81000800 0 0 MBUS_ID(0x04, 0xe0) 0xe8000000 0 0x00100000 /* Port 0.0 IO */>;
260 /* Port 0, Lane 0 */
/linux-4.1.27/drivers/pci/pcie/
DKconfig2 # PCI Express Port Bus Configuration
5 bool "PCI Express Port Bus support"
8 This automatically enables PCI Express Port Bus support. Users can
/linux-4.1.27/firmware/
Dwhiteheat_loader.HEX303 * Port 1 LED flashes when the vend_ax program is running
304 * Port 2 LED flashes when any SETUP command arrives
305 * Port 3 LED flashes when any valid VENDOR request occurs
306 * Port 4 LED flashes when the EXTERNAL RAM DOWNLOAD request occurs
Dwhiteheat_loader_debug.HEX392 * Port 1 LED flashes when the vend_ax program is running
393 * Port 2 LED flashes when any SETUP command arrives
394 * Port 3 LED flashes when any valid VENDOR request occurs
395 * Port 4 LED flashes when the EXTERNAL RAM DOWNLOAD request occurs
Dwhiteheat.HEX1086 * Port 1 LED flashes when the vend_ax program is running
1087 * Port 2 LED flashes when any SETUP command arrives
1088 * Port 3 LED flashes when any valid VENDOR request occurs
1089 * Port 4 LED flashes when the EXTERNAL RAM DOWNLOAD request occurs
DWHENCE267 Port 1 LED flashes when the vend_ax program is running
268 Port 2 LED flashes when any SETUP command arrives
269 Port 3 LED flashes when any valid VENDOR request occurs
270 Port 4 LED flashes when the EXTERNAL RAM DOWNLOAD request occurs
/linux-4.1.27/Documentation/usb/
Dproc_usb_info.txt90 Lev, Prnt, Port, Cnt) can be used to build a USB topology diagram.
117 T: Bus=dd Lev=dd Prnt=dd Port=dd Cnt=dd Dev#=ddd Spd=dddd MxCh=dd
122 | | | | |__Connector/Port on Parent for this device
135 For reasons lost in the mists of time, the Port number is always
137 show up with "Port=03".
307 T: Bus=00 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#= 1 Spd=12 MxCh= 2
317 T: Bus=00 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=12 MxCh= 4
324 T: Bus=00 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#= 3 Spd=1.5 MxCh= 0
331 T: Bus=00 Lev=02 Prnt=02 Port=02 Cnt=02 Dev#= 4 Spd=12 MxCh= 0
346 T: Bus=00 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#= 1 Spd=12 MxCh= 2
[all …]
Dgadget-testing.txt323 Port Client name Port name
324 14:0 Midi Through Midi Through Port-0
331 Port Client name Port name
340 Port Client name Port name
348 Port Client name Port name
349 14:0 Midi Through Midi Through Port-0
360 Port Client name Port name
361 14:0 Midi Through Midi Through Port-0
Dacm.txt70 T: Bus=01 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#= 1 Spd=12 MxCh= 2
79 T: Bus=01 Lev=01 Prnt=01 Port=01 Cnt=01 Dev#= 2 Spd=12 MxCh= 0
Dpower-management.txt23 * USB Port Power Control
24 * User Interface for Port Power Control
25 * Suggested Userspace Port Power Policy
541 USB Port Power Control
563 Please see "User Interface for Port Power Control" for details.
580 User Interface for Port Power Control
636 1/ Port suspend is sequenced to guarantee that hi-speed ports are powered-off
643 2/ Port resume is sequenced to force a superspeed port to power-on prior to its
646 3/ Port resume always triggers an attached child device to resume. After a
738 Suggested Userspace Port Power Policy
Dgadget_serial.txt196 T: Bus=01 Lev=01 Prnt=01 Port=01 Cnt=02 Dev#= 5 Spd=480 MxCh= 0
228 T: Bus=01 Lev=01 Prnt=01 Port=01 Cnt=02 Dev#= 6 Spd=480 MxCh= 0
276 COM port assigned to Gadget Serial. The "Port Settings" will be
Dusb-serial.txt193 FTDI Single Port Serial Driver
337 MCT USB Single Port Serial Adapter U232
Dusbmon.txt56 T: Bus=03 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=12 MxCh= 0
/linux-4.1.27/drivers/message/fusion/lsi/
Dmpi_ioc.h751 U8 Port; /* 05h */ member
768 U8 Port; /* 05h */ member
783 U8 Port; /* 05h */ member
795 U8 Port; /* 01h */ member
806 U8 Port; /* 01h */ member
865 U8 Port; /* 04h */ member
892 U8 Port; /* 01h */ member
911 U8 Port; /* 01h */ member
Dmpi_history.txt243 * Port Page 2, FC Port Page 4, FC Port Page 5
251 * SCSI Port Page 2 Device Settings modified.
252 * New fields added to FC Port Page 0 and some flags
254 * Removed impedance flash from FC Port Page 1.
255 * Added FC Port pages 6 and 7.
274 * Modified defines for Scsi Port Page 2.
298 * Increased size of ALPA array in FC Port Page 2 by one
403 * 12-09-04 01.05.05 Added Target Mode Large CDB Enable to FC Port Page 1
405 * Added Auto Port Config flag define for SAS IOUNIT
438 * Added Port Enable Delay settings to BIOS Page 1.
[all …]
Dmpi_init.h265 U8 Port; /* 00h */ member
381 U8 Port; /* 00h */ member
Dmpi_tool.h212 MPI_TB_FC_MANAGE_PID_AI Port; member
Dmpi_cnfg.h2546 U8 Port; /* 00h */ member
2620 U8 Port; /* 00h */ member
/linux-4.1.27/Documentation/devicetree/bindings/powerpc/fsl/
Dcpus.txt27 Definition: The Coherency Subdomain ID Port Mapping Registers and
28 Snoop ID Port Mapping registers, which are part of the CoreNet
Dccf.txt31 Specifies the number of Coherency Subdomain ID Port Mapping
35 Specifies the number of Snoop ID Port Mapping Registers that
Ddcsr.txt112 Nexus Port Controller
129 The Nexus Port controller occupies two regions in the DCSR space
132 The first register range describes the Nexus Port Controller
135 The second register range describes the Nexus Port Controller
Dpamu.txt38 The Coherency Subdomain ID Port Mapping Registers and
39 Snoop ID Port Mapping registers, which are part of the
Dfman.txt6 - FMan Port Node
147 FMan Port Node
175 Super set of all hardware Port IDs available at FMan Reference
Dsrio.txt39 Port Child Nodes: There should a port child node for each port that exists in
Dsrio-rmu.txt98 Port-Write Unit:
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dmvebu-gated-clock.txt48 28 crypto0_enc Cryptographic Unit Port 0 Encryption
49 29 crypto0_core Cryptographic Unit Port 0 Core
50 30 crypto1_enc Cryptographic Unit Port 1 Encryption
51 31 crypto1_core Cryptographic Unit Port 1 Core
Dfujitsu,mb86s70-crg11.txt24 clocks = <&clock 0 2 1>; /* Cntrlr:0 Domain:2 Port:1 */
/linux-4.1.27/Documentation/devicetree/bindings/video/
Dti,omap3-dss.txt19 - Port 0: DPI output
20 - Port 1: SDI output
Drenesas,du.txt42 Port 0 Port1 Port2
/linux-4.1.27/Documentation/m68k/
DREADME.buddha44 $800-$8ff IDE-Select 0 (Port 0, Register set 0)
46 $900-$9ff IDE-Select 1 (Port 0, Register set 1)
48 $a00-$aff IDE-Select 2 (Port 1, Register set 0)
50 $b00-$bff IDE-Select 3 (Port 1, Register set 1)
52 $c00-$cff IDE-Select 4 (Port 2, Register set 0,
55 $d00-$dff IDE-Select 5 (Port 3, Register set 1,
/linux-4.1.27/Documentation/devicetree/bindings/dma/
Dste-dma40.txt70 8: Synchronous Serial Port SSP0
71 9: Synchronous Serial Port SSP1
76 14: Multirate Serial Port MSP2
/linux-4.1.27/drivers/staging/xgifb/
Dvb_init.c276 unsigned long Port, struct vb_device_info *pVBInfo) in XGINew_DDR1x_DefaultRegister() argument
278 unsigned long P3d4 = Port, P3c4 = Port - 0x10; in XGINew_DDR1x_DefaultRegister()
353 unsigned long Port, struct vb_device_info *pVBInfo) in XGINew_DDR2_DefaultRegister() argument
355 unsigned long P3d4 = Port, P3c4 = Port - 0x10; in XGINew_DDR2_DefaultRegister()
404 unsigned long Port, struct vb_device_info *pVBInfo) in XGINew_SetDRAMDefaultRegister340() argument
408 unsigned long P3d4 = Port, P3c4 = Port - 0x10; in XGINew_SetDRAMDefaultRegister340()
/linux-4.1.27/drivers/media/pci/sta2x11/
DKconfig11 Say Y for support for STA2X11 VIP (Video Input Port) capture
/linux-4.1.27/Documentation/scsi/
Dhptiop.txt22 0x40 Inbound Queue Port
23 0x44 Outbound Queue Port
37 0x40 Inbound Queue Port
38 0x44 Outbound Queue Port
Dbnx2fc.txt54 Port Name: 0x20000010186FD559
59 FC-ID (Port ID): 0x0F0377
Dlibsas.txt10 * SAS Phy/Port/HA event management (LLDD generates,
12 * SAS Port management (creation/destruction),
187 Port and Adapter management:
189 /* Port and Adapter management */
263 Port events, passed on a _phy_:
Dadvansys.txt87 specifying a 5th (ASC_NUM_IOPORT_PROBE + 1) I/O Port. The
88 first three hex digits of the pseudo I/O Port must be set to
185 I/O Port may be added to specify the driver debug level. Refer to
Dg_NCR5380.txt18 Port: 0x350
Dscsi_fc_transport.txt44 interact with the Fabric Port to join multiple fabrics. The port will
51 an entity that has a world-wide unique World Wide Port Name (wwpn) and
94 The typical Physical Port's Scsi_Host:
98 and then the vport is created on the Physical Port:
DBusLogic.txt295 o PCI I/O Port Assignments
309 Configuration", and then change the "ISA Compatible Port" setting from
311 the "ISA Compatible Port" option should be set back to "Disable" to avoid
394 Port set to "Primary" or "Alternate".
/linux-4.1.27/Documentation/devicetree/bindings/serial/
Dst-asc.txt1 *st-asc(Serial Port)
/linux-4.1.27/drivers/nfc/
DKconfig62 tristate "Sony NFC Port-100 Series USB device support"
66 This adds support for Sony Port-100 chip based USB devices such as the
/linux-4.1.27/arch/blackfin/mach-bf518/
DKconfig89 The ADSP-BF51x allows to control input hysteresis for Port F,
90 Port G and Port H and other processor signal inputs.
/linux-4.1.27/arch/blackfin/mach-bf527/
DKconfig86 The ADSP-BF52x allows to control input hysteresis for Port F,
87 Port G and Port H and other processor signal inputs.
/linux-4.1.27/sound/mips/
DKconfig28 tristate "Au1x00 AC97 Port Driver (DEPRECATED)"
/linux-4.1.27/arch/c6x/lib/
Dmemcpy_64plus.S1 ; Port on Texas Instruments TMS320C6x architecture
Dcsum_64plus.S4 ; Port on Texas Instruments TMS320C6x architecture
/linux-4.1.27/Documentation/devicetree/bindings/i2c/
Di2c-opal.txt10 - reg: Port-id within a given master
Dtrivial-devices.txt83 plx,pex8648 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch
/linux-4.1.27/drivers/net/can/softing/
DKconfig8 Those cards typically use Dual Port RAM to communicate
/linux-4.1.27/Documentation/arm/
DNetwinder8 Port usage
/linux-4.1.27/Documentation/devicetree/bindings/input/
Dimx-keypad.txt1 * Freescale i.MX Keypad Port(KPP) device tree bindings
/linux-4.1.27/arch/c6x/kernel/
Dvectors.S2 ; Port on Texas Instruments TMS320C6x architecture
Dhead.S2 ; Port on Texas Instruments TMS320C6x architecture
Dentry.S2 ; Port on Texas Instruments TMS320C6x architecture
/linux-4.1.27/tools/usb/usbip/
DREADME176 Port 00: <Port in Use> at Full Speed(12Mbps)
/linux-4.1.27/Documentation/devicetree/bindings/media/
Dti,omap3isp.txt26 Port nodes (optional)
/linux-4.1.27/Documentation/devicetree/bindings/media/i2c/
Dadv7604.txt25 Port ADV7611
/linux-4.1.27/Documentation/devicetree/bindings/drm/imx/
Dfsl-imx-drm.txt32 - port@[0-3]: Port nodes with endpoint definitions as defined in
/linux-4.1.27/Documentation/watchdog/
Dwdt.txt39 I/O Port Monitor o o
Dpcwd-watchdog.txt9 the Revision C card allows you to monitor any IO Port to automatically
/linux-4.1.27/Documentation/auxdisplay/
Dcfag12864b57 Parallel Port cfag12864b
/linux-4.1.27/Documentation/arm/Samsung/
DOverview.txt67 Port Contributors
/linux-4.1.27/drivers/hwtracing/coresight/
DKconfig37 This enables support for the Trace Port Interface Unit driver,
/linux-4.1.27/Documentation/devicetree/bindings/hsi/
Domap-ssi.txt27 Required Port sub-node properties:
/linux-4.1.27/Documentation/trace/
Dcoresight.txt74 |------>& TPIU &<......II I DAP = Debug Access Port
79 To trace port TPIU= Trace Port Interface Unit
103 TPIU: Trace Port Interface Unit
/linux-4.1.27/Documentation/ia64/
Dserial.txt138 Console/Debug Port." The current version is the "PCDP" for
139 "Primary Console and Debug Port Devices."
/linux-4.1.27/Documentation/
Dpnp.txt177 /* Standard LPT Printer Port */
179 /* ECP Printer Port */
Dparport-lowlevel.txt33 Port functions (can be overridden by low-level drivers):
80 SPP (Standard Parallel Port) functions modify so-called 'SPP'
86 EPP (Enhanced Parallel Port) functions are provided for reading and
87 writing in IEEE 1284 EPP mode, and ECP (Extended Capabilities Port)
Ddebugging-via-ohci1394.txt129 Port 0 (/dev/fw1) opened, 2 nodes detected
Dparport.txt155 TRISTATE Port is bidirectional.
Dkernel-parameters.txt49 AGP AGP (Accelerated Graphics Port) is enabled.
526 baycom_par= [HW,AX25] BayCom Parallel Port AX.25 Modem
531 BayCom Serial Port AX.25 Modem (Full Duplex Mode)
536 BayCom Serial Port AX.25 Modem (Half Duplex Mode)
2867 pmtmr= [X86] Manual setup of pmtmr I/O Port.
/linux-4.1.27/sound/soc/davinci/
DKconfig21 tristate "Multichannel Audio Serial Port (McASP) support"
/linux-4.1.27/arch/cris/arch-v10/
DKconfig23 bool "Port-PA-LEDs"
33 bool "Port-PB-LEDs"
43 bool "Port-CSP0-LEDs"
/linux-4.1.27/arch/arm/mach-davinci/
DKconfig195 bool "Video Port Interface"
197 Say Y if you want to use Video Port Interface (VPIF) on the
/linux-4.1.27/drivers/video/fbdev/sis/
Dinit.c930 SiS_SetRegANDOR(SISIOADDRESS Port, u8 Index, u8 DataAND, u8 DataOR) in SiS_SetRegANDOR() argument
934 temp = SiS_GetReg(Port, Index); in SiS_SetRegANDOR()
936 SiS_SetReg(Port, Index, temp); in SiS_SetRegANDOR()
940 SiS_SetRegAND(SISIOADDRESS Port, u8 Index, u8 DataAND) in SiS_SetRegAND() argument
944 temp = SiS_GetReg(Port, Index); in SiS_SetRegAND()
946 SiS_SetReg(Port, Index, temp); in SiS_SetRegAND()
950 SiS_SetRegOR(SISIOADDRESS Port, u8 Index, u8 DataOR) in SiS_SetRegOR() argument
954 temp = SiS_GetReg(Port, Index); in SiS_SetRegOR()
956 SiS_SetReg(Port, Index, temp); in SiS_SetRegOR()
/linux-4.1.27/Documentation/ABI/testing/
Dsysfs-ata21 If a SATA Port Multiplier (PM) is connected, number of link behind it.
/linux-4.1.27/Documentation/misc-devices/mei/
Dmei.txt153 using a protocol called Intel AMT Port Forwarding Protocol (Intel APF protocol).
161 => "Description of the Intel AMT Port Forwarding (APF) Protocol"
/linux-4.1.27/Documentation/spi/
Dspi-lm70llp33 Port Direction JP2 Header
/linux-4.1.27/drivers/scsi/mpt3sas/mpi/
Dmpi2_ioc.h605 U8 Port; /*0x01 */ member
810 U8 Port; /*0x01 */ member
832 U8 Port; /*0x01 */ member
Dmpi2_cnfg.h1936 U8 Port; /*0x00 */ member
2011 U8 Port; /*0x00 */ member
/linux-4.1.27/drivers/scsi/mpt2sas/mpi/
Dmpi2_ioc.h588 U8 Port; /* 0x01 */ member
807 U8 Port; /* 0x01 */ member
829 U8 Port; /* 0x01 */ member
Dmpi2_cnfg.h1876 U8 Port; /* 0x00 */ member
1949 U8 Port; /* 0x00 */ member
/linux-4.1.27/drivers/phy/
DKconfig138 tristate "EXYNOS SoC series Display Port PHY driver"
144 Support for Display Port PHY found on Samsung EXYNOS SoCs.
/linux-4.1.27/Documentation/sound/alsa/
DALSA-Configuration.txt142 Port Client name Port name
143 64:0 OPL2 FM synth OPL2 FM Port
1299 port - Port # (0x530,0x604,0xe80,0xf40)
1305 fm_port - FM Port # (0x388)
1349 io - Port # for msnd-classic card
1380 io - Port # for pinnacle/fiji card
1723 port - Port # (0x220 or 0x240)
1724 mss_port - MSS Port # (0x530 or 0xe80)
1739 port - Port # (PnP setup)
1740 wss_port - WSS Port # (PnP setup)
[all …]
/linux-4.1.27/drivers/auxdisplay/
DKconfig27 Depends on Parallel Port support. If you say Y at
/linux-4.1.27/net/ipv6/netfilter/
DKconfig69 forms of full Network Address Port Translation. This can be
291 port forwarding and other forms of full Network Address Port
/linux-4.1.27/Documentation/input/
Dxpad.txt193 T: Bus=01 Lev=03 Prnt=04 Port=00 Cnt=01 Dev#= 5 Spd=12 MxCh= 0
203 T: Bus=01 Lev=02 Prnt=09 Port=00 Cnt=01 Dev#= 10 Spd=12 MxCh= 0
Djoystick.txt391 provide an "Enhanced Game Port" mode where the soundcard handles polling the
398 Port", much like the 4DWave or Vortex above. This, and also the normal mode
/linux-4.1.27/drivers/usb/gadget/udc/
DKconfig33 tristate "Atmel AT91 USB Device Port"
38 full speed USB Device Port with support for five configurable
68 high speed USB Device Port with support for four fixed endpoints
/linux-4.1.27/Documentation/networking/
Digb.txt80 Wake On LAN is not supported for the Intel(R) Gigabit VT Quad Port Server
Dvortex.txt61 3c982 Hydra Dual Port A
62 3c982 Hydra Dual Port B
De1000e.txt21 * NOTE: The Intel(R) PRO/1000 P Dual Port Server Adapter is supported by
Dixgbe.txt83 their original module type (i.e., the Intel(R) 10 Gigabit SR Dual Port
Dixgb.txt350 Switch Port
/linux-4.1.27/drivers/usb/
DKconfig133 slower than on a PCI/ISA Parallel Port, so timing critical
/linux-4.1.27/net/ipv4/netfilter/
DKconfig91 forms of full Network Address Port Translation. This can be
261 port forwarding and other forms of full Network Address Port
/linux-4.1.27/Documentation/devicetree/bindings/phy/
Dsamsung-phy.txt16 Samsung EXYNOS SoC series Display Port PHY
/linux-4.1.27/drivers/char/agp/
DKconfig6 AGP (Accelerated Graphics Port) is a bus system mainly used to
/linux-4.1.27/Documentation/arm64/
Dacpi_object_usage.txt56 == DeBuG Port table ==
137 Root Port), 7 (AER Endpoint), 8 (AER Bridge), or 9 (Generic Hardware
213 == Serial Port Console Redirection table ==
/linux-4.1.27/drivers/parport/
DKconfig143 tristate "AX88796 Parallel Port"
/linux-4.1.27/drivers/parisc/
DKconfig125 J5xxx+ machines. This enables IDE, Floppy, Parallel Port, and
/linux-4.1.27/Documentation/rapidio/
Dsysfs.txt115 "Master Port" or "mport") are presented in sysfs as the special class of
Drapidio.txt32 2.1 Master Port
283 in the system, it sets the Discovered bit in the Port General Control CSR
/linux-4.1.27/arch/cris/arch-v10/drivers/
DKconfig459 Selects the pin on Port B where the data pin is connected
466 Select the pin on Port B where the clock pin is connected
/linux-4.1.27/drivers/scsi/mpt3sas/
Dmpt3sas_transport.c1685 sas_iounit_pg0->PhyData[i].Port, i); in _transport_phy_enable()
1723 sas_iounit_pg1->PhyData[i].Port = in _transport_phy_enable()
1724 sas_iounit_pg0->PhyData[i].Port; in _transport_phy_enable()
/linux-4.1.27/drivers/scsi/mpt2sas/
Dmpt2sas_transport.c1703 sas_iounit_pg0->PhyData[i].Port, i); in _transport_phy_enable()
1740 sas_iounit_pg1->PhyData[i].Port = in _transport_phy_enable()
1741 sas_iounit_pg0->PhyData[i].Port; in _transport_phy_enable()
/linux-4.1.27/Documentation/serial/
Drocket.txt140 | Unused| Card | I/O Port Block|
Dmoxa-smartio173 Board Num. Dial-in Port Callout port
438 msmon - Port Monitoring
/linux-4.1.27/Documentation/virtual/kvm/
Dtimekeeping.txt71 |------>| CLOCK OUT | ---------> Port 61h, bit 5
73 Port 61h, bit 0 ---------->| GATE TIMER 2 | \_.---- ____
76 Port 61h, bit 1 -----------------------------------/
/linux-4.1.27/Documentation/arm/Samsung-S3C24XX/
DOverview.txt299 Port Contributors
/linux-4.1.27/drivers/scsi/lpfc/
Dlpfc.h809 char Port[20]; /* Port No */ member
Dlpfc_init.c1976 phba->Port[j++] = vpd[index++]; in lpfc_parse_vpd()
1983 phba->Port[j] = 0; in lpfc_parse_vpd()
2253 phba->Port); in lpfc_get_hba_model_desc()
4120 port_name = phba->Port[0]; in lpfc_sli4_async_sli_evt()
Dlpfc_scsi.c4411 if (phba->Port[0]) { in lpfc_info()
4415 phba->Port); in lpfc_info()
/linux-4.1.27/Documentation/devicetree/bindings/
Dxilinx.txt274 of the FPGA through the Internal Configuration Access Port
/linux-4.1.27/drivers/scsi/aic7xxx/
Daic79xx.reg2725 * Negotiation Table Annex Data Port.
2998 * CMC SG RAM Data Port
3008 * CMC SCB RAM Data Port
3049 * Flex DMA Data Port
3454 * Sequencer RAM Data Port
Daic7xxx.reg504 * Serial Port I/O Cabability register (p. 4-95 aic7860 Data Book)
/linux-4.1.27/drivers/eisa/
Deisa.ids239 CPQ4401 "Compaq Integrated SCSI-2 Options Port"
977 ISABA00 "Alloy IMP2 Multiuser Port Controller"
978 ISABA01 "Alloy IMP8 Multiuser Port Controller"
1183 SGT0101 "AT&T GIS 8/16 Port Serial Controller"
/linux-4.1.27/drivers/ata/
DKconfig77 bool "SATA Port Multiplier support"
80 This option adds support for SATA Port Multipliers
/linux-4.1.27/drivers/dma/
DKconfig345 The Communications Port Programming Interface (CPPI) 4.1 DMA engine
/linux-4.1.27/drivers/tty/serial/8250/
DKconfig271 If you have an Atomwide Serial card or Serial Port card for an Acorn
/linux-4.1.27/drivers/gpio/
DKconfig552 tristate "MAX7319, MAX7320-7327 I2C Port Expanders"
556 Port Expanders. Each IO port on these chips has a fixed role of
/linux-4.1.27/Documentation/ioctl/
Dioctl-number.txt301 0xA3 80-8F Port ACL in development:
/linux-4.1.27/drivers/net/irda/
DKconfig299 tristate "Toshiba Type-O IR Port"
/linux-4.1.27/drivers/tty/
Dsynclink.c665 static u16 usc_InDmaReg( struct mgsl_struct *info, u16 Port );
666 static void usc_OutDmaReg( struct mgsl_struct *info, u16 Port, u16 Value );
669 static u16 usc_InReg( struct mgsl_struct *info, u16 Port );
670 static void usc_OutReg( struct mgsl_struct *info, u16 Port, u16 Value );
/linux-4.1.27/drivers/usb/gadget/legacy/
DKconfig442 to interact with an EHCI Debug Port.
/linux-4.1.27/
DCREDITS138 D: Linux-AFS Port, random kernel hacker,
1822 D: Port of the syncppp.c from the 2.0 to the 2.1 kernel.
2878 D: Port of the database Postgres
2909 D: Linux/MIPS AMD/Alchemy Port and mips hacking and debugging
3626 D: Port uClinux to the Motorola ColdFire CPU
/linux-4.1.27/drivers/scsi/
DKconfig918 here and Y to "IOMEGA Parallel Port (ppa - older drives)", above.
935 EPP (Enhanced Parallel Port) is a standard for parallel ports which
1087 Memory mapped IO is faster than Port IO. Most people should
/linux-4.1.27/arch/arm/
DKconfig.debug1223 int "i.MX Debug UART Port Selection" if DEBUG_IMX1_UART || \
1241 int "Vybrid Debug UART Port Selection" if DEBUG_VF_UART
/linux-4.1.27/drivers/char/
DKconfig385 Access Port (ICAP) driver. The ICAP is used on Xilinx Virtex
/linux-4.1.27/sound/pci/
DKconfig165 Digital Enhanced Game Port, 1.024MHz multimedia sequencer timer,
/linux-4.1.27/Documentation/netlabel/
Ddraft-ietf-cipso-ipsecurity-01.txt514 4.1 Port Range Parameters

12