Searched refs:PCLK_UART2 (Results 1 - 49 of 49) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h75 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h87 #define PCLK_UART2 334 macro
H A Drk3288-cru.h138 #define PCLK_UART2 343 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h75 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h87 #define PCLK_UART2 334 macro
H A Drk3288-cru.h138 #define PCLK_UART2 343 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h75 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h87 #define PCLK_UART2 334 macro
H A Drk3288-cru.h138 #define PCLK_UART2 343 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h75 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h87 #define PCLK_UART2 334 macro
H A Drk3288-cru.h138 #define PCLK_UART2 343 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h75 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h87 #define PCLK_UART2 334 macro
H A Drk3288-cru.h138 #define PCLK_UART2 343 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h75 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h87 #define PCLK_UART2 334 macro
H A Drk3288-cru.h138 #define PCLK_UART2 343 macro
/linux-4.1.27/drivers/clk/samsung/
H A Dclk-s3c2410.c128 GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 12, 0, 0),
223 ALIAS(PCLK_UART2, "s3c2410-uart.2", "uart"),
226 ALIAS(PCLK_UART2, "s3c2410-uart.2", "clk_uart_baud0"),
311 ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"),
314 ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"),
H A Dclk-s3c2412.c163 GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 21, 0, 0),
189 ALIAS(PCLK_UART2, "s3c2412-uart.2", "uart"),
192 ALIAS(PCLK_UART2, "s3c2412-uart.2", "clk_uart_baud2"),
H A Dclk-s3c2443.c188 GATE(PCLK_UART2, "uart2", "pclk", PCLKCON, 2, 0, 0),
198 ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"),
202 ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"),
H A Dclk-s3c64xx.c309 GATE_BUS(PCLK_UART2, "pclk_uart2", "pclk", PCLK_GATE, 3),
414 ALIAS(PCLK_UART2, "s3c6400-uart.2", "uart"),
H A Dclk-exynos7.c669 GATE(PCLK_UART2, "pclk_uart2", "mout_aclk_peric1_66_user",
/linux-4.1.27/drivers/clk/rockchip/
H A Dclk-rk3188.c496 GATE(PCLK_UART2, "pclk_uart2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
H A Dclk-rk3288.c646 GATE(PCLK_UART2, "pclk_uart2", "pclk_cpu", 0, RK3288_CLKGATE_CON(11), 9, GFLAGS),

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