Searched refs:PCI_BASE_ADDRESS_MEM_MASK (Results 1 – 22 of 22) sorted by relevance
322 plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK; in pci200_pci_init_one()325 scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK; in pci200_pci_init_one()328 ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK; in pci200_pci_init_one()
336 plxphys = pci_resource_start(pdev, 0) & PCI_BASE_ADDRESS_MEM_MASK; in pc300_pci_init_one()339 scaphys = pci_resource_start(pdev, 2) & PCI_BASE_ADDRESS_MEM_MASK; in pc300_pci_init_one()342 ramphys = pci_resource_start(pdev, 3) & PCI_BASE_ADDRESS_MEM_MASK; in pc300_pci_init_one()
328 PCI_BASE_ADDRESS_MEM_MASK; in irongate_ioremap()348 PCI_BASE_ADDRESS_MEM_MASK) + IRONGATE_MEM); in irongate_ioremap()
160 aper_base = (aperturebase & PCI_BASE_ADDRESS_MEM_MASK); in amd64_configure()426 baseaddr&= ~PCI_BASE_ADDRESS_MEM_MASK; in uli_agp_init()495 apbar &= ~PCI_BASE_ADDRESS_MEM_MASK; in nforce3_agp_init()
178 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); in serverworks_create_gatt_table()273 temp = (temp & PCI_BASE_ADDRESS_MEM_MASK); in serverworks_configure()
257 & PCI_BASE_ADDRESS_MEM_MASK; in init_ohci1394_controller()
108 bar_size &= PCI_BASE_ADDRESS_MEM_MASK; in pciauto_setup_bars()
74 return (addr & PCI_BASE_ADDRESS_MEM_MASK) | flags; in pcie_bar_low_val()152 u64 mask = (~(size - 1) & PCI_BASE_ADDRESS_MEM_MASK) | flags; in xgene_pcie_set_ib_mask()
422 size = (size & PCI_BASE_ADDRESS_MEM_MASK); in fixup_pmc551()461 if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) { in fixup_pmc551()
1296 start_address &= PCI_BASE_ADDRESS_MEM_MASK; in unconfigure_boot_device()1310 start_address &= PCI_BASE_ADDRESS_MEM_MASK; in unconfigure_boot_device()1411 start_address &= PCI_BASE_ADDRESS_MEM_MASK; in unconfigure_boot_bridge()1423 start_address &= PCI_BASE_ADDRESS_MEM_MASK; in unconfigure_boot_bridge()
63 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK; in pci_update_resource()
138 flags = bar & ~PCI_BASE_ADDRESS_MEM_MASK; in decode_bar()221 l64 = l & PCI_BASE_ADDRESS_MEM_MASK; in __pci_read_base()222 sz64 = sz & PCI_BASE_ADDRESS_MEM_MASK; in __pci_read_base()223 mask64 = (u32)PCI_BASE_ADDRESS_MEM_MASK; in __pci_read_base()
422 par->frame_buffer_phys = addr & PCI_BASE_ADDRESS_MEM_MASK; in igafb_init()
291 ep->fb_base_reg &= PCI_BASE_ADDRESS_MEM_MASK; in e3d_pci_register()
99 #define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL) macro
244 ret &= PCI_BASE_ADDRESS_MEM_MASK; in divasa_get_pci_bar()
870 if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) { in early_dbgp_init()
852 base &= PCI_BASE_ADDRESS_MEM_MASK; in fsl_pci_immrbar_base()
421 (u32)PCI_BASE_ADDRESS_MEM_MASK; in pm8001_ioremap()
1764 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK, in vt6655_probe()
1386 phba->pcb->hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) + in lpfc_config_port()
3093 bar0 &= PCI_BASE_ADDRESS_MEM_MASK; in setup_memwin()3126 start &= PCI_BASE_ADDRESS_MEM_MASK; in setup_memwin_rdma()