1 /*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: device_main.c
20 *
21 * Purpose: driver entry for initial, open, close, tx and rx.
22 *
23 * Author: Lyndon Chen
24 *
25 * Date: Jan 8, 2003
26 *
27 * Functions:
28 *
29 * vt6655_probe - module initial (insmod) driver entry
30 * vt6655_remove - module remove entry
31 * vt6655_init_info - device structure resource allocation function
32 * device_free_info - device structure resource free function
33 * device_get_pci_info - get allocated pci io/mem resource
34 * device_print_info - print out resource
35 * device_intr - interrupt handle function
36 * device_rx_srv - rx service function
37 * device_alloc_rx_buf - rx buffer pre-allocated function
38 * device_free_tx_buf - free tx buffer function
39 * device_init_rd0_ring- initial rd dma0 ring
40 * device_init_rd1_ring- initial rd dma1 ring
41 * device_init_td0_ring- initial tx dma0 ring buffer
42 * device_init_td1_ring- initial tx dma1 ring buffer
43 * device_init_registers- initial MAC & BBP & RF internal registers.
44 * device_init_rings- initial tx/rx ring buffer
45 * device_free_rings- free all allocated ring buffer
46 * device_tx_srv- tx interrupt service function
47 *
48 * Revision History:
49 */
50 #undef __NO_VERSION__
51
52 #include <linux/file.h>
53 #include "device.h"
54 #include "card.h"
55 #include "channel.h"
56 #include "baseband.h"
57 #include "mac.h"
58 #include "power.h"
59 #include "rxtx.h"
60 #include "dpc.h"
61 #include "rf.h"
62 #include <linux/delay.h>
63 #include <linux/kthread.h>
64 #include <linux/slab.h>
65
66 /*--------------------- Static Definitions -------------------------*/
67 /*
68 * Define module options
69 */
70 MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
71 MODULE_LICENSE("GPL");
72 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
73
74 #define DEVICE_PARAM(N, D)
75
76 #define RX_DESC_MIN0 16
77 #define RX_DESC_MAX0 128
78 #define RX_DESC_DEF0 32
79 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
80
81 #define RX_DESC_MIN1 16
82 #define RX_DESC_MAX1 128
83 #define RX_DESC_DEF1 32
84 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
85
86 #define TX_DESC_MIN0 16
87 #define TX_DESC_MAX0 128
88 #define TX_DESC_DEF0 32
89 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
90
91 #define TX_DESC_MIN1 16
92 #define TX_DESC_MAX1 128
93 #define TX_DESC_DEF1 64
94 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
95
96 #define INT_WORKS_DEF 20
97 #define INT_WORKS_MIN 10
98 #define INT_WORKS_MAX 64
99
100 DEVICE_PARAM(int_works, "Number of packets per interrupt services");
101
102 #define RTS_THRESH_DEF 2347
103
104 #define FRAG_THRESH_DEF 2346
105
106 #define SHORT_RETRY_MIN 0
107 #define SHORT_RETRY_MAX 31
108 #define SHORT_RETRY_DEF 8
109
110 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
111
112 #define LONG_RETRY_MIN 0
113 #define LONG_RETRY_MAX 15
114 #define LONG_RETRY_DEF 4
115
116 DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
117
118 /* BasebandType[] baseband type selected
119 0: indicate 802.11a type
120 1: indicate 802.11b type
121 2: indicate 802.11g type
122 */
123 #define BBP_TYPE_MIN 0
124 #define BBP_TYPE_MAX 2
125 #define BBP_TYPE_DEF 2
126
127 DEVICE_PARAM(BasebandType, "baseband type");
128
129 /*
130 * Static vars definitions
131 */
132 static CHIP_INFO chip_info_table[] = {
133 { VT3253, "VIA Networking Solomon-A/B/G Wireless LAN Adapter ",
134 256, 1, DEVICE_FLAGS_IP_ALIGN|DEVICE_FLAGS_TX_ALIGN },
135 {0, NULL}
136 };
137
138 static const struct pci_device_id vt6655_pci_id_table[] = {
139 { PCI_VDEVICE(VIA, 0x3253), (kernel_ulong_t)chip_info_table},
140 { 0, }
141 };
142
143 /*--------------------- Static Functions --------------------------*/
144
145 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
146 static void vt6655_init_info(struct pci_dev *pcid,
147 struct vnt_private **ppDevice, PCHIP_INFO);
148 static void device_free_info(struct vnt_private *pDevice);
149 static bool device_get_pci_info(struct vnt_private *, struct pci_dev *pcid);
150 static void device_print_info(struct vnt_private *pDevice);
151 static irqreturn_t device_intr(int irq, void *dev_instance);
152
153 #ifdef CONFIG_PM
154 static int device_notify_reboot(struct notifier_block *, unsigned long event, void *ptr);
155 static struct notifier_block device_notifier = {
156 .notifier_call = device_notify_reboot,
157 .next = NULL,
158 .priority = 0,
159 };
160 #endif
161
162 static void device_init_rd0_ring(struct vnt_private *pDevice);
163 static void device_init_rd1_ring(struct vnt_private *pDevice);
164 static void device_init_td0_ring(struct vnt_private *pDevice);
165 static void device_init_td1_ring(struct vnt_private *pDevice);
166
167 static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx);
168 static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx);
169 static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pDesc);
170 static void device_init_registers(struct vnt_private *pDevice);
171 static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc);
172 static void device_free_td0_ring(struct vnt_private *pDevice);
173 static void device_free_td1_ring(struct vnt_private *pDevice);
174 static void device_free_rd0_ring(struct vnt_private *pDevice);
175 static void device_free_rd1_ring(struct vnt_private *pDevice);
176 static void device_free_rings(struct vnt_private *pDevice);
177
178 /*--------------------- Export Variables --------------------------*/
179
180 /*--------------------- Export Functions --------------------------*/
181
get_chip_name(int chip_id)182 static char *get_chip_name(int chip_id)
183 {
184 int i;
185
186 for (i = 0; chip_info_table[i].name != NULL; i++)
187 if (chip_info_table[i].chip_id == chip_id)
188 break;
189 return chip_info_table[i].name;
190 }
191
vt6655_remove(struct pci_dev * pcid)192 static void vt6655_remove(struct pci_dev *pcid)
193 {
194 struct vnt_private *pDevice = pci_get_drvdata(pcid);
195
196 if (pDevice == NULL)
197 return;
198 device_free_info(pDevice);
199 }
200
device_get_options(struct vnt_private * pDevice)201 static void device_get_options(struct vnt_private *pDevice)
202 {
203 POPTIONS pOpts = &(pDevice->sOpts);
204
205 pOpts->nRxDescs0 = RX_DESC_DEF0;
206 pOpts->nRxDescs1 = RX_DESC_DEF1;
207 pOpts->nTxDescs[0] = TX_DESC_DEF0;
208 pOpts->nTxDescs[1] = TX_DESC_DEF1;
209 pOpts->int_works = INT_WORKS_DEF;
210
211 pOpts->short_retry = SHORT_RETRY_DEF;
212 pOpts->long_retry = LONG_RETRY_DEF;
213 pOpts->bbp_type = BBP_TYPE_DEF;
214 }
215
216 static void
device_set_options(struct vnt_private * pDevice)217 device_set_options(struct vnt_private *pDevice)
218 {
219 pDevice->byShortRetryLimit = pDevice->sOpts.short_retry;
220 pDevice->byLongRetryLimit = pDevice->sOpts.long_retry;
221 pDevice->byBBType = pDevice->sOpts.bbp_type;
222 pDevice->byPacketType = pDevice->byBBType;
223 pDevice->byAutoFBCtrl = AUTO_FB_0;
224 pDevice->bUpdateBBVGA = true;
225 pDevice->byPreambleType = 0;
226
227 pr_debug(" byShortRetryLimit= %d\n", (int)pDevice->byShortRetryLimit);
228 pr_debug(" byLongRetryLimit= %d\n", (int)pDevice->byLongRetryLimit);
229 pr_debug(" byPreambleType= %d\n", (int)pDevice->byPreambleType);
230 pr_debug(" byShortPreamble= %d\n", (int)pDevice->byShortPreamble);
231 pr_debug(" byBBType= %d\n", (int)pDevice->byBBType);
232 }
233
234 /*
235 * Initialisation of MAC & BBP registers
236 */
237
device_init_registers(struct vnt_private * pDevice)238 static void device_init_registers(struct vnt_private *pDevice)
239 {
240 unsigned long flags;
241 unsigned int ii;
242 unsigned char byValue;
243 unsigned char byCCKPwrdBm = 0;
244 unsigned char byOFDMPwrdBm = 0;
245
246 MACbShutdown(pDevice->PortOffset);
247 BBvSoftwareReset(pDevice);
248
249 /* Do MACbSoftwareReset in MACvInitialize */
250 MACbSoftwareReset(pDevice->PortOffset);
251
252 pDevice->bAES = false;
253
254 /* Only used in 11g type, sync with ERP IE */
255 pDevice->bProtectMode = false;
256
257 pDevice->bNonERPPresent = false;
258 pDevice->bBarkerPreambleMd = false;
259 pDevice->wCurrentRate = RATE_1M;
260 pDevice->byTopOFDMBasicRate = RATE_24M;
261 pDevice->byTopCCKBasicRate = RATE_1M;
262
263 /* Target to IF pin while programming to RF chip. */
264 pDevice->byRevId = 0;
265
266 /* init MAC */
267 MACvInitialize(pDevice->PortOffset);
268
269 /* Get Local ID */
270 VNSvInPortB(pDevice->PortOffset + MAC_REG_LOCALID, &pDevice->byLocalID);
271
272 spin_lock_irqsave(&pDevice->lock, flags);
273
274 SROMvReadAllContents(pDevice->PortOffset, pDevice->abyEEPROM);
275
276 spin_unlock_irqrestore(&pDevice->lock, flags);
277
278 /* Get Channel range */
279 pDevice->byMinChannel = 1;
280 pDevice->byMaxChannel = CB_MAX_CHANNEL;
281
282 /* Get Antena */
283 byValue = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_ANTENNA);
284 if (byValue & EEP_ANTINV)
285 pDevice->bTxRxAntInv = true;
286 else
287 pDevice->bTxRxAntInv = false;
288
289 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
290 /* if not set default is All */
291 if (byValue == 0)
292 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
293
294 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
295 pDevice->byAntennaCount = 2;
296 pDevice->byTxAntennaMode = ANT_B;
297 pDevice->dwTxAntennaSel = 1;
298 pDevice->dwRxAntennaSel = 1;
299
300 if (pDevice->bTxRxAntInv)
301 pDevice->byRxAntennaMode = ANT_A;
302 else
303 pDevice->byRxAntennaMode = ANT_B;
304 } else {
305 pDevice->byAntennaCount = 1;
306 pDevice->dwTxAntennaSel = 0;
307 pDevice->dwRxAntennaSel = 0;
308
309 if (byValue & EEP_ANTENNA_AUX) {
310 pDevice->byTxAntennaMode = ANT_A;
311
312 if (pDevice->bTxRxAntInv)
313 pDevice->byRxAntennaMode = ANT_B;
314 else
315 pDevice->byRxAntennaMode = ANT_A;
316 } else {
317 pDevice->byTxAntennaMode = ANT_B;
318
319 if (pDevice->bTxRxAntInv)
320 pDevice->byRxAntennaMode = ANT_A;
321 else
322 pDevice->byRxAntennaMode = ANT_B;
323 }
324 }
325
326 /* Set initial antenna mode */
327 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
328 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
329
330 /* zonetype initial */
331 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
332
333 if (!pDevice->bZoneRegExist)
334 pDevice->byZoneType = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
335
336 pr_debug("pDevice->byZoneType = %x\n", pDevice->byZoneType);
337
338 /* Init RF module */
339 RFbInit(pDevice);
340
341 /* Get Desire Power Value */
342 pDevice->byCurPwr = 0xFF;
343 pDevice->byCCKPwr = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_CCK);
344 pDevice->byOFDMPwrG = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_OFDMG);
345
346 /* Load power Table */
347 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
348 pDevice->abyCCKPwrTbl[ii + 1] =
349 SROMbyReadEmbedded(pDevice->PortOffset,
350 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
351 if (pDevice->abyCCKPwrTbl[ii + 1] == 0)
352 pDevice->abyCCKPwrTbl[ii+1] = pDevice->byCCKPwr;
353
354 pDevice->abyOFDMPwrTbl[ii + 1] =
355 SROMbyReadEmbedded(pDevice->PortOffset,
356 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
357 if (pDevice->abyOFDMPwrTbl[ii + 1] == 0)
358 pDevice->abyOFDMPwrTbl[ii + 1] = pDevice->byOFDMPwrG;
359
360 pDevice->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
361 pDevice->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
362 }
363
364 /* recover 12,13 ,14channel for EUROPE by 11 channel */
365 for (ii = 11; ii < 14; ii++) {
366 pDevice->abyCCKPwrTbl[ii] = pDevice->abyCCKPwrTbl[10];
367 pDevice->abyOFDMPwrTbl[ii] = pDevice->abyOFDMPwrTbl[10];
368 }
369
370 /* Load OFDM A Power Table */
371 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
372 pDevice->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
373 SROMbyReadEmbedded(pDevice->PortOffset,
374 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
375
376 pDevice->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
377 SROMbyReadEmbedded(pDevice->PortOffset,
378 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
379 }
380
381 if (pDevice->byLocalID > REV_ID_VT3253_B1) {
382 MACvSelectPage1(pDevice->PortOffset);
383
384 VNSvOutPortB(pDevice->PortOffset + MAC_REG_MSRCTL + 1,
385 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
386
387 MACvSelectPage0(pDevice->PortOffset);
388 }
389
390 /* use relative tx timeout and 802.11i D4 */
391 MACvWordRegBitsOn(pDevice->PortOffset,
392 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
393
394 /* set performance parameter by registry */
395 MACvSetShortRetryLimit(pDevice->PortOffset, pDevice->byShortRetryLimit);
396 MACvSetLongRetryLimit(pDevice->PortOffset, pDevice->byLongRetryLimit);
397
398 /* reset TSF counter */
399 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
400 /* enable TSF counter */
401 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
402
403 /* initialize BBP registers */
404 BBbVT3253Init(pDevice);
405
406 if (pDevice->bUpdateBBVGA) {
407 pDevice->byBBVGACurrent = pDevice->abyBBVGA[0];
408 pDevice->byBBVGANew = pDevice->byBBVGACurrent;
409 BBvSetVGAGainOffset(pDevice, pDevice->abyBBVGA[0]);
410 }
411
412 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
413 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
414
415 /* Set BB and packet type at the same time. */
416 /* Set Short Slot Time, xIFS, and RSPINF. */
417 pDevice->wCurrentRate = RATE_54M;
418
419 pDevice->bRadioOff = false;
420
421 pDevice->byRadioCtl = SROMbyReadEmbedded(pDevice->PortOffset,
422 EEP_OFS_RADIOCTL);
423 pDevice->bHWRadioOff = false;
424
425 if (pDevice->byRadioCtl & EEP_RADIOCTL_ENABLE) {
426 /* Get GPIO */
427 MACvGPIOIn(pDevice->PortOffset, &pDevice->byGPIO);
428
429 if (((pDevice->byGPIO & GPIO0_DATA) &&
430 !(pDevice->byRadioCtl & EEP_RADIOCTL_INV)) ||
431 (!(pDevice->byGPIO & GPIO0_DATA) &&
432 (pDevice->byRadioCtl & EEP_RADIOCTL_INV)))
433 pDevice->bHWRadioOff = true;
434 }
435
436 if (pDevice->bHWRadioOff || pDevice->bRadioControlOff)
437 CARDbRadioPowerOff(pDevice);
438
439 /* get Permanent network address */
440 SROMvReadEtherAddress(pDevice->PortOffset, pDevice->abyCurrentNetAddr);
441 pr_debug("Network address = %pM\n", pDevice->abyCurrentNetAddr);
442
443 /* reset Tx pointer */
444 CARDvSafeResetRx(pDevice);
445 /* reset Rx pointer */
446 CARDvSafeResetTx(pDevice);
447
448 if (pDevice->byLocalID <= REV_ID_VT3253_A1)
449 MACvRegBitsOn(pDevice->PortOffset, MAC_REG_RCR, RCR_WPAERR);
450
451 /* Turn On Rx DMA */
452 MACvReceive0(pDevice->PortOffset);
453 MACvReceive1(pDevice->PortOffset);
454
455 /* start the adapter */
456 MACvStart(pDevice->PortOffset);
457 }
458
device_print_info(struct vnt_private * pDevice)459 static void device_print_info(struct vnt_private *pDevice)
460 {
461 dev_info(&pDevice->pcid->dev, "%s\n", get_chip_name(pDevice->chip_id));
462
463 dev_info(&pDevice->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
464 pDevice->abyCurrentNetAddr, (unsigned long)pDevice->ioaddr,
465 (unsigned long)pDevice->PortOffset, pDevice->pcid->irq);
466 }
467
vt6655_init_info(struct pci_dev * pcid,struct vnt_private ** ppDevice,PCHIP_INFO pChip_info)468 static void vt6655_init_info(struct pci_dev *pcid,
469 struct vnt_private **ppDevice,
470 PCHIP_INFO pChip_info)
471 {
472 memset(*ppDevice, 0, sizeof(**ppDevice));
473
474 (*ppDevice)->pcid = pcid;
475 (*ppDevice)->chip_id = pChip_info->chip_id;
476 (*ppDevice)->io_size = pChip_info->io_size;
477 (*ppDevice)->nTxQueues = pChip_info->nTxQueue;
478 (*ppDevice)->multicast_limit = 32;
479
480 spin_lock_init(&((*ppDevice)->lock));
481 }
482
device_get_pci_info(struct vnt_private * pDevice,struct pci_dev * pcid)483 static bool device_get_pci_info(struct vnt_private *pDevice,
484 struct pci_dev *pcid)
485 {
486 u16 pci_cmd;
487 u8 b;
488 unsigned int cis_addr;
489
490 pci_read_config_byte(pcid, PCI_REVISION_ID, &pDevice->byRevId);
491 pci_read_config_word(pcid, PCI_SUBSYSTEM_ID, &pDevice->SubSystemID);
492 pci_read_config_word(pcid, PCI_SUBSYSTEM_VENDOR_ID, &pDevice->SubVendorID);
493 pci_read_config_word(pcid, PCI_COMMAND, (u16 *)&(pci_cmd));
494
495 pci_set_master(pcid);
496
497 pDevice->memaddr = pci_resource_start(pcid, 0);
498 pDevice->ioaddr = pci_resource_start(pcid, 1);
499
500 cis_addr = pci_resource_start(pcid, 2);
501
502 pDevice->pcid = pcid;
503
504 pci_read_config_byte(pcid, PCI_COMMAND, &b);
505 pci_write_config_byte(pcid, PCI_COMMAND, (b|PCI_COMMAND_MASTER));
506
507 return true;
508 }
509
device_free_info(struct vnt_private * pDevice)510 static void device_free_info(struct vnt_private *pDevice)
511 {
512 if (!pDevice)
513 return;
514
515 if (pDevice->mac_hw)
516 ieee80211_unregister_hw(pDevice->hw);
517
518 if (pDevice->PortOffset)
519 iounmap(pDevice->PortOffset);
520
521 if (pDevice->pcid)
522 pci_release_regions(pDevice->pcid);
523
524 if (pDevice->hw)
525 ieee80211_free_hw(pDevice->hw);
526 }
527
device_init_rings(struct vnt_private * pDevice)528 static bool device_init_rings(struct vnt_private *pDevice)
529 {
530 void *vir_pool;
531
532 /*allocate all RD/TD rings a single pool*/
533 vir_pool = dma_zalloc_coherent(&pDevice->pcid->dev,
534 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
535 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
536 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
537 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
538 &pDevice->pool_dma, GFP_ATOMIC);
539 if (vir_pool == NULL) {
540 dev_err(&pDevice->pcid->dev, "allocate desc dma memory failed\n");
541 return false;
542 }
543
544 pDevice->aRD0Ring = vir_pool;
545 pDevice->aRD1Ring = vir_pool +
546 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
547
548 pDevice->rd0_pool_dma = pDevice->pool_dma;
549 pDevice->rd1_pool_dma = pDevice->rd0_pool_dma +
550 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
551
552 pDevice->tx0_bufs = dma_zalloc_coherent(&pDevice->pcid->dev,
553 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
554 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
555 CB_BEACON_BUF_SIZE +
556 CB_MAX_BUF_SIZE,
557 &pDevice->tx_bufs_dma0,
558 GFP_ATOMIC);
559 if (pDevice->tx0_bufs == NULL) {
560 dev_err(&pDevice->pcid->dev, "allocate buf dma memory failed\n");
561
562 dma_free_coherent(&pDevice->pcid->dev,
563 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
564 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
565 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
566 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
567 vir_pool, pDevice->pool_dma
568 );
569 return false;
570 }
571
572 pDevice->td0_pool_dma = pDevice->rd1_pool_dma +
573 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
574
575 pDevice->td1_pool_dma = pDevice->td0_pool_dma +
576 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
577
578 /* vir_pool: pvoid type */
579 pDevice->apTD0Rings = vir_pool
580 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
581 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
582
583 pDevice->apTD1Rings = vir_pool
584 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
585 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc)
586 + pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
587
588 pDevice->tx1_bufs = pDevice->tx0_bufs +
589 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
590
591 pDevice->tx_beacon_bufs = pDevice->tx1_bufs +
592 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
593
594 pDevice->pbyTmpBuff = pDevice->tx_beacon_bufs +
595 CB_BEACON_BUF_SIZE;
596
597 pDevice->tx_bufs_dma1 = pDevice->tx_bufs_dma0 +
598 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
599
600 pDevice->tx_beacon_dma = pDevice->tx_bufs_dma1 +
601 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
602
603 return true;
604 }
605
device_free_rings(struct vnt_private * pDevice)606 static void device_free_rings(struct vnt_private *pDevice)
607 {
608 dma_free_coherent(&pDevice->pcid->dev,
609 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
610 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
611 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
612 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc)
613 ,
614 pDevice->aRD0Ring, pDevice->pool_dma
615 );
616
617 if (pDevice->tx0_bufs)
618 dma_free_coherent(&pDevice->pcid->dev,
619 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
620 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
621 CB_BEACON_BUF_SIZE +
622 CB_MAX_BUF_SIZE,
623 pDevice->tx0_bufs, pDevice->tx_bufs_dma0
624 );
625 }
626
device_init_rd0_ring(struct vnt_private * pDevice)627 static void device_init_rd0_ring(struct vnt_private *pDevice)
628 {
629 int i;
630 dma_addr_t curr = pDevice->rd0_pool_dma;
631 PSRxDesc pDesc;
632
633 /* Init the RD0 ring entries */
634 for (i = 0; i < pDevice->sOpts.nRxDescs0; i ++, curr += sizeof(SRxDesc)) {
635 pDesc = &(pDevice->aRD0Ring[i]);
636 pDesc->pRDInfo = alloc_rd_info();
637 ASSERT(pDesc->pRDInfo);
638 if (!device_alloc_rx_buf(pDevice, pDesc))
639 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
640
641 pDesc->next = &(pDevice->aRD0Ring[(i+1) % pDevice->sOpts.nRxDescs0]);
642 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
643 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
644 }
645
646 if (i > 0)
647 pDevice->aRD0Ring[i-1].next_desc = cpu_to_le32(pDevice->rd0_pool_dma);
648 pDevice->pCurrRD[0] = &(pDevice->aRD0Ring[0]);
649 }
650
device_init_rd1_ring(struct vnt_private * pDevice)651 static void device_init_rd1_ring(struct vnt_private *pDevice)
652 {
653 int i;
654 dma_addr_t curr = pDevice->rd1_pool_dma;
655 PSRxDesc pDesc;
656
657 /* Init the RD1 ring entries */
658 for (i = 0; i < pDevice->sOpts.nRxDescs1; i ++, curr += sizeof(SRxDesc)) {
659 pDesc = &(pDevice->aRD1Ring[i]);
660 pDesc->pRDInfo = alloc_rd_info();
661 ASSERT(pDesc->pRDInfo);
662 if (!device_alloc_rx_buf(pDevice, pDesc))
663 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
664
665 pDesc->next = &(pDevice->aRD1Ring[(i+1) % pDevice->sOpts.nRxDescs1]);
666 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
667 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
668 }
669
670 if (i > 0)
671 pDevice->aRD1Ring[i-1].next_desc = cpu_to_le32(pDevice->rd1_pool_dma);
672 pDevice->pCurrRD[1] = &(pDevice->aRD1Ring[0]);
673 }
674
device_free_rd0_ring(struct vnt_private * pDevice)675 static void device_free_rd0_ring(struct vnt_private *pDevice)
676 {
677 int i;
678
679 for (i = 0; i < pDevice->sOpts.nRxDescs0; i++) {
680 PSRxDesc pDesc = &(pDevice->aRD0Ring[i]);
681 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
682
683 dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
684 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
685
686 dev_kfree_skb(pRDInfo->skb);
687
688 kfree(pDesc->pRDInfo);
689 }
690 }
691
device_free_rd1_ring(struct vnt_private * pDevice)692 static void device_free_rd1_ring(struct vnt_private *pDevice)
693 {
694 int i;
695
696 for (i = 0; i < pDevice->sOpts.nRxDescs1; i++) {
697 PSRxDesc pDesc = &(pDevice->aRD1Ring[i]);
698 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
699
700 dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
701 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
702
703 dev_kfree_skb(pRDInfo->skb);
704
705 kfree(pDesc->pRDInfo);
706 }
707 }
708
device_init_td0_ring(struct vnt_private * pDevice)709 static void device_init_td0_ring(struct vnt_private *pDevice)
710 {
711 int i;
712 dma_addr_t curr;
713 PSTxDesc pDesc;
714
715 curr = pDevice->td0_pool_dma;
716 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++, curr += sizeof(STxDesc)) {
717 pDesc = &(pDevice->apTD0Rings[i]);
718 pDesc->pTDInfo = alloc_td_info();
719 ASSERT(pDesc->pTDInfo);
720 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
721 pDesc->pTDInfo->buf = pDevice->tx0_bufs + (i)*PKT_BUF_SZ;
722 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma0 + (i)*PKT_BUF_SZ;
723 }
724 pDesc->next = &(pDevice->apTD0Rings[(i+1) % pDevice->sOpts.nTxDescs[0]]);
725 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
726 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
727 }
728
729 if (i > 0)
730 pDevice->apTD0Rings[i-1].next_desc = cpu_to_le32(pDevice->td0_pool_dma);
731 pDevice->apTailTD[0] = pDevice->apCurrTD[0] = &(pDevice->apTD0Rings[0]);
732 }
733
device_init_td1_ring(struct vnt_private * pDevice)734 static void device_init_td1_ring(struct vnt_private *pDevice)
735 {
736 int i;
737 dma_addr_t curr;
738 PSTxDesc pDesc;
739
740 /* Init the TD ring entries */
741 curr = pDevice->td1_pool_dma;
742 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++, curr += sizeof(STxDesc)) {
743 pDesc = &(pDevice->apTD1Rings[i]);
744 pDesc->pTDInfo = alloc_td_info();
745 ASSERT(pDesc->pTDInfo);
746 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
747 pDesc->pTDInfo->buf = pDevice->tx1_bufs + (i) * PKT_BUF_SZ;
748 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma1 + (i) * PKT_BUF_SZ;
749 }
750 pDesc->next = &(pDevice->apTD1Rings[(i + 1) % pDevice->sOpts.nTxDescs[1]]);
751 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
752 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
753 }
754
755 if (i > 0)
756 pDevice->apTD1Rings[i-1].next_desc = cpu_to_le32(pDevice->td1_pool_dma);
757 pDevice->apTailTD[1] = pDevice->apCurrTD[1] = &(pDevice->apTD1Rings[0]);
758 }
759
device_free_td0_ring(struct vnt_private * pDevice)760 static void device_free_td0_ring(struct vnt_private *pDevice)
761 {
762 int i;
763
764 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++) {
765 PSTxDesc pDesc = &(pDevice->apTD0Rings[i]);
766 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
767
768 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
769 dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
770 pTDInfo->skb->len, DMA_TO_DEVICE);
771
772 if (pTDInfo->skb)
773 dev_kfree_skb(pTDInfo->skb);
774
775 kfree(pDesc->pTDInfo);
776 }
777 }
778
device_free_td1_ring(struct vnt_private * pDevice)779 static void device_free_td1_ring(struct vnt_private *pDevice)
780 {
781 int i;
782
783 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++) {
784 PSTxDesc pDesc = &(pDevice->apTD1Rings[i]);
785 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
786
787 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
788 dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
789 pTDInfo->skb->len, DMA_TO_DEVICE);
790
791 if (pTDInfo->skb)
792 dev_kfree_skb(pTDInfo->skb);
793
794 kfree(pDesc->pTDInfo);
795 }
796 }
797
798 /*-----------------------------------------------------------------*/
799
device_rx_srv(struct vnt_private * pDevice,unsigned int uIdx)800 static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx)
801 {
802 PSRxDesc pRD;
803 int works = 0;
804
805 for (pRD = pDevice->pCurrRD[uIdx];
806 pRD->m_rd0RD0.f1Owner == OWNED_BY_HOST;
807 pRD = pRD->next) {
808 if (works++ > 15)
809 break;
810
811 if (!pRD->pRDInfo->skb)
812 break;
813
814 if (vnt_receive_frame(pDevice, pRD)) {
815 if (!device_alloc_rx_buf(pDevice, pRD)) {
816 dev_err(&pDevice->pcid->dev,
817 "can not allocate rx buf\n");
818 break;
819 }
820 }
821 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
822 }
823
824 pDevice->pCurrRD[uIdx] = pRD;
825
826 return works;
827 }
828
device_alloc_rx_buf(struct vnt_private * pDevice,PSRxDesc pRD)829 static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pRD)
830 {
831 PDEVICE_RD_INFO pRDInfo = pRD->pRDInfo;
832
833 pRDInfo->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
834 if (pRDInfo->skb == NULL)
835 return false;
836 ASSERT(pRDInfo->skb);
837
838 pRDInfo->skb_dma =
839 dma_map_single(&pDevice->pcid->dev,
840 skb_put(pRDInfo->skb, skb_tailroom(pRDInfo->skb)),
841 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
842
843 *((unsigned int *)&(pRD->m_rd0RD0)) = 0; /* FIX cast */
844
845 pRD->m_rd0RD0.wResCount = cpu_to_le16(pDevice->rx_buf_sz);
846 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
847 pRD->m_rd1RD1.wReqCount = cpu_to_le16(pDevice->rx_buf_sz);
848 pRD->buff_addr = cpu_to_le32(pRDInfo->skb_dma);
849
850 return true;
851 }
852
853 static const u8 fallback_rate0[5][5] = {
854 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
855 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
856 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
857 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
858 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
859 };
860
861 static const u8 fallback_rate1[5][5] = {
862 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
863 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
864 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
865 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
866 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
867 };
868
vnt_int_report_rate(struct vnt_private * priv,PDEVICE_TD_INFO context,u8 tsr0,u8 tsr1)869 static int vnt_int_report_rate(struct vnt_private *priv,
870 PDEVICE_TD_INFO context, u8 tsr0, u8 tsr1)
871 {
872 struct vnt_tx_fifo_head *fifo_head;
873 struct ieee80211_tx_info *info;
874 struct ieee80211_rate *rate;
875 u16 fb_option;
876 u8 tx_retry = (tsr0 & TSR0_NCR);
877 s8 idx;
878
879 if (!context)
880 return -ENOMEM;
881
882 if (!context->skb)
883 return -EINVAL;
884
885 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
886 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
887 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
888
889 info = IEEE80211_SKB_CB(context->skb);
890 idx = info->control.rates[0].idx;
891
892 if (fb_option && !(tsr1 & TSR1_TERR)) {
893 u8 tx_rate;
894 u8 retry = tx_retry;
895
896 rate = ieee80211_get_tx_rate(priv->hw, info);
897 tx_rate = rate->hw_value - RATE_18M;
898
899 if (retry > 4)
900 retry = 4;
901
902 if (fb_option & FIFOCTL_AUTO_FB_0)
903 tx_rate = fallback_rate0[tx_rate][retry];
904 else if (fb_option & FIFOCTL_AUTO_FB_1)
905 tx_rate = fallback_rate1[tx_rate][retry];
906
907 if (info->band == IEEE80211_BAND_5GHZ)
908 idx = tx_rate - RATE_6M;
909 else
910 idx = tx_rate;
911 }
912
913 ieee80211_tx_info_clear_status(info);
914
915 info->status.rates[0].count = tx_retry;
916
917 if (!(tsr1 & TSR1_TERR)) {
918 info->status.rates[0].idx = idx;
919
920 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
921 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
922 else
923 info->flags |= IEEE80211_TX_STAT_ACK;
924 }
925
926 return 0;
927 }
928
device_tx_srv(struct vnt_private * pDevice,unsigned int uIdx)929 static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx)
930 {
931 PSTxDesc pTD;
932 int works = 0;
933 unsigned char byTsr0;
934 unsigned char byTsr1;
935
936 for (pTD = pDevice->apTailTD[uIdx]; pDevice->iTDUsed[uIdx] > 0; pTD = pTD->next) {
937 if (pTD->m_td0TD0.f1Owner == OWNED_BY_NIC)
938 break;
939 if (works++ > 15)
940 break;
941
942 byTsr0 = pTD->m_td0TD0.byTSR0;
943 byTsr1 = pTD->m_td0TD0.byTSR1;
944
945 /* Only the status of first TD in the chain is correct */
946 if (pTD->m_td1TD1.byTCR & TCR_STP) {
947 if ((pTD->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB) != 0) {
948 if (!(byTsr1 & TSR1_TERR)) {
949 if (byTsr0 != 0) {
950 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
951 (int)uIdx, byTsr1,
952 byTsr0);
953 }
954 } else {
955 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
956 (int)uIdx, byTsr1, byTsr0);
957 }
958 }
959
960 if (byTsr1 & TSR1_TERR) {
961 if ((pTD->pTDInfo->byFlags & TD_FLAGS_PRIV_SKB) != 0) {
962 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
963 (int)uIdx, byTsr1, byTsr0);
964 }
965 }
966
967 vnt_int_report_rate(pDevice, pTD->pTDInfo, byTsr0, byTsr1);
968
969 device_free_tx_buf(pDevice, pTD);
970 pDevice->iTDUsed[uIdx]--;
971 }
972 }
973
974 pDevice->apTailTD[uIdx] = pTD;
975
976 return works;
977 }
978
device_error(struct vnt_private * pDevice,unsigned short status)979 static void device_error(struct vnt_private *pDevice, unsigned short status)
980 {
981 if (status & ISR_FETALERR) {
982 dev_err(&pDevice->pcid->dev, "Hardware fatal error\n");
983
984 MACbShutdown(pDevice->PortOffset);
985 return;
986 }
987 }
988
device_free_tx_buf(struct vnt_private * pDevice,PSTxDesc pDesc)989 static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc)
990 {
991 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
992 struct sk_buff *skb = pTDInfo->skb;
993
994 /* pre-allocated buf_dma can't be unmapped. */
995 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) {
996 dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
997 skb->len, DMA_TO_DEVICE);
998 }
999
1000 if (skb)
1001 ieee80211_tx_status_irqsafe(pDevice->hw, skb);
1002
1003 pTDInfo->skb_dma = 0;
1004 pTDInfo->skb = NULL;
1005 pTDInfo->byFlags = 0;
1006 }
1007
vnt_check_bb_vga(struct vnt_private * priv)1008 static void vnt_check_bb_vga(struct vnt_private *priv)
1009 {
1010 long dbm;
1011 int i;
1012
1013 if (!priv->bUpdateBBVGA)
1014 return;
1015
1016 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1017 return;
1018
1019 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
1020 return;
1021
1022 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
1023
1024 for (i = 0; i < BB_VGA_LEVEL; i++) {
1025 if (dbm < priv->ldBmThreshold[i]) {
1026 priv->byBBVGANew = priv->abyBBVGA[i];
1027 break;
1028 }
1029 }
1030
1031 if (priv->byBBVGANew == priv->byBBVGACurrent) {
1032 priv->uBBVGADiffCount = 1;
1033 return;
1034 }
1035
1036 priv->uBBVGADiffCount++;
1037
1038 if (priv->uBBVGADiffCount == 1) {
1039 /* first VGA diff gain */
1040 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1041
1042 dev_dbg(&priv->pcid->dev,
1043 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1044 (int)dbm, priv->byBBVGANew,
1045 priv->byBBVGACurrent,
1046 (int)priv->uBBVGADiffCount);
1047 }
1048
1049 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
1050 dev_dbg(&priv->pcid->dev,
1051 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1052 (int)dbm, priv->byBBVGANew,
1053 priv->byBBVGACurrent,
1054 (int)priv->uBBVGADiffCount);
1055
1056 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1057 }
1058 }
1059
device_intr(int irq,void * dev_instance)1060 static irqreturn_t device_intr(int irq, void *dev_instance)
1061 {
1062 struct vnt_private *pDevice = dev_instance;
1063 int max_count = 0;
1064 unsigned long dwMIBCounter = 0;
1065 unsigned char byOrgPageSel = 0;
1066 int handled = 0;
1067 unsigned long flags;
1068
1069 MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
1070
1071 if (pDevice->dwIsr == 0)
1072 return IRQ_RETVAL(handled);
1073
1074 if (pDevice->dwIsr == 0xffffffff) {
1075 pr_debug("dwIsr = 0xffff\n");
1076 return IRQ_RETVAL(handled);
1077 }
1078
1079 handled = 1;
1080 MACvIntDisable(pDevice->PortOffset);
1081
1082 spin_lock_irqsave(&pDevice->lock, flags);
1083
1084 /* Make sure current page is 0 */
1085 VNSvInPortB(pDevice->PortOffset + MAC_REG_PAGE1SEL, &byOrgPageSel);
1086 if (byOrgPageSel == 1)
1087 MACvSelectPage0(pDevice->PortOffset);
1088 else
1089 byOrgPageSel = 0;
1090
1091 MACvReadMIBCounter(pDevice->PortOffset, &dwMIBCounter);
1092 /*
1093 * TBD....
1094 * Must do this after doing rx/tx, cause ISR bit is slow
1095 * than RD/TD write back
1096 * update ISR counter
1097 */
1098 STAvUpdate802_11Counter(&pDevice->s802_11Counter, &pDevice->scStatistic, dwMIBCounter);
1099 while (pDevice->dwIsr != 0) {
1100 STAvUpdateIsrStatCounter(&pDevice->scStatistic, pDevice->dwIsr);
1101 MACvWriteISR(pDevice->PortOffset, pDevice->dwIsr);
1102
1103 if (pDevice->dwIsr & ISR_FETALERR) {
1104 pr_debug(" ISR_FETALERR\n");
1105 VNSvOutPortB(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, 0);
1106 VNSvOutPortW(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1107 device_error(pDevice, pDevice->dwIsr);
1108 }
1109
1110 if (pDevice->dwIsr & ISR_TBTT) {
1111 if (pDevice->vif &&
1112 pDevice->op_mode != NL80211_IFTYPE_ADHOC)
1113 vnt_check_bb_vga(pDevice);
1114
1115 pDevice->bBeaconSent = false;
1116 if (pDevice->bEnablePSMode)
1117 PSbIsNextTBTTWakeUp((void *)pDevice);
1118
1119 if ((pDevice->op_mode == NL80211_IFTYPE_AP ||
1120 pDevice->op_mode == NL80211_IFTYPE_ADHOC) &&
1121 pDevice->vif->bss_conf.enable_beacon) {
1122 MACvOneShotTimer1MicroSec(pDevice->PortOffset,
1123 (pDevice->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
1124 }
1125
1126 /* TODO: adhoc PS mode */
1127
1128 }
1129
1130 if (pDevice->dwIsr & ISR_BNTX) {
1131 if (pDevice->op_mode == NL80211_IFTYPE_ADHOC) {
1132 pDevice->bIsBeaconBufReadySet = false;
1133 pDevice->cbBeaconBufReadySetCnt = 0;
1134 }
1135
1136 pDevice->bBeaconSent = true;
1137 }
1138
1139 if (pDevice->dwIsr & ISR_RXDMA0)
1140 max_count += device_rx_srv(pDevice, TYPE_RXDMA0);
1141
1142 if (pDevice->dwIsr & ISR_RXDMA1)
1143 max_count += device_rx_srv(pDevice, TYPE_RXDMA1);
1144
1145 if (pDevice->dwIsr & ISR_TXDMA0)
1146 max_count += device_tx_srv(pDevice, TYPE_TXDMA0);
1147
1148 if (pDevice->dwIsr & ISR_AC0DMA)
1149 max_count += device_tx_srv(pDevice, TYPE_AC0DMA);
1150
1151 if (pDevice->dwIsr & ISR_SOFTTIMER1) {
1152 if (pDevice->vif) {
1153 if (pDevice->vif->bss_conf.enable_beacon)
1154 vnt_beacon_make(pDevice, pDevice->vif);
1155 }
1156 }
1157
1158 /* If both buffers available wake the queue */
1159 if (pDevice->vif) {
1160 if (AVAIL_TD(pDevice, TYPE_TXDMA0) &&
1161 AVAIL_TD(pDevice, TYPE_AC0DMA) &&
1162 ieee80211_queue_stopped(pDevice->hw, 0))
1163 ieee80211_wake_queues(pDevice->hw);
1164 }
1165
1166 MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
1167
1168 MACvReceive0(pDevice->PortOffset);
1169 MACvReceive1(pDevice->PortOffset);
1170
1171 if (max_count > pDevice->sOpts.int_works)
1172 break;
1173 }
1174
1175 if (byOrgPageSel == 1)
1176 MACvSelectPage1(pDevice->PortOffset);
1177
1178 spin_unlock_irqrestore(&pDevice->lock, flags);
1179
1180 MACvIntEnable(pDevice->PortOffset, IMR_MASK_VALUE);
1181
1182 return IRQ_RETVAL(handled);
1183 }
1184
vnt_tx_packet(struct vnt_private * priv,struct sk_buff * skb)1185 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1186 {
1187 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1188 PSTxDesc head_td;
1189 u32 dma_idx;
1190 unsigned long flags;
1191
1192 spin_lock_irqsave(&priv->lock, flags);
1193
1194 if (ieee80211_is_data(hdr->frame_control))
1195 dma_idx = TYPE_AC0DMA;
1196 else
1197 dma_idx = TYPE_TXDMA0;
1198
1199 if (AVAIL_TD(priv, dma_idx) < 1) {
1200 spin_unlock_irqrestore(&priv->lock, flags);
1201 return -ENOMEM;
1202 }
1203
1204 head_td = priv->apCurrTD[dma_idx];
1205
1206 head_td->m_td1TD1.byTCR = 0;
1207
1208 head_td->pTDInfo->skb = skb;
1209
1210 if (dma_idx == TYPE_AC0DMA)
1211 head_td->pTDInfo->byFlags = TD_FLAGS_NETIF_SKB;
1212
1213 priv->apCurrTD[dma_idx] = head_td->next;
1214
1215 spin_unlock_irqrestore(&priv->lock, flags);
1216
1217 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1218
1219 if (MACbIsRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_PS))
1220 MACbPSWakeup(priv->PortOffset);
1221
1222 spin_lock_irqsave(&priv->lock, flags);
1223
1224 priv->bPWBitOn = false;
1225
1226 /* Set TSR1 & ReqCount in TxDescHead */
1227 head_td->m_td1TD1.byTCR |= (TCR_STP | TCR_EDP | EDMSDU);
1228 head_td->m_td1TD1.wReqCount =
1229 cpu_to_le16((u16)head_td->pTDInfo->dwReqCount);
1230
1231 head_td->buff_addr = cpu_to_le32(head_td->pTDInfo->skb_dma);
1232
1233 /* Poll Transmit the adapter */
1234 wmb();
1235 head_td->m_td0TD0.f1Owner = OWNED_BY_NIC;
1236 wmb(); /* second memory barrier */
1237
1238 if (head_td->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB)
1239 MACvTransmitAC0(priv->PortOffset);
1240 else
1241 MACvTransmit0(priv->PortOffset);
1242
1243 priv->iTDUsed[dma_idx]++;
1244
1245 spin_unlock_irqrestore(&priv->lock, flags);
1246
1247 return 0;
1248 }
1249
vnt_tx_80211(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)1250 static void vnt_tx_80211(struct ieee80211_hw *hw,
1251 struct ieee80211_tx_control *control,
1252 struct sk_buff *skb)
1253 {
1254 struct vnt_private *priv = hw->priv;
1255
1256 ieee80211_stop_queues(hw);
1257
1258 if (vnt_tx_packet(priv, skb)) {
1259 ieee80211_free_txskb(hw, skb);
1260
1261 ieee80211_wake_queues(hw);
1262 }
1263 }
1264
vnt_start(struct ieee80211_hw * hw)1265 static int vnt_start(struct ieee80211_hw *hw)
1266 {
1267 struct vnt_private *priv = hw->priv;
1268 int ret;
1269
1270 priv->rx_buf_sz = PKT_BUF_SZ;
1271 if (!device_init_rings(priv))
1272 return -ENOMEM;
1273
1274 ret = request_irq(priv->pcid->irq, &device_intr,
1275 IRQF_SHARED, "vt6655", priv);
1276 if (ret) {
1277 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1278 return ret;
1279 }
1280
1281 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1282 device_init_rd0_ring(priv);
1283 device_init_rd1_ring(priv);
1284 device_init_td0_ring(priv);
1285 device_init_td1_ring(priv);
1286
1287 device_init_registers(priv);
1288
1289 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1290 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1291
1292 ieee80211_wake_queues(hw);
1293
1294 return 0;
1295 }
1296
vnt_stop(struct ieee80211_hw * hw)1297 static void vnt_stop(struct ieee80211_hw *hw)
1298 {
1299 struct vnt_private *priv = hw->priv;
1300
1301 ieee80211_stop_queues(hw);
1302
1303 MACbShutdown(priv->PortOffset);
1304 MACbSoftwareReset(priv->PortOffset);
1305 CARDbRadioPowerOff(priv);
1306
1307 device_free_td0_ring(priv);
1308 device_free_td1_ring(priv);
1309 device_free_rd0_ring(priv);
1310 device_free_rd1_ring(priv);
1311 device_free_rings(priv);
1312
1313 free_irq(priv->pcid->irq, priv);
1314 }
1315
vnt_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1316 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1317 {
1318 struct vnt_private *priv = hw->priv;
1319
1320 priv->vif = vif;
1321
1322 switch (vif->type) {
1323 case NL80211_IFTYPE_STATION:
1324 break;
1325 case NL80211_IFTYPE_ADHOC:
1326 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1327
1328 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1329
1330 break;
1331 case NL80211_IFTYPE_AP:
1332 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1333
1334 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1335
1336 break;
1337 default:
1338 return -EOPNOTSUPP;
1339 }
1340
1341 priv->op_mode = vif->type;
1342
1343 return 0;
1344 }
1345
vnt_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1346 static void vnt_remove_interface(struct ieee80211_hw *hw,
1347 struct ieee80211_vif *vif)
1348 {
1349 struct vnt_private *priv = hw->priv;
1350
1351 switch (vif->type) {
1352 case NL80211_IFTYPE_STATION:
1353 break;
1354 case NL80211_IFTYPE_ADHOC:
1355 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1356 MACvRegBitsOff(priv->PortOffset,
1357 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1358 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1359 break;
1360 case NL80211_IFTYPE_AP:
1361 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1362 MACvRegBitsOff(priv->PortOffset,
1363 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1364 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1365 break;
1366 default:
1367 break;
1368 }
1369
1370 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1371 }
1372
1373
vnt_config(struct ieee80211_hw * hw,u32 changed)1374 static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1375 {
1376 struct vnt_private *priv = hw->priv;
1377 struct ieee80211_conf *conf = &hw->conf;
1378 u8 bb_type;
1379
1380 if (changed & IEEE80211_CONF_CHANGE_PS) {
1381 if (conf->flags & IEEE80211_CONF_PS)
1382 PSvEnablePowerSaving(priv, conf->listen_interval);
1383 else
1384 PSvDisablePowerSaving(priv);
1385 }
1386
1387 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1388 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
1389 set_channel(priv, conf->chandef.chan);
1390
1391 if (conf->chandef.chan->band == IEEE80211_BAND_5GHZ)
1392 bb_type = BB_TYPE_11A;
1393 else
1394 bb_type = BB_TYPE_11G;
1395
1396 if (priv->byBBType != bb_type) {
1397 priv->byBBType = bb_type;
1398
1399 CARDbSetPhyParameter(priv, priv->byBBType);
1400 }
1401 }
1402
1403 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1404 if (priv->byBBType == BB_TYPE_11B)
1405 priv->wCurrentRate = RATE_1M;
1406 else
1407 priv->wCurrentRate = RATE_54M;
1408
1409 RFbSetPower(priv, priv->wCurrentRate,
1410 conf->chandef.chan->hw_value);
1411 }
1412
1413 return 0;
1414 }
1415
vnt_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * conf,u32 changed)1416 static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1417 struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf,
1418 u32 changed)
1419 {
1420 struct vnt_private *priv = hw->priv;
1421
1422 priv->current_aid = conf->aid;
1423
1424 if (changed & BSS_CHANGED_BSSID && conf->bssid) {
1425 unsigned long flags;
1426
1427 spin_lock_irqsave(&priv->lock, flags);
1428
1429 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1430
1431 spin_unlock_irqrestore(&priv->lock, flags);
1432 }
1433
1434 if (changed & BSS_CHANGED_BASIC_RATES) {
1435 priv->basic_rates = conf->basic_rates;
1436
1437 CARDvUpdateBasicTopRate(priv);
1438
1439 dev_dbg(&priv->pcid->dev,
1440 "basic rates %x\n", conf->basic_rates);
1441 }
1442
1443 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1444 if (conf->use_short_preamble) {
1445 MACvEnableBarkerPreambleMd(priv->PortOffset);
1446 priv->byPreambleType = true;
1447 } else {
1448 MACvDisableBarkerPreambleMd(priv->PortOffset);
1449 priv->byPreambleType = false;
1450 }
1451 }
1452
1453 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1454 if (conf->use_cts_prot)
1455 MACvEnableProtectMD(priv->PortOffset);
1456 else
1457 MACvDisableProtectMD(priv->PortOffset);
1458 }
1459
1460 if (changed & BSS_CHANGED_ERP_SLOT) {
1461 if (conf->use_short_slot)
1462 priv->bShortSlotTime = true;
1463 else
1464 priv->bShortSlotTime = false;
1465
1466 CARDbSetPhyParameter(priv, priv->byBBType);
1467 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1468 }
1469
1470 if (changed & BSS_CHANGED_TXPOWER)
1471 RFbSetPower(priv, priv->wCurrentRate,
1472 conf->chandef.chan->hw_value);
1473
1474 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1475 dev_dbg(&priv->pcid->dev,
1476 "Beacon enable %d\n", conf->enable_beacon);
1477
1478 if (conf->enable_beacon) {
1479 vnt_beacon_enable(priv, vif, conf);
1480
1481 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1482 TCR_AUTOBCNTX);
1483 } else {
1484 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1485 TCR_AUTOBCNTX);
1486 }
1487 }
1488
1489 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) &&
1490 priv->op_mode != NL80211_IFTYPE_AP) {
1491 if (conf->assoc && conf->beacon_rate) {
1492 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1493 conf->sync_tsf);
1494
1495 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1496
1497 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
1498 } else {
1499 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1500 TFTCTL_TSFCNTRST);
1501 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1502 TFTCTL_TSFCNTREN);
1503 }
1504 }
1505 }
1506
vnt_prepare_multicast(struct ieee80211_hw * hw,struct netdev_hw_addr_list * mc_list)1507 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1508 struct netdev_hw_addr_list *mc_list)
1509 {
1510 struct vnt_private *priv = hw->priv;
1511 struct netdev_hw_addr *ha;
1512 u64 mc_filter = 0;
1513 u32 bit_nr = 0;
1514
1515 netdev_hw_addr_list_for_each(ha, mc_list) {
1516 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1517
1518 mc_filter |= 1ULL << (bit_nr & 0x3f);
1519 }
1520
1521 priv->mc_list_count = mc_list->count;
1522
1523 return mc_filter;
1524 }
1525
vnt_configure(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)1526 static void vnt_configure(struct ieee80211_hw *hw,
1527 unsigned int changed_flags, unsigned int *total_flags, u64 multicast)
1528 {
1529 struct vnt_private *priv = hw->priv;
1530 u8 rx_mode = 0;
1531
1532 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_PROMISC_IN_BSS |
1533 FIF_BCN_PRBRESP_PROMISC;
1534
1535 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1536
1537 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1538
1539 if (changed_flags & FIF_PROMISC_IN_BSS) {
1540 /* unconditionally log net taps */
1541 if (*total_flags & FIF_PROMISC_IN_BSS)
1542 rx_mode |= RCR_UNICAST;
1543 else
1544 rx_mode &= ~RCR_UNICAST;
1545 }
1546
1547 if (changed_flags & FIF_ALLMULTI) {
1548 if (*total_flags & FIF_ALLMULTI) {
1549 unsigned long flags;
1550
1551 spin_lock_irqsave(&priv->lock, flags);
1552
1553 if (priv->mc_list_count > 2) {
1554 MACvSelectPage1(priv->PortOffset);
1555
1556 VNSvOutPortD(priv->PortOffset +
1557 MAC_REG_MAR0, 0xffffffff);
1558 VNSvOutPortD(priv->PortOffset +
1559 MAC_REG_MAR0 + 4, 0xffffffff);
1560
1561 MACvSelectPage0(priv->PortOffset);
1562 } else {
1563 MACvSelectPage1(priv->PortOffset);
1564
1565 VNSvOutPortD(priv->PortOffset +
1566 MAC_REG_MAR0, (u32)multicast);
1567 VNSvOutPortD(priv->PortOffset +
1568 MAC_REG_MAR0 + 4,
1569 (u32)(multicast >> 32));
1570
1571 MACvSelectPage0(priv->PortOffset);
1572 }
1573
1574 spin_unlock_irqrestore(&priv->lock, flags);
1575
1576 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1577 } else {
1578 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1579 }
1580 }
1581
1582 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1583 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1584
1585 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1586 rx_mode &= ~RCR_BSSID;
1587 else
1588 rx_mode |= RCR_BSSID;
1589 }
1590
1591 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1592
1593 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1594 }
1595
vnt_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)1596 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1597 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1598 struct ieee80211_key_conf *key)
1599 {
1600 struct vnt_private *priv = hw->priv;
1601
1602 switch (cmd) {
1603 case SET_KEY:
1604 if (vnt_set_keys(hw, sta, vif, key))
1605 return -EOPNOTSUPP;
1606 break;
1607 case DISABLE_KEY:
1608 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1609 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1610 default:
1611 break;
1612 }
1613
1614 return 0;
1615 }
1616
vnt_get_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1617 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1618 {
1619 struct vnt_private *priv = hw->priv;
1620 u64 tsf;
1621
1622 CARDbGetCurrentTSF(priv, &tsf);
1623
1624 return tsf;
1625 }
1626
vnt_set_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u64 tsf)1627 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1628 u64 tsf)
1629 {
1630 struct vnt_private *priv = hw->priv;
1631
1632 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
1633 }
1634
vnt_reset_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1635 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1636 {
1637 struct vnt_private *priv = hw->priv;
1638
1639 /* reset TSF counter */
1640 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1641 }
1642
1643 static const struct ieee80211_ops vnt_mac_ops = {
1644 .tx = vnt_tx_80211,
1645 .start = vnt_start,
1646 .stop = vnt_stop,
1647 .add_interface = vnt_add_interface,
1648 .remove_interface = vnt_remove_interface,
1649 .config = vnt_config,
1650 .bss_info_changed = vnt_bss_info_changed,
1651 .prepare_multicast = vnt_prepare_multicast,
1652 .configure_filter = vnt_configure,
1653 .set_key = vnt_set_key,
1654 .get_tsf = vnt_get_tsf,
1655 .set_tsf = vnt_set_tsf,
1656 .reset_tsf = vnt_reset_tsf,
1657 };
1658
vnt_init(struct vnt_private * priv)1659 static int vnt_init(struct vnt_private *priv)
1660 {
1661 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1662
1663 vnt_init_bands(priv);
1664
1665 if (ieee80211_register_hw(priv->hw))
1666 return -ENODEV;
1667
1668 priv->mac_hw = true;
1669
1670 CARDbRadioPowerOff(priv);
1671
1672 return 0;
1673 }
1674
1675 static int
vt6655_probe(struct pci_dev * pcid,const struct pci_device_id * ent)1676 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1677 {
1678 PCHIP_INFO pChip_info = (PCHIP_INFO)ent->driver_data;
1679 struct vnt_private *priv;
1680 struct ieee80211_hw *hw;
1681 struct wiphy *wiphy;
1682 int rc;
1683
1684 dev_notice(&pcid->dev,
1685 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1686
1687 dev_notice(&pcid->dev,
1688 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1689
1690 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1691 if (!hw) {
1692 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1693 return -ENOMEM;
1694 }
1695
1696 priv = hw->priv;
1697
1698 vt6655_init_info(pcid, &priv, pChip_info);
1699
1700 priv->hw = hw;
1701
1702 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1703
1704 if (pci_enable_device(pcid)) {
1705 device_free_info(priv);
1706 return -ENODEV;
1707 }
1708
1709 dev_dbg(&pcid->dev,
1710 "Before get pci_info memaddr is %x\n", priv->memaddr);
1711
1712 if (!device_get_pci_info(priv, pcid)) {
1713 dev_err(&pcid->dev, ": Failed to find PCI device.\n");
1714 device_free_info(priv);
1715 return -ENODEV;
1716 }
1717
1718 #ifdef DEBUG
1719 dev_dbg(&pcid->dev,
1720 "after get pci_info memaddr is %x, io addr is %x,io_size is %d\n",
1721 priv->memaddr, priv->ioaddr, priv->io_size);
1722 {
1723 int i;
1724 u32 bar, len;
1725 u32 address[] = {
1726 PCI_BASE_ADDRESS_0,
1727 PCI_BASE_ADDRESS_1,
1728 PCI_BASE_ADDRESS_2,
1729 PCI_BASE_ADDRESS_3,
1730 PCI_BASE_ADDRESS_4,
1731 PCI_BASE_ADDRESS_5,
1732 0};
1733 for (i = 0; address[i]; i++) {
1734 pci_read_config_dword(pcid, address[i], &bar);
1735
1736 dev_dbg(&pcid->dev, "bar %d is %x\n", i, bar);
1737
1738 if (!bar) {
1739 dev_dbg(&pcid->dev,
1740 "bar %d not implemented\n", i);
1741 continue;
1742 }
1743
1744 if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
1745 /* This is IO */
1746
1747 len = bar & (PCI_BASE_ADDRESS_IO_MASK & 0xffff);
1748 len = len & ~(len - 1);
1749
1750 dev_dbg(&pcid->dev,
1751 "IO space: len in IO %x, BAR %d\n",
1752 len, i);
1753 } else {
1754 len = bar & 0xfffffff0;
1755 len = ~len + 1;
1756
1757 dev_dbg(&pcid->dev,
1758 "len in MEM %x, BAR %d\n", len, i);
1759 }
1760 }
1761 }
1762 #endif
1763
1764 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1765 priv->io_size);
1766 if (!priv->PortOffset) {
1767 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1768 device_free_info(priv);
1769 return -ENODEV;
1770 }
1771
1772 rc = pci_request_regions(pcid, DEVICE_NAME);
1773 if (rc) {
1774 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1775 device_free_info(priv);
1776 return -ENODEV;
1777 }
1778
1779 /* do reset */
1780 if (!MACbSoftwareReset(priv->PortOffset)) {
1781 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1782 device_free_info(priv);
1783 return -ENODEV;
1784 }
1785 /* initial to reload eeprom */
1786 MACvInitialize(priv->PortOffset);
1787 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1788
1789 /* Get RFType */
1790 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1791 priv->byRFType &= RF_MASK;
1792
1793 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1794
1795 device_get_options(priv);
1796 device_set_options(priv);
1797 /* Mask out the options cannot be set to the chip */
1798 priv->sOpts.flags &= pChip_info->flags;
1799
1800 /* Enable the chip specified capabilities */
1801 priv->flags = priv->sOpts.flags | (pChip_info->flags & 0xff000000UL);
1802
1803 wiphy = priv->hw->wiphy;
1804
1805 wiphy->frag_threshold = FRAG_THRESH_DEF;
1806 wiphy->rts_threshold = RTS_THRESH_DEF;
1807 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1808 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1809
1810 priv->hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1811 IEEE80211_HW_REPORTS_TX_ACK_STATUS |
1812 IEEE80211_HW_SIGNAL_DBM |
1813 IEEE80211_HW_TIMING_BEACON_ONLY;
1814
1815 priv->hw->max_signal = 100;
1816
1817 if (vnt_init(priv))
1818 return -ENODEV;
1819
1820 device_print_info(priv);
1821 pci_set_drvdata(pcid, priv);
1822
1823 return 0;
1824 }
1825
1826 /*------------------------------------------------------------------*/
1827
1828 #ifdef CONFIG_PM
vt6655_suspend(struct pci_dev * pcid,pm_message_t state)1829 static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1830 {
1831 struct vnt_private *priv = pci_get_drvdata(pcid);
1832 unsigned long flags;
1833
1834 spin_lock_irqsave(&priv->lock, flags);
1835
1836 pci_save_state(pcid);
1837
1838 MACbShutdown(priv->PortOffset);
1839
1840 pci_disable_device(pcid);
1841 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1842
1843 spin_unlock_irqrestore(&priv->lock, flags);
1844
1845 return 0;
1846 }
1847
vt6655_resume(struct pci_dev * pcid)1848 static int vt6655_resume(struct pci_dev *pcid)
1849 {
1850
1851 pci_set_power_state(pcid, PCI_D0);
1852 pci_enable_wake(pcid, PCI_D0, 0);
1853 pci_restore_state(pcid);
1854
1855 return 0;
1856 }
1857 #endif
1858
1859 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
1860
1861 static struct pci_driver device_driver = {
1862 .name = DEVICE_NAME,
1863 .id_table = vt6655_pci_id_table,
1864 .probe = vt6655_probe,
1865 .remove = vt6655_remove,
1866 #ifdef CONFIG_PM
1867 .suspend = vt6655_suspend,
1868 .resume = vt6655_resume,
1869 #endif
1870 };
1871
vt6655_init_module(void)1872 static int __init vt6655_init_module(void)
1873 {
1874 int ret;
1875
1876 ret = pci_register_driver(&device_driver);
1877 #ifdef CONFIG_PM
1878 if (ret >= 0)
1879 register_reboot_notifier(&device_notifier);
1880 #endif
1881
1882 return ret;
1883 }
1884
vt6655_cleanup_module(void)1885 static void __exit vt6655_cleanup_module(void)
1886 {
1887 #ifdef CONFIG_PM
1888 unregister_reboot_notifier(&device_notifier);
1889 #endif
1890 pci_unregister_driver(&device_driver);
1891 }
1892
1893 module_init(vt6655_init_module);
1894 module_exit(vt6655_cleanup_module);
1895
1896 #ifdef CONFIG_PM
1897 static int
device_notify_reboot(struct notifier_block * nb,unsigned long event,void * p)1898 device_notify_reboot(struct notifier_block *nb, unsigned long event, void *p)
1899 {
1900 struct pci_dev *pdev = NULL;
1901
1902 switch (event) {
1903 case SYS_DOWN:
1904 case SYS_HALT:
1905 case SYS_POWER_OFF:
1906 for_each_pci_dev(pdev) {
1907 if (pci_dev_driver(pdev) == &device_driver) {
1908 if (pci_get_drvdata(pdev))
1909 vt6655_suspend(pdev, PMSG_HIBERNATE);
1910 }
1911 }
1912 }
1913 return NOTIFY_DONE;
1914 }
1915 #endif
1916