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Searched refs:P3 (Results 1 – 33 of 33) sorted by relevance

/linux-4.1.27/arch/blackfin/lib/
Dmemmove.S20 I1 = P3;
22 P3 = R1; /* P3 = From Address */ define
41 I0 = P3;
63 P3 = I0; /* Amend P3 to updated ptr. */ define
65 P3 = I1; define
69 .Lbyte2_s: R1 = B[P3++](Z);
72 .Lfinished: P3 = I1;
78 P3 = P3 + P2; define
79 R1 = B[P3--] (Z);
88 .Lol_e: R1 = B[P3--] (Z);
[all …]
Dmemcmp.S22 I1 = P3;
24 P3 = R1; /* P3 = s2 Address */ define
52 P3 = I0; /* s2 */ define
60 R1 = B[P3++](Z); /* *s2 */
69 P3 = I1; define
82 P3 = I0; /* quads, and increase the*/ define
84 P3 += -4;
89 P3 = I1; define
/linux-4.1.27/arch/ia64/kernel/
Dunwind_decoder.c223 case 0: UNW_DEC_REG_GR(P3, UNW_REG_PSP, dst, arg); break; in unw_decode_p2_p5()
224 case 1: UNW_DEC_REG_GR(P3, UNW_REG_RP, dst, arg); break; in unw_decode_p2_p5()
225 case 2: UNW_DEC_REG_GR(P3, UNW_REG_PFS, dst, arg); break; in unw_decode_p2_p5()
226 case 3: UNW_DEC_REG_GR(P3, UNW_REG_PR, dst, arg); break; in unw_decode_p2_p5()
227 case 4: UNW_DEC_REG_GR(P3, UNW_REG_UNAT, dst, arg); break; in unw_decode_p2_p5()
228 case 5: UNW_DEC_REG_GR(P3, UNW_REG_LC, dst, arg); break; in unw_decode_p2_p5()
229 case 6: UNW_DEC_RP_BR(P3, dst, arg); break; in unw_decode_p2_p5()
230 case 7: UNW_DEC_REG_GR(P3, UNW_REG_RNAT, dst, arg); break; in unw_decode_p2_p5()
231 case 8: UNW_DEC_REG_GR(P3, UNW_REG_BSP, dst, arg); break; in unw_decode_p2_p5()
232 case 9: UNW_DEC_REG_GR(P3, UNW_REG_BSPSTORE, dst, arg); break; in unw_decode_p2_p5()
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/gpio/
Dgpio_lpc32xx.txt12 3: GPIO P3
13 4: GPI P3
14 5: GPO P3
/linux-4.1.27/Documentation/devicetree/bindings/usb/
Ddwc3.txt23 - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
25 P1/P2/P3 transition sequence.
26 - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
29 from P0 to P1/P2/P3.
/linux-4.1.27/arch/blackfin/mach-common/
Ddpmc_modes.S68 P3.H = hi(VR_CTL);
69 P3.L = lo(VR_CTL);
79 W[P3] = R4.L;
95 P3 = R0; define
139 R0 = P3;
Dentry.S1120 [--sp] = P3;
1127 P3 = [P5]; /* trace_buff_offset */ define
1140 P3 = P3 + P2; define
1141 R7 = P3;
1143 P3 = R7; define
1146 [P2] = P3;
1154 P4 = P3 + P2;
1156 P3 += -4;
1157 R7 = P3;
1160 P3 = R7; define
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/linux-4.1.27/drivers/block/paride/
Ddstr.c39 #define P3 w2(6);w2(4);w2(6);w2(4); macro
121 P2; w0(0x82); P1; P3; w0(0x20); P1; in dstr_read_block()
163 P2; w0(0x82); P1; P3; w0(0x20); P1; in dstr_write_block()
/linux-4.1.27/drivers/video/logo/
Dlogo_spe_clut224.ppm1 P3
Dclut_vga16.ppm1 P3
Dlogo_superh_vga16.ppm1 P3
Dlogo_sgi_clut224.ppm1 P3
Dlogo_sun_clut224.ppm1 P3
Dlogo_superh_clut224.ppm1 P3
Dlogo_mac_clut224.ppm1 P3
Dlogo_linux_vga16.ppm1 P3
Dlogo_linux_clut224.ppm1 P3
Dlogo_parisc_clut224.ppm1 P3
Dlogo_dec_clut224.ppm1 P3
Dlogo_blackfin_clut224.ppm1 P3
Dlogo_blackfin_vga16.ppm1 P3
Dlogo_m32r_clut224.ppm1 P3
/linux-4.1.27/drivers/iio/pressure/
Dbmp280.c88 enum { P1, P2, P3, P4, P5, P6, P7, P8, P9 }; enumerator
206 var1 = ((var1 * var1 * (s64)(s16)le16_to_cpu(buf[P3])) >> 8) + in bmp280_compensate_press()
/linux-4.1.27/drivers/ata/
Data_piix.c125 P3 = 3, /* port 3 */ enumerator
376 { P0, P2, P1, P3 }, /* 00b */
377 { IDE, IDE, P1, P3 }, /* 01b */
394 { IDE, IDE, P1, P3 }, /* 01b */
405 { P0, P2, P1, P3 }, /* 00b (hardwired when in AHCI) */
/linux-4.1.27/arch/m68k/fpsp040/
Dstan.S33 | U = r + r*s*(P1 + s*(P2 + s*P3)), and
39 | U = r + r*s*(P1 + s*(P2 + s*P3)), and
/linux-4.1.27/arch/cris/arch-v10/kernel/
Dkgdb.c306 P0, VR, P2, P3, enumerator
/linux-4.1.27/arch/arm/boot/dts/
Dexynos5250-smdk5250.dts202 regulator-name = "P3.0V_LDO_OUT12";
Dexynos5250-spring.dts210 regulator-name = "P3.0V_LDO_OUT12";
Dexynos5250-snow.dts363 regulator-name = "P3.0V_LDO_OUT12";
Dam43x-epos-evm.dts95 0x00020203 /* P3 */
/linux-4.1.27/Documentation/power/
Dvideo.txt111 Compaq Armada E500 - P3-700 none (1) (S1 also works OK)
/linux-4.1.27/arch/blackfin/include/asm/
Ddpmc.h23 #define PM_REG10 P3
/linux-4.1.27/arch/m68k/ifpsp060/src/
Dfplsp.S5634 # U = r + r*s*(P1 + s*(P2 + s*P3)), and #
5640 # U = r + r*s*(P1 + s*(P2 + s*P3)), and #