Searched refs:MC (Results 1 - 200 of 255) sorted by relevance

12

/linux-4.1.27/drivers/staging/fsl-mc/include/
H A Dmc.h2 * Freescale Management Complex (MC) bus public interface
25 * struct fsl_mc_driver - MC object device driver object
52 * struct fsl_mc_device_match_id - MC object device Id entry for driver matching
54 * @obj_type: MC object type
55 * @ver_major: MC object version major number
56 * @ver_minor: MC object version minor number
58 * Type of entries in the "device Id" table for MC object devices supported by
59 * a MC object device driver. The last entry of the table has vendor set to 0x0
69 * enum fsl_mc_pool_type - Types of allocatable MC bus resources
75 FSL_MC_POOL_DPMCP = 0x0, /* corresponds to "dpmcp" in the MC */
76 FSL_MC_POOL_DPBP, /* corresponds to "dpbp" in the MC */
77 FSL_MC_POOL_DPCON, /* corresponds to "dpcon" in the MC */
86 * struct fsl_mc_resource - MC generic resource
88 * @id: unique MC resource Id within the resources of the same type
96 * MC resource structures.
107 * Bit masks for a MC object device (struct fsl_mc_device) flags
117 * struct fsl_mc_device - MC object device object
120 * @flags: MC object device flags
122 * @mc_handle: MC handle for the corresponding MC object opened
123 * @mc_io: Pointer to MC IO object assigned to this device or
125 * @obj_desc: MC description of the DPAA device
127 * @resource: generic resource associated with this MC object device, if any.
129 * Generic device object for MC object devices that are "attached" to a
130 * MC bus.
135 * called for an MC object device, but before the device-specific probe
137 * - DP_OBJ_DPRC objects are the only MC objects that have built-in MC
138 * portals. For all other MC objects, their device drivers are responsible for
139 * allocating MC portals for them by calling fsl_mc_portal_allocate().
140 * - Some types of MC objects (e.g., DP_OBJ_DPBP, DP_OBJ_DPCON) are
143 * fsl_mc_object_allocate()/fsl_mc_object_free() functions. These MC objects
146 * For MC objects that are not allocatable (e.g., DP_OBJ_DPRC, DP_OBJ_DPNI),
H A Dmc-sys.h3 * Interface of the I/O services to send MC commands to the MC hardware
47 * struct fsl_mc_io - MC I/O object to be passed-in to mc_send_command()
50 * @portal_size: MC command portal size in bytes
51 * @portal_phys_addr: MC command portal physical address
52 * @portal_virt_addr: MC command portal virtual address
53 * @resource: generic resource associated with the MC portal if
54 * the MC portal came from a resource pool, or NULL if the MC portal
H A Dmc-private.h2 * Freescale Management Complex (MC) bus private declarations
31 * @root_mc_bus_dev: MC object device representing the root DPRC
43 * @start_mc_addr: Start MC address of the range being translated
44 * @end_mc_addr: MC address of the first byte after the range (last MC
55 * struct fsl_mc_resource_pool - Pool of MC resources of a given
62 * @mc_bus: pointer to the MC bus that owns this resource pool
77 * for this MC bus. These resources represent allocatable entities
H A Ddpbp.h43 * @mc_io: Pointer to MC portal's I/O object
51 * associated with the specific object ID and the specific MC
61 * @mc_io: Pointer to MC portal's I/O object
81 * @mc_io: Pointer to MC portal's I/O object
91 * associated with the specific object ID and the specific MC
105 * @mc_io: Pointer to MC portal's I/O object
114 * @mc_io: Pointer to MC portal's I/O object
123 * @mc_io: Pointer to MC portal's I/O object
132 * @mc_io: Pointer to MC portal's I/O object
142 * @mc_io: Pointer to MC portal's I/O object
151 * @mc_io: Pointer to MC portal's I/O object
170 * @mc_io: Pointer to MC portal's I/O object
192 * @mc_io: Pointer to MC portal's I/O object
211 * @mc_io: Pointer to MC portal's I/O object
225 * @mc_io: Pointer to MC portal's I/O object
245 * @mc_io: Pointer to MC portal's I/O object
263 * @mc_io: Pointer to MC portal's I/O object
280 * @mc_io: Pointer to MC portal's I/O object
318 * @mc_io: Pointer to MC portal's I/O object
H A Ddprc.h57 * @mc_io: Pointer to MC portal's I/O object
69 * @mc_io: Pointer to MC portal's I/O object
134 * @mc_io: Pointer to MC portal's I/O object
151 * @mc_io: Pointer to MC portal's I/O object
176 * @mc_io: Pointer to MC portal's I/O object
229 * @mc_io: Pointer to MC portal's I/O object
248 * @mc_io: Pointer to MC portal's I/O object
270 * @mc_io: Pointer to MC portal's I/O object
289 * @mc_io: Pointer to MC portal's I/O object
303 * @mc_io: Pointer to MC portal's I/O object
323 * @mc_io: Pointer to MC portal's I/O object
340 * @mc_io: Pointer to MC portal's I/O object
356 * @mc_io: Pointer to MC portal's I/O object
396 * @mc_io: Pointer to MC portal's I/O object
409 * @mc_io: Pointer to MC portal's I/O object
439 * @mc_io: Pointer to MC portal's I/O object
502 * @mc_io: Pointer to MC portal's I/O object
539 * @mc_io: Pointer to MC portal's I/O object
557 * @mc_io: Pointer to MC portal's I/O object
569 * @mc_io: Pointer to MC portal's I/O object
588 * @mc_io: Pointer to MC portal's I/O object
627 * @mc_io: Pointer to MC portal's I/O object
647 * @mc_io: Pointer to MC portal's I/O object
689 * @mc_io: Pointer to MC portal's I/O object
702 * dprc_get_portal_paddr() - Get the physical address of MC portals
703 * @mc_io: Pointer to MC portal's I/O object
705 * @portal_id: MC portal ID
706 * @portal_addr: The physical address of the MC portal ID
727 * @mc_io: Pointer to MC portal's I/O object
759 * @mc_io: Pointer to MC portal's I/O object
773 * @mc_io: Pointer to MC portal's I/O object
786 * @mc_io Pointer to MC portal's I/O object
H A Ddpmng.h73 * @mc_io: Pointer to MC portal's I/O object
/linux-4.1.27/drivers/staging/fsl-mc/bus/
H A Dmc-sys.c3 * I/O services to send MC commands to the MC hardware
43 * Timeout in jiffies to wait for the completion of an MC command
49 * iterations while waiting for MC command completion
58 * Creates an MC I/O object
60 * @dev: device to be associated with the MC I/O object
61 * @mc_portal_phys_addr: physical address of the MC portal to use
62 * @mc_portal_size: size in bytes of the MC portal
63 * @resource: Pointer to MC bus object allocator resource associated
64 * with this MC I/O object or NULL if none.
65 * @flags: flags for the new MC I/O object
66 * @new_mc_io: Area to return pointer to newly created MC I/O object
95 "devm_request_mem_region failed for MC portal %#llx\n", fsl_create_mc_io()
105 "devm_ioremap_nocache failed for MC portal %#llx\n", fsl_create_mc_io()
117 * Destroys an MC I/O object
119 * @mc_io: MC I/O object to destroy
173 return "Unknown MC error"; mc_status_to_string()
179 * mc_write_command - writes a command to a Management Complex (MC) portal
181 * @portal: pointer to an MC portal
198 * mc_read_response - reads the response for the last MC command from a
199 * Management Complex (MC) portal
201 * @portal: pointer to an MC portal
213 /* Copy command response header from MC portal: */ mc_read_response()
219 /* Copy command response data from MC portal: */ mc_read_response()
227 * Sends an command to the MC device using the given MC I/O object
229 * @mc_io: MC I/O object to be used
243 * Send command to the MC hardware: mc_send_command()
248 * Wait for response from the MC hardware: mc_send_command()
256 * TODO: When MC command completion interrupts are supported mc_send_command()
263 pr_debug("MC command timed out (portal: %#llx, obj handle: %#x, command: %#x)\n", mc_send_command()
275 pr_debug("MC command failed: portal: %#llx, obj handle: %#x, command: %#x, status: %s (%#x)\n", mc_send_command()
H A DMakefile2 # Freescale Management Complex (MC) bus drivers
H A Dmc-allocator.c2 * Freescale MC object device allocator driver
21 * pool of a given MC bus
23 * @mc_bus: pointer to the MC bus
24 * @pool_type: MC bus pool type
25 * @mc_dev: Pointer to allocatable MC object device
27 * It adds an allocatable MC object device to a container's resource pool of
95 * @mc_dev: Pointer to allocatable MC object device
97 * It permanently removes an allocatable MC object device from the resource
266 * fsl_mc_portal_allocate - Allocates an MC portal
268 * @mc_dev: MC device for which the MC portal is to be allocated
270 * MC portal.
272 * that wraps the allocated MC portal is to be returned
274 * This function allocates an MC portal from the device's parent DPRC,
275 * from the corresponding MC bus' pool of MC portals and wraps
277 * portal is allocated from its own MC bus.
338 * fsl_mc_portal_free - Returns an MC portal to the pool of free MC portals
339 * of a given MC bus
341 * @mc_io: Pointer to the fsl_mc_io object that wraps the MC portal to free
361 * @mc_io: Pointer to the fsl_mc_io object that wraps the MC portal to free
399 * fsl_mc_object_allocate - Allocates a MC object device of the given
400 * pool type from a given MC bus
402 * @mc_dev: MC device for which the MC object device is to be allocated
403 * @pool_type: MC bus resource pool type
405 * MC object device is to be returned
407 * This function allocates a MC object device from the device's parent DPRC,
408 * from the corresponding MC bus' pool of allocatable MC object devices of
411 * NOTE: pool_type must be different from FSL_MC_POOL_MCP, since MC
456 * fsl_mc_object_free - Returns an allocatable MC object device to the
457 * corresponding resource pool of a given MC bus.
459 * @mc_adev: Pointer to the MC object device
503 "Allocatable MC object device bound to fsl_mc_allocator driver"); fsl_mc_allocator_probe()
526 "Allocatable MC object device unbound from fsl_mc_allocator driver"); fsl_mc_allocator_remove()
H A Dmc-bus.c2 * Freescale Management Complex (MC) bus driver
27 * @dev: the MC object device structure to match against
28 * @drv: the device driver to search for matching MC object device id
58 * a matching for the given MC object device. fsl_mc_bus_match()
77 "Major version mismatch: driver version %u.%u, MC object version %u.%u\n", fsl_mc_bus_match()
83 "Minor version mismatch: driver version %u.%u, MC object version %u.%u\n", fsl_mc_bus_match()
125 dev_err(dev, "MC object device probe callback failed: %d\n", fsl_mc_driver_probe()
145 "MC object device remove callback failed: %d\n", fsl_mc_driver_remove()
163 * MC bus
193 pr_info("MC object device driver %s registered\n", __fsl_mc_driver_register()
201 * MC bus
298 "Invalid MC address: %#llx\n", fsl_mc_device_get_mmio_regions()
317 * Add a newly discovered MC object device to be visible in Linux
336 * Allocate an MC bus device object: fsl_mc_device_add()
367 * parent DPRC's MC portal instead of the child DPRC's MC fsl_mc_device_add()
372 * given MC object, using the same MC portal. fsl_mc_device_add()
399 * A non-DPRC MC object device has to be a child of another fsl_mc_device_add()
400 * MC object (specifically a DPRC object) fsl_mc_device_add()
408 * Get MMIO regions for the device from the MC: fsl_mc_device_add()
432 dev_dbg(parent_dev, "Added MC object device %s\n", fsl_mc_device_add()
450 * fsl_mc_device_remove - Remove a MC object device from being visible to
453 * @mc_dev: Pointer to a MC object device object
591 * fsl_mc_bus_probe - callback invoked when the root MC bus is being
607 dev_info(&pdev->dev, "Root MC bus device probed"); fsl_mc_bus_probe()
616 * Get physical address of MC portal for the root DPRC: fsl_mc_bus_probe()
646 "ERROR: MC firmware version not supported by driver (driver version: %u.%u)\n", fsl_mc_bus_probe()
654 "WARNING: driver may not support newer MC firmware features (driver version: %u.%u)\n", fsl_mc_bus_probe()
691 * fsl_mc_bus_remove - callback invoked when the root MC bus is being
702 dev_info(&pdev->dev, "Root MC bus device removed"); fsl_mc_bus_remove()
786 pr_info("MC bus unregistered\n"); fsl_mc_bus_driver_exit()
792 MODULE_DESCRIPTION("Freescale Management Complex (MC) bus driver");
H A Ddpmcp.h43 * @mc_io: Pointer to MC portal's I/O object
51 * associated with the specific object ID and the specific MC
64 * @mc_io: Pointer to MC portal's I/O object
85 * @mc_io: Pointer to MC portal's I/O object
95 * associated with the specific object ID and the specific MC
109 * @mc_io: Pointer to MC portal's I/O object
118 * @mc_io: Pointer to MC portal's I/O object
137 * @mc_io: Pointer to MC portal's I/O object
156 * @mc_io: Pointer to MC portal's I/O object
178 * @mc_io: Pointer to MC portal's I/O object
197 * @mc_io: Pointer to MC portal's I/O object
211 * @mc_io: Pointer to MC portal's I/O object
231 * @mc_io: Pointer to MC portal's I/O object
249 * @mc_io: Pointer to MC portal's I/O object
266 * @mc_io: Pointer to MC portal's I/O object
301 * @mc_io: Pointer to MC portal's I/O object
H A Ddprc-driver.c61 * present in the DPRC in the MC.
65 * the MC by removing devices that represent MC objects that have
75 * but not in the MC: dprc_remove_devices()
85 * There are no child objects for this DPRC in the MC. dprc_remove_devices()
115 * check_plugged_state_change - Check change in an MC object's plugged state
117 * @mc_dev: pointer to the fsl-mc device for a given MC object
118 * @obj_desc: pointer to the MC object's descriptor in the MC
158 * state of the MC by adding objects that have been newly discovered
246 * state of the Linux bus driver, MC by adding and removing
339 * bus driver with the actual state of the MC by adding and removing
370 * It opens the physical DPRC in the MC.
371 * It scans the DPRC to discover the MC objects contained in it.
372 * It creates the interrupt pool for the MC bus associated with the DPRC.
412 * Discover MC objects in DPRC object: dprc_probe()
434 * It removes the DPRC's child objects from Linux (not from the MC) and
435 * closes the DPRC device in the MC.
437 * It destroys the interrupt pool associated with this MC bus.
/linux-4.1.27/arch/arm/mach-at91/include/mach/
H A Dat91rm9200_mc.h7 * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals registers.
20 #define AT91_MC_RCR 0x00 /* MC Remap Control Register */
23 #define AT91_MC_ASR 0x04 /* MC Abort Status Register */
43 #define AT91_MC_AASR 0x08 /* MC Abort Address Status Register */
45 #define AT91_MC_MPR 0x0c /* MC Master Priority Register */
/linux-4.1.27/drivers/edac/
H A Di3200_edac.c258 edac_dbg(1, "MC%d\n", mci->mc_idx); i3200_check()
349 edac_dbg(0, "MC:\n"); i3200_probe1()
369 edac_dbg(3, "MC: init mci\n"); i3200_probe1()
420 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); i3200_probe1()
425 edac_dbg(3, "MC: success\n"); i3200_probe1()
440 edac_dbg(0, "MC:\n"); i3200_init_one()
493 edac_dbg(3, "MC:\n"); i3200_init()
533 edac_dbg(3, "MC:\n"); i3200_exit()
547 MODULE_DESCRIPTION("MC support for Intel 3200 memory hub controllers");
H A Dx38_edac.c243 edac_dbg(1, "MC%d\n", mci->mc_idx); x38_check()
330 edac_dbg(0, "MC:\n"); x38_probe1()
351 edac_dbg(3, "MC: init mci\n"); x38_probe1()
401 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); x38_probe1()
406 edac_dbg(3, "MC: success\n"); x38_probe1()
421 edac_dbg(0, "MC:\n"); x38_init_one()
470 edac_dbg(3, "MC:\n"); x38_init()
510 edac_dbg(3, "MC:\n"); x38_exit()
524 MODULE_DESCRIPTION("MC support for Intel X38 memory hub controllers");
H A Di3000_edac.c278 edac_dbg(1, "MC%d\n", mci->mc_idx); i3000_check()
325 edac_dbg(0, "MC:\n"); i3000_probe1()
369 edac_dbg(3, "MC: init mci\n"); i3000_probe1()
402 edac_dbg(3, "MC: (%d) cumul_size 0x%x\n", i, cumul_size); i3000_probe1()
431 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); i3000_probe1()
447 edac_dbg(3, "MC: success\n"); i3000_probe1()
462 edac_dbg(0, "MC:\n"); i3000_init_one()
512 edac_dbg(3, "MC:\n"); i3000_init()
552 edac_dbg(3, "MC:\n"); i3000_exit()
566 MODULE_DESCRIPTION("MC support for Intel 3000 memory hub controllers");
H A Di82443bxgx_edac.c181 edac_dbg(1, "MC%d\n", mci->mc_idx); i82443bxgx_edacmc_check()
204 edac_dbg(1, "MC%d: Row=%d DRB = %#0x\n", i82443bxgx_init_csrows()
208 edac_dbg(1, "MC%d: Row=%d, Boundary Address=%#0x, Last = %#0x\n", i82443bxgx_init_csrows()
243 edac_dbg(0, "MC:\n"); i82443bxgx_edacmc_probe1()
246 * the MC aren't working. i82443bxgx_edacmc_probe1()
261 edac_dbg(0, "MC: mci = %p\n", mci); i82443bxgx_edacmc_probe1()
345 edac_dbg(3, "MC: success\n"); i82443bxgx_edacmc_probe1()
359 edac_dbg(0, "MC:\n"); i82443bxgx_edacmc_init_one()
463 MODULE_DESCRIPTION("EDAC MC support for Intel 82443BX/GX memory controllers");
H A Die31200_edac.c295 edac_dbg(1, "MC%d\n", mci->mc_idx); ie31200_check()
339 edac_dbg(0, "MC:\n"); ie31200_probe1()
364 edac_dbg(3, "MC: init mci\n"); ie31200_probe1()
438 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); ie31200_probe1()
444 edac_dbg(3, "MC: success\n"); ie31200_probe1()
459 edac_dbg(0, "MC:\n"); ie31200_init_one()
518 edac_dbg(3, "MC:\n"); ie31200_init()
527 edac_dbg(3, "MC:\n"); ie31200_exit()
536 MODULE_DESCRIPTION("MC support for Intel Processor E31200 memory hub controllers");
H A Di5000_edac.c360 /* These registers are always read from the MC */
768 edac_dbg(4, "MC%d\n", mci->mc_idx); i5000_check_error()
821 "MC: 'branchmap,control,errors' " i5000_get_devices()
856 "MC: 'BRANCH 0' device not found:" i5000_get_devices()
877 "MC: 'BRANCH 1' device not found:" i5000_get_devices()
1045 i5000_printk(KERN_ERR, "MC: %s:%s() kmalloc() failed\n", calculate_dimm_size()
1250 * 1 no actual memory found on this MC
1370 edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n", i5000_probe1()
1394 edac_dbg(0, "MC: Number of Branches=2 Channels= %d DIMMS= %d\n", i5000_probe1()
1397 /* allocate a new MC control structure */ i5000_probe1()
1412 edac_dbg(0, "MC: mci = %p\n", mci); i5000_probe1()
1441 /* initialize the MC control structure 'csrows' table i5000_probe1()
1444 edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i5000_init_csrows() returned nonzero value\n"); i5000_probe1()
1447 edac_dbg(1, "MC: Enable error reporting now\n"); i5000_probe1()
1451 /* add this new MC control structure to EDAC's list of MCs */ i5000_probe1()
1453 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); i5000_probe1()
1496 edac_dbg(0, "MC:\n"); i5000_init_one()
1561 edac_dbg(2, "MC:\n"); i5000_init()
1577 edac_dbg(2, "MC:\n"); i5000_exit()
1587 MODULE_DESCRIPTION("MC Driver for Intel I5000 memory controllers - "
H A Di5400_edac.c358 /* These registers are always read from the MC */
689 edac_dbg(4, "MC%d\n", mci->mc_idx); i5400_check_error()
790 "MC: 'BRANCH 0' device not found:" i5400_get_devices()
809 "MC: 'BRANCH 1' device not found:" i5400_get_devices()
968 i5400_printk(KERN_ERR, "MC: %s:%s() kmalloc() failed\n", calculate_dimm_size()
1167 * 1 no actual memory found on this MC
1270 edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n", i5400_probe1()
1279 * allocate a new MC control structure i5400_probe1()
1296 edac_dbg(0, "MC: mci = %p\n", mci); i5400_probe1()
1325 /* initialize the MC control structure 'dimms' table i5400_probe1()
1328 edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i5400_init_dimms() returned nonzero value\n"); i5400_probe1()
1331 edac_dbg(1, "MC: Enable error reporting now\n"); i5400_probe1()
1335 /* add this new MC control structure to EDAC's list of MCs */ i5400_probe1()
1337 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); i5400_probe1()
1380 edac_dbg(0, "MC:\n"); i5400_init_one()
1447 edac_dbg(2, "MC:\n"); i5400_init()
1463 edac_dbg(2, "MC:\n"); i5400_exit()
1474 MODULE_DESCRIPTION("MC Driver for Intel I5400 memory controllers - "
H A Dedac_core.h53 printk(level "EDAC MC%d: " fmt, mci->mc_idx, ##arg)
56 printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg)
65 #define EDAC_MC "MC"
251 * MC driver will receive events
300 * structure. A MC driver will allocate one of these for each edac_device
349 * MC driver will receive events
H A Di7300_edac.c836 * i7300_get_mc_regs() - Get the contents of the MC enumeration registers
993 "MC: 'BRANCH 0' device not found:" i7300_get_devices()
1004 "MC: 'BRANCH 1' device not found:" i7300_get_devices()
1036 edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n", i7300_init_one()
1044 /* allocate a new MC control structure */ i7300_init_one()
1058 edac_dbg(0, "MC: mci = %p\n", mci); i7300_init_one()
1088 /* initialize the MC control structure 'csrows' table i7300_init_one()
1091 edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i7300_init_csrows() returned nonzero value\n"); i7300_init_one()
1094 edac_dbg(1, "MC: Enable error reporting now\n"); i7300_init_one()
1098 /* add this new MC control structure to EDAC's list of MCs */ i7300_init_one()
1100 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); i7300_init_one()
1214 MODULE_DESCRIPTION("MC Driver for Intel I7300 memory controllers - "
H A Dedac_mc.c43 * Used to lock EDAC MC to just one module, avoiding two drivers e. g.
240 * @n_layers: Number of MC hierarchy layers
884 edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page); edac_mc_find_csrow_by_page()
897 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n", edac_mc_find_csrow_by_page()
1017 * MC's that can't do this, lose the memory where PCI edac_ce_error()
1018 * devices are mapped. This mapping is MC-dependent edac_ce_error()
1019 * and so we call back into the MC driver for it to edac_ce_error()
1020 * map the MC page to a physical (CPU) page which can edac_ce_error()
1151 edac_dbg(3, "MC%d\n", mci->mc_idx); edac_mc_handle_error()
1196 * to have only the MC channel and the MC dimm (also called "branch") edac_mc_handle_error()
H A Dmv64x60_edac.c737 "MC err regs\n", __func__); mv64x60_mc_err_probe()
756 printk(KERN_ERR "%s: Unable to setup MC err regs\n", __func__); mv64x60_mc_err_probe()
786 /* setup MC registers */ mv64x60_mc_err_probe()
805 "[EDAC] MC err", mv64x60_mc_err_probe()
814 printk(KERN_INFO EDAC_MOD_STR " acquired irq %d for MC Err\n", mv64x60_mc_err_probe()
868 printk(KERN_WARNING EDAC_MOD_STR "MC err failed to register\n"); mv64x60_edac_init()
H A Dmpc85xx_edac.c52 /************************ MC SYSFS parts ***********************************/
707 /**************************** MC Err device ***************************/
1041 printk(KERN_ERR "%s: Unable to get resource for MC err regs\n", mpc85xx_mc_err_probe()
1056 printk(KERN_ERR "%s: Unable to setup MC err regs\n", __func__); mpc85xx_mc_err_probe()
1115 "[EDAC] MC err", mci); mpc85xx_mc_err_probe()
1124 printk(KERN_INFO EDAC_MOD_STR " acquired irq %d for MC\n", mpc85xx_mc_err_probe()
1130 printk(KERN_INFO EDAC_MOD_STR " MC err registered\n"); mpc85xx_mc_err_probe()
1227 printk(KERN_WARNING EDAC_MOD_STR "MC fails to register\n"); mpc85xx_mc_init()
H A Dtile_edac.c137 /* A TILE MC has a single channel and one chip-select row. */ tile_edac_mc_probe()
166 * Initialize the MC control structure 'csrows' table tile_edac_mc_probe()
H A Di7core_edac.c508 /* Get data from the MC register, function 0 */ get_dimm_config()
920 * is reliable enough to check if the MC is using the
2027 /* Get data from the MC register, function 2 */ set_sdram_scrub_rate()
2091 /* Get data from the MC register, function 2 */ get_sdram_scrub_rate()
2165 edac_dbg(0, "MC: dev = %p\n", &i7core_dev->pdev[0]->dev); i7core_unregister_mci()
2173 edac_dbg(0, "MC: mci = %p, dev = %p\n", mci, &i7core_dev->pdev[0]->dev); i7core_unregister_mci()
2182 /* Remove MC sysfs nodes */ i7core_unregister_mci()
2199 /* allocate a new MC control structure */ i7core_register_mci()
2212 edac_dbg(0, "MC: mci = %p, dev = %p\n", mci, &i7core_dev->pdev[0]->dev); i7core_register_mci()
2253 /* add this new MC control structure to EDAC's list of MCs */ i7core_register_mci()
2255 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); i7core_register_mci()
2264 edac_dbg(0, "MC: failed to create sysfs nodes\n"); i7core_register_mci()
2373 * devices are grouped together to provide MC functionality, we need i7core_remove()
2454 MODULE_DESCRIPTION("MC Driver for Intel i7 Core memory controllers - "
H A Damd64_edac.h155 /* Hardware limit on ChipSelect rows per MC and processors per system */
349 u16 mc_node_id; /* MC index of this MC node */
H A Dr82600_edac.c208 edac_dbg(1, "MC%d\n", mci->mc_idx); r82600_check()
423 MODULE_DESCRIPTION("MC support for Radisys 82600 memory controllers");
H A Dsb_edac.c2245 edac_dbg(0, "MC: dev = %p\n", &sbridge_dev->pdev[0]->dev); sbridge_unregister_mci()
2253 edac_dbg(0, "MC: mci = %p, dev = %p\n", sbridge_unregister_mci()
2256 /* Remove MC sysfs nodes */ sbridge_unregister_mci()
2278 /* allocate a new MC control structure */ sbridge_register_mci()
2291 edac_dbg(0, "MC: mci = %p, dev = %p\n", sbridge_register_mci()
2399 /* add this new MC control structure to EDAC's list of MCs */ sbridge_register_mci()
2401 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); sbridge_register_mci()
2468 edac_dbg(0, "Registering MC#%d (%d of %d)\n", sbridge_probe()
2506 * devices are grouped together to provide MC functionality, we need sbridge_remove()
2588 MODULE_DESCRIPTION("MC Driver for Intel Sandy Bridge and Ivy Bridge memory controllers - "
H A Di82875p_edac.c266 edac_dbg(1, "MC%d\n", mci->mc_idx); i82875p_check()
599 MODULE_DESCRIPTION("MC support for Intel 82875 memory hub controllers");
H A Di82975x_edac.c334 edac_dbg(1, "MC%d\n", mci->mc_idx); i82975x_check()
709 MODULE_DESCRIPTION("MC support for Intel 82975 memory hub controllers");
H A Damd76x_edac.c375 MODULE_DESCRIPTION("MC support for AMD 76x memory controllers");
H A Dcell_edac.c199 /* Allocate & init EDAC MC data structure */ cell_edac_probe()
H A Di5100_edac.c48 #define I5100_FERR_NF_MEM 0xa0 /* MC First Non Fatal Errors */
70 #define I5100_NERR_NF_MEM 0xa4 /* MC Next Non-Fatal Errors */
71 #define I5100_EMASK_MEM 0xa8 /* MC Error Mask Register */
1245 MODULE_DESCRIPTION("MC Driver for Intel I5100 memory controllers");
H A Di82860_edac.c139 edac_dbg(1, "MC%d\n", mci->mc_idx); i82860_check()
H A Docteon_edac-lmc.c127 /************************ MC SYSFS parts ***********************************/
H A Dpasemi_edac.c312 MODULE_DESCRIPTION("MC support for PA Semi PWRficient memory controller");
H A Dppc4xx_edac.c124 edac_printk(level, "PPC4xx MC", fmt, ##arg)
1123 "[EDAC] MC ECCDED", ppc4xx_edac_register_irq()
1137 "[EDAC] MC ECCSEC", ppc4xx_edac_register_irq()
1292 "Failed to allocate EDAC MC instance!\n", ppc4xx_edac_probe()
1436 MODULE_DESCRIPTION("EDAC MC Driver for the PPC4xx IBM DDR2 Memory Controller");
H A Dmce_amd.c761 pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s", amd_decode_mce()
784 pr_emerg(HW_ERR "MC%d Error Address: 0x%016llx\n", m->bank, m->addr); amd_decode_mce()
H A De752x_edac.c198 * i3100 MC has a different mapping: it supports only 4 ranks.
208 * ranks/chanel, but datasheet says that the MC supports only 4 ranks.
1469 MODULE_DESCRIPTION("MC support for Intel e752x/3100 memory controllers");
H A De7xxx_edac.c604 MODULE_DESCRIPTION("MC support for Intel e7xxx memory controllers");
H A Dedac_mc_sysfs.c25 /* MC EDAC Controls, setable by module parameter, and sysfs */
654 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
H A Damd64_edac.c436 edac_dbg(2, "no matching csrow for InputAddr 0x%lx (MC node %d)\n", input_addr_to_csrow()
2435 edac_dbg(1, "MC node: %d, csrow: %d\n", init_csrows()
3060 MODULE_DESCRIPTION("MC support for AMD64 memory controllers - "
H A Dcpc925_edac.c1097 MODULE_DESCRIPTION("IBM CPC925 Bridge and MC EDAC kernel module");
/linux-4.1.27/arch/mips/include/asm/sgi/
H A Dip22.h18 * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrupts
19 * are not supported this way. Driver is supposed to allocate HPC/MC
53 #define SGI_MCDMA_IRQ SGINT_LOCAL0 + 4 /* MC DMA done */
H A Dmc.h29 #define SGIMC_CCTRL0_IENAB 0x00002000 /* Allow interrupts from MC */
33 #define SGIMC_CCTRL0_LENDIAN 0x00020000 /* Put MC in little-endian mode */
52 volatile u32 systemid; /* MC system ID register, readonly */
53 #define SGIMC_SYSID_MASKREV 0x0000000f /* Revision of MC controller */
98 /* MC chip can drive up to 4 bank 4 SIMMs each. All SIMMs in bank must
/linux-4.1.27/arch/mips/sgi-ip22/
H A Dip22-berr.c47 printk(KERN_ERR "MC Bus Error\n"); print_buserr()
82 * MC sends an interrupt whenever bus or parity errors occur. In addition,
84 * pin on the R4K. Code in bus error handler save the MC bus error registers
H A Dip22-mc.c55 printk(KERN_INFO "MC: Probing memory configuration:\n"); probe_memory()
95 printk(KERN_CRIT "MC: Memory configuration mismatch " probe_memory()
114 printk(KERN_INFO "MC: SGI memory controller Revision %d\n", sgimc_init()
117 /* Place the MC into a known state. This must be done before sgimc_init()
147 /* Step 3: Setup the MC write buffer depth, this is controlled sgimc_init()
198 tmp |= SGIMC_GIOPAR_EISA64; /* MC talks to EISA at 64bits */ sgimc_init()
H A Dip28-berr.c241 printk(KERN_ERR "MC Bus Error\n"); print_buserr()
284 printk(KERN_ERR "MC: Hmm, didn't find any error condition.\n"); print_buserr()
287 "MC: cpuctrl0/1: %08x/%05x, giopar: %04x\n" print_buserr()
288 "MC: cpu/gio_memacc: %08x/%05x, memcfg0/1: %08x/%08x\n", print_buserr()
301 * Check, whether MC's (virtual) DMA address caused the bus error.
376 * MC sends an interrupt whenever bus or parity errors occur. In addition,
378 * pin on the R4K. Code in bus error handler save the MC bus error registers
430 /* Check MC's virtual DMA stuff. */ ip28_be_interrupt()
/linux-4.1.27/arch/mips/sgi-ip32/
H A Dip32-memory.c39 printk("CRIME MC: bank %u base 0x%016Lx size %LuMiB\n", prom_meminit()
/linux-4.1.27/include/linux/amba/
H A Dpl330.h30 /* Bytes to allocate for MC buffer */
/linux-4.1.27/arch/x86/kernel/acpi/
H A Dapei.c35 * We expect HEST to provide a list of MC banks that report errors arch_apei_enable_cmcff()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/mc/
H A Dg94.c28 .base.handle = NV_SUBDEV(MC, 0x94),
H A Dg98.c49 .base.handle = NV_SUBDEV(MC, 0x98),
H A Dgf106.c28 .base.handle = NV_SUBDEV(MC, 0xc3),
H A Dgk20a.c28 .base.handle = NV_SUBDEV(MC, 0xea),
H A Dnv40.c35 .base.handle = NV_SUBDEV(MC, 0x40),
H A Dnv44.c44 .base.handle = NV_SUBDEV(MC, 0x44),
H A Dnv4c.c28 .base.handle = NV_SUBDEV(MC, 0x4c),
H A Dgf100.c66 .base.handle = NV_SUBDEV(MC, 0xc0),
H A Dnv04.c70 .base.handle = NV_SUBDEV(MC, 0x04),
H A Dnv50.c63 .base.handle = NV_SUBDEV(MC, 0x50),
/linux-4.1.27/drivers/gpu/drm/radeon/
H A Dr520.c89 printk(KERN_WARNING "Failed to wait MC idle while " r520_gpu_init()
143 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); r520_mc_program()
146 /* Program MC, should be a 32bits limited address space */ r520_mc_program()
H A Dradeon_ucode.c51 DRM_DEBUG("MC\n"); radeon_ucode_print_mc_hdr()
63 DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor); radeon_ucode_print_mc_hdr()
H A Datom-names.h89 "MM", "PLL", "MC", "PCIE", "PCIE PORT",
H A Drs400.c258 printk(KERN_WARNING "rs400: Failed to wait MC idle while " rs400_gpu_init()
397 dev_warn(rdev->dev, "rs400: Wait MC idle timeout before updating MC.\n"); rs400_mc_program()
467 /* setup MC before calling post tables */ rs400_resume()
H A Drv515.c173 printk(KERN_WARNING "Failed to wait MC idle while " rv515_gpu_init()
350 /* blackout the MC */ rv515_mc_stop()
358 /* wait for the MC to settle */ rv515_mc_stop()
434 /* unblackout the MC */ rv515_mc_resume()
477 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); rv515_mc_program()
480 /* Program MC, should be a 32bits limited address space */ rv515_mc_program()
1053 * WorstCaseLatency = worst case time from urgent to when the MC starts rv515_crtc_bandwidth_compute()
H A Dni.c661 /* load the MC ucode */ ni_mc_load_microcode()
781 /* no MC ucode on TN */ ni_init_microcode()
1006 /* XXX use MC settings? */ cayman_gpu_init()
1796 /* Skip MC reset as it's mostly likely not hung, just busy */ cayman_gpu_check_soft_reset()
1798 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); cayman_gpu_check_soft_reset()
1847 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); cayman_gpu_soft_reset()
1990 /* scratch needs to be initialized before MC */ cayman_startup()
2000 DRM_ERROR("Failed to load MC firmware!\n"); cayman_startup()
2300 /* Don't start up if the MC ucode is missing. cayman_init()
2301 * The default clocks and voltages before the MC ucode cayman_init()
2304 * We can skip this check for TN, because there is no MC cayman_init()
2308 DRM_ERROR("radeon: MC ucode required for NI+.\n"); cayman_init()
H A Dradeon_ucode.h57 /* MC */
H A Duvd_v2_2.c104 /* RV770 uses V1.0 MC */ uvd_v2_2_resume()
H A Dradeon_device.c844 * cail_mc_read - read MC (Memory Controller) register
847 * @reg: MC register offset
849 * Provides an MC register accessor for the atom interpreter (r4xx+).
850 * Returns the value of the MC register.
862 * cail_mc_write - write MC (Memory Controller) register
865 * @reg: MC register offset
868 * Provides a MC register accessor for the atom interpreter (r4xx+).
1342 /* Set the internal MC address mask radeon_device_init()
1347 rdev->mc.mc_mask = 0xffffffffffULL; /* 40 bit MC */ radeon_device_init()
1349 rdev->mc.mc_mask = 0xfffffffffULL; /* 36 bit MC */ radeon_device_init()
1351 rdev->mc.mc_mask = 0xffffffffULL; /* 32 bit MC */ radeon_device_init()
H A Drs600.c489 /* reset MC */ rs600_asic_reset()
861 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); rs600_gpu_init()
960 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); rs600_mc_program()
966 /* Program MC */ rs600_mc_program()
H A Dr300.c48 * the CP read collide with the flush somehow, or maybe the MC, hard to
381 printk(KERN_WARNING "Failed to wait MC idle while " r300_gpu_init()
1328 DRM_INFO("Failed to wait MC idle before programming MC.\n"); r300_mc_program()
1329 /* Program MC, should be a 32bits limited address space */ r300_mc_program()
H A Drs690.c55 printk(KERN_WARNING "Failed to wait MC idle while " rs690_gpu_init()
391 * WorstCaseLatency = worst case time from urgent to when the MC starts rs690_crtc_bandwidth_compute()
674 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); rs690_mc_program()
675 /* Program MC, should be a 32bits limited address space */ rs690_mc_program()
H A Devergreen.c1336 * @crtc_base: new address of the crtc (GPU MC address)
2397 * evergreen_mc_wait_for_idle - wait for MC idle callback.
2401 * Wait for the MC (memory controller) to be idle.
2403 * Returns 0 if the MC is idle, -1 if not.
2778 /* blackout the MC */ evergreen_mc_stop()
2782 /* wait for the MC to settle */ evergreen_mc_stop()
2852 /* unblackout the MC */ evergreen_mc_resume()
2909 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); evergreen_mc_program()
2960 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); evergreen_mc_program()
3926 /* Skip MC reset as it's mostly likely not hung, just busy */ evergreen_gpu_check_soft_reset()
3928 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); evergreen_gpu_check_soft_reset()
3962 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); evergreen_gpu_soft_reset()
4079 dev_warn(rdev->dev, "Wait for MC idle timed out !\n"); evergreen_gpu_pci_config_reset()
5480 /* scratch needs to be initialized before MC */ evergreen_startup()
5490 DRM_ERROR("Failed to load MC firmware!\n"); evergreen_startup()
5778 /* Don't start up if the MC ucode is missing on BTC parts. evergreen_init()
5779 * The default clocks and voltages before the MC ucode evergreen_init()
5784 DRM_ERROR("radeon: MC ucode required for NI+.\n"); evergreen_init()
H A Dsi.c1615 /* load the MC ucode */ si_mc_load_microcode()
3211 /* XXX use MC settings? */ si_gpu_init()
3840 /* Skip MC reset as it's mostly likely not hung, just busy */ si_gpu_check_soft_reset()
3842 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); si_gpu_check_soft_reset()
3893 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); si_gpu_soft_reset()
4062 dev_warn(rdev->dev, "Wait for MC idle timed out !\n"); si_gpu_pci_config_reset()
4129 /* MC */ si_mc_program()
4148 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); si_mc_program()
4171 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); si_mc_program()
6878 /* scratch needs to be initialized before MC */ si_startup()
6888 DRM_ERROR("Failed to load MC firmware!\n"); si_startup()
7214 /* Don't start up if the MC ucode is missing. si_init()
7215 * The default clocks and voltages before the MC ucode si_init()
7219 DRM_ERROR("radeon: MC ucode required for NI+.\n"); si_init()
H A Dcik.c1836 * ci_mc_load_microcode - load MC ucode into the hw
1840 * Load the GDDR MC ucode into the hw (CIK).
1916 /* load the MC ucode */ ci_mc_load_microcode()
2204 /* No SMC, MC ucode on APUs */ cik_init_microcode()
3663 /* XXX use MC settings? */ cik_gpu_init()
5297 /* Skip MC reset as it's mostly likely not hung, just busy */ cik_gpu_check_soft_reset()
5299 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); cik_gpu_check_soft_reset()
5359 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); cik_gpu_soft_reset()
5566 dev_warn(rdev->dev, "Wait for MC idle timed out !\n"); cik_gpu_pci_config_reset()
5648 /* MC */
5675 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); cik_mc_program()
5697 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); cik_mc_program()
7381 /* XXX this should actually be a bus address, not an MC address. same on older asics */ cik_irq_init()
8491 /* scratch needs to be initialized before MC */ cik_startup()
8501 DRM_ERROR("Failed to load MC firmware!\n"); cik_startup()
8947 /* Don't start up if the MC ucode is missing. cik_init()
8948 * The default clocks and voltages before the MC ucode cik_init()
8952 DRM_ERROR("radeon: MC ucode required for NI+.\n"); cik_init()
H A Drv770.c1023 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rv770_mc_program()
1065 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rv770_mc_program()
1692 /* scratch needs to be initialized before MC */ rv770_startup()
H A Datom.c327 DEBUG("MC[0x%02X]", idx); atom_get_src_int()
555 DEBUG("MC[0x%02X]", idx); atom_put_dst()
H A Dr600.c1266 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); r600_mc_program()
1306 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); r600_mc_program()
1621 /* Skip MC reset as it's mostly likely not hung, just busy */ r600_gpu_check_soft_reset()
1623 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); r600_gpu_check_soft_reset()
1663 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); r600_gpu_soft_reset()
1799 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); r600_gpu_pci_config_reset()
2999 /* scratch needs to be initialized before MC */ r600_startup()
H A Dradeon.h59 * memory controller (only MC setup failure
672 * GPU MC structures, functions & helpers
2341 /* protects concurrent MC register access */
2403 const struct firmware *mc_fw; /* NI MC firmware */
H A Drs600d.h503 /* MC registers */
H A Drv515d.h141 /* ix[MC] registers */
H A Dradeon_pm.c1215 /* set up the default clocks if the MC ucode is loaded */ radeon_pm_resume_old()
1313 /* set up the default clocks if the MC ucode is loaded */ radeon_pm_init_old()
H A Dradeon_kms.c122 * properly initialize the GPU MC controller and permit radeon_driver_load_kms()
H A Dradeon_vm.c739 * The MC L1 TLB supports variable sized pages, based on a fragment radeon_vm_frag_ptes()
H A Datombios.h6290 USHORT usRegIndex; // MC register index
6366 /////////////Support for GDDR5 MC uCode to reside in upper 64K of ROM/////////////
6369 #define UCODE_SIGNATURE 0x4375434d // 'MCuC' - MC uCode
6739 USHORT usMemAdjustTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory vendor specific MC adjust setting
6740 USHORT usMemClkPatchTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory clock specific MC setting
6754 USHORT usMemAdjustTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory vendor specific MC adjust setting
6755 USHORT usMemClkPatchTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory clock specific MC setting
6769 USHORT usMemAdjustTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory vendor specific MC adjust setting
6770 USHORT usMemClkPatchTblOffset; // offset of ATOM_INIT_REG_BLOCK structure for memory clock specific MC setting
7385 //Portion VI: Definitinos for vbios MC scratch registers that driver used
/linux-4.1.27/include/trace/events/
H A Dmce.h53 TP_printk("CPU: %d, MCGc/s: %llx/%llx, MC%d: %016Lx, ADDR/MISC: %016Lx/%016Lx, RIP: %02x:<%016Lx>, TSC: %llx, PROCESSOR: %u:%x, TIME: %llu, SOCKET: %u, APIC: %x",
/linux-4.1.27/arch/powerpc/include/asm/
H A Dkvm_booke_hv_asm.h39 * Expected inputs (GEN/GDBELL/DBG/CRIT/MC exception types):
H A Dexception-64e.h43 * exception frame is smaller than the CRIT or MC one though
/linux-4.1.27/drivers/net/ethernet/sfc/
H A Dptp.c12 * PTP support is assisted by firmware running on the MC, which provides
15 * this is because the MC operations are relatively long and would block
30 * Transmit: send packet through MC, which returns the transmission time
70 /* How many (MC) receive events that can be queued */
106 * the MC only captures the last six bytes of the clock identity. These values
182 * struct efx_ptp_event_rx - A PTP receive event (from MC)
196 * struct efx_ptp_timeset - Synchronisation between host and MC
223 * @evt_list: List of MC receive events awaiting packets
247 * @start: Address at which MC indicates ready for synchronisation
255 * @txbuf: Buffer for use when transmitting (PTP) packets to MC (avoids
384 /* Fetch MC statistics. We *must* fill in all statistics or efx_ptp_update_stats()
632 /* Repeatedly send the host time to the MC which will capture the hardware
649 /* Write host time for specified period or until MC is done */ efx_ptp_send_times()
672 /* Read a timeset from the MC's results and partial process. */
694 /* Process times received from MC.
722 /* Read the set of results and find the last good host-MC efx_ptp_process_times()
723 * synchronization result. The MC times when it finishes reading the efx_ptp_process_times()
749 * time and writing it to MC memory. efx_ptp_process_times()
805 /* Synchronize times between the host and the MC */ efx_ptp_synchronize()
824 /* Clear flag that signals MC ready */ efx_ptp_synchronize()
1359 * the receive timestamp from the MC - this will probably occur after the
1360 * packet arrival because of the processing in the MC.
1445 /* Transmit a PTP packet. This has to be transmitted by the MC
H A Denum.h146 * @RESET_TYPE_MC_BIST: MC entering BIST mode.
153 * @RESET_TYPE_MC_FAILURE: MC reboot/assertion
H A Dmcdi.c86 /* Let the MC (and BMC, if this is a LOM) know that the driver efx_mcdi_init()
227 netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); efx_mcdi_read_response_header()
231 "MC response mismatch tx seq 0x%x rx seq 0x%x\n", efx_mcdi_read_response_header()
304 /* Test and clear MC-rebooted flag for this port/function; reset
479 "MC response mismatch tx seq 0x%x rx " efx_mcdi_ev_cpl()
547 "MC command 0x%x inlen %d mode %d timed out\n", _efx_mcdi_rpc_finish()
597 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n", _efx_mcdi_rpc_finish()
799 "MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n", efx_mcdi_display_error()
853 /* If a request is still running, make sure we give the MC efx_mcdi_flush_async()
907 * in polled mode, then do nothing because the MC reboot handler will efx_mcdi_ev_death()
952 /* The MC is going down in to BIST mode. set the BIST flag to block
1000 "MC watchdog or assertion failure at 0x%x\n", data); efx_mcdi_process_event()
1023 "MC Scheduler alert (0x%x)\n", data); efx_mcdi_process_event()
1027 netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); efx_mcdi_process_event()
1031 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n"); efx_mcdi_process_event()
1453 /* If the MC is running debug firmware, it might now be efx_mcdi_exit_assertion()
H A Dmcdi_pcol.h20 /* The MC main image has started to boot. */
27 * the MC persistent data must be reinitialised. */
32 /* Siena MC shared memmory offsets */
33 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
73 * The client writes it's request into MC shared memory, and rings the
74 * doorbell. Each request is completed by either by the MC writting
121 /* The MC can generate events for two reasons:
158 * Which means for convenience the event code is 0xc for all MC
168 /* assert() has killed the MC */
459 /* enum: The MC has rebooted (huntington and later, siena uses CODE_REBOOT and
463 /* enum: the MC has detected a parity error */
465 /* enum: the MC has detected a correctable error */
467 /* enum: the MC has detected an uncorrectable error */
469 /* enum: The MC has entered offline BIST mode */
473 /* enum: Artificial event generated by host and posted via MC for test
604 * to the MC. Note that this structure | is overlayed over a normal FCDI event
637 * Read multiple 32byte words from MC memory.
658 * Write multiple 32byte words to MC memory.
678 * Copy MC code between two locations and jump.
731 * Get the instruction address from which the MC booted.
742 /* enum: indicates that the MC wasn't flash booted */
813 * Get version information about the MC firmware.
898 /* enum: Debug operations to MC. */
908 /* enum: Set the MC packet filter VLAN tags for received PTP packets */
910 /* enum: Set the MC packet filter UUID for received PTP packets */
912 /* enum: Set the MC packet filter Domain for received PTP packets */
1374 * comparing host and NIC clock times, the MC returns a set of samples that
1375 * contain the host start and end time, the MC time when the host start was
1376 * detected and the time the MC waited between reading the time and detecting
1378 * end and start times minus the time that the MC waited for host end.
1738 * Returns the MC firmware configuration structure.
1766 * type, but otherwise have no meaning to the MC; they are used by the driver
1821 * Set the 16byte seed for the MC pseudo-random generator.
2162 /* enum: Run the MC loopback tests. */
2166 /* enum: Run MC RAM test. */
2291 /* enum: MC MIPS bus. */
2681 * by the MC as it switches between the GMAC and XMAC. The MC will write out
3081 /* enum: MC firmware. */
3083 /* enum: MC backup firmware. */
3264 * Reboot the MC.
3268 * down and reinitialise), to allow both ports to reset the MC once in an
3314 * Set the mode for the next MC reboot. Locks required: NONE. Sets the reboot
3343 * mapping between value and state is nominally determined by the MC, but may
3538 * The MC will send a SENSOREVT event every time any sensor changes state. The
4037 /* enum: Primary MC firmware partition */
4039 /* enum: Secondary MC firmware partition */
4540 /* enum: receive to MC */
6944 /* First 8 bits [39:32] of DATA are consumed by MC-DPCPU protocol and must be
7754 * Execute an arbitrary MCDI command on the slave MC of a dual-core device.
7770 * or a reboot of the MC.)
H A Dnic.h473 * @warm_boot_count: Last seen MC warm boot count
476 * @must_realloc_vis: Flag: VIs have yet to be reallocated after MC reboot
477 * @must_restore_filters: Flag: filters have yet to be restored after MC reboot
483 * @must_restore_piobufs: Flag: PIO buffers have yet to be restored after MC
489 * after MC reboot
H A Dmcdi.h49 * @new_epoch: Indicates start of day or start of MC reboot recovery
176 * 32-bit-aligned. Also, on Siena we must copy to the MC shared
H A Def10.c196 /* Get the MC's warm boot count. In case it's rebooting right efx_ef10_probe()
739 /* If it was a port reset, trigger reallocation of MC resources. efx_ef10_reset()
740 * Note that on an MC reset nothing needs to be done now because we'll efx_ef10_reset()
741 * detect the MC reset later and handle it then. efx_ef10_reset()
742 * For an FLR, we never get an MC reset event, but the MC has reset all efx_ef10_reset()
2127 /* If the MC has just rebooted, the TX/RX queues will have already been efx_ef10_fini_dmaq()
3301 /* MC BISTs follow a different poll mechanism to phy BISTs.
3302 * The BIST is done in the poll handler on the MC, and the MCDI command
H A Dio.h59 * most of them are only 32 bits wide. The only exceptions are the MC
H A Dmcdi_port.c411 /* The MC indicates that LOOPBACK_NONE is a valid loopback mode, efx_mcdi_phy_probe()
H A Dsiena.c673 * state with MC by resetting any set WoL filters */ siena_init_wol()
H A Dfarch_regs.h22 * MMIO register MC register Host memory structure
2531 /* MC_TREG_SMEM: MC Shared Memory */
H A Dnet_driver.h1134 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
1203 * @ptp_write_host_time: Send host time to MC as part of sync protocol
/linux-4.1.27/drivers/isdn/hisax/
H A Delsa_cs.c203 PCMCIA_DEVICE_PROD_ID12("ELSA AG (Aachen, Germany)", "MicroLink ISDN/MC ", 0x983de2c4, 0x333ba257),
204 PCMCIA_DEVICE_PROD_ID12("ELSA GmbH, Aachen", "MicroLink ISDN/MC ", 0x639e5718, 0x333ba257),
/linux-4.1.27/drivers/memory/tegra/
H A Dmc.c71 /* compute the number of MC clock cycles per tick */ tegra_mc_setup_latency_allowance()
229 /* length of MC tick in nanoseconds */ tegra_mc_probe()
239 dev_err(&pdev->dev, "failed to get MC clock: %ld\n", tegra_mc_probe()
/linux-4.1.27/sound/pci/ice1712/
H A Dse.c74 * MC/DM1 (27pin) -- 5V |
87 * MC/IWL (12pin) -- GPIO17
658 * MC/DM1 (27pin) -- GND
659 * MC/DM0 (26pin) -- GND
726 [ICE_EEP2_GPIO_DIR2] = 0x07, /* WM8766 ML/MC/MD 1=output */
734 [ICE_EEP2_GPIO_STATE2] = 0x07, /* WM8766 ML/MC/MD */
H A Denvy24ht.h141 #define VT1724_MULTI_PDMA0 0x01 /* MC Interleave/PDMA0 */
169 #define VT1724_PDMA0_START 0x01 /* MC Interleave / PDMA0 start */
H A Dpsc724.c87 * MC/IWL (pin12) -- GPIO17 (VT1722 pin97)
443 [ICE_EEP2_GPIO_DIR2] = 0x5f, /* MUTE_ALL,WM8766 MUTE/MODE/ML/MC/MD */
447 [ICE_EEP2_GPIO_MASK2] = 0xa0, /* MUTE_ALL,WM8766 MUTE/MODE/ML/MC/MD */
H A Dwtm.c476 /*printk(KERN_DEBUG "Rate change: %d, new MC: 0x%02x\n", rate, new);*/ stac9460_set_rate_val()
H A Dprodigy192.c343 /*dev_dbg(ice->card->dev, "Rate change: %d, new MC: 0x%02x\n", rate, new);*/ stac9460_set_rate_val()
/linux-4.1.27/drivers/net/ethernet/intel/igb/
H A De1000_mbx.h58 #define E1000_VF_SET_MULTICAST 0x03 /* VF requests to set MC addr */
/linux-4.1.27/drivers/net/ethernet/intel/igbvf/
H A Dmbx.h65 #define E1000_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */
H A Dvf.c234 * there are more than 30 MC addresses to add then punt the e1000_update_mc_addr_list_vf()
/linux-4.1.27/drivers/net/ethernet/xilinx/
H A Dll_temac_mdio.c105 dev_dbg(lp->dev, "MDIO bus registered; MC:%x\n", temac_mdio_setup()
H A Dxilinx_axienet.h284 /* Bit masks for Axi Ethernet MDIO interface MC register */
/linux-4.1.27/drivers/net/fddi/skfp/h/
H A Dtargethw.h83 u_short mc_dummy ; /* work around for MC compiler bug */
/linux-4.1.27/arch/x86/include/uapi/asm/
H A Dsvm.h104 { SVM_EXIT_EXCP_BASE + MC_VECTOR, "MC excp" }, \
/linux-4.1.27/drivers/char/
H A Dhpet.c59 #define write_counter(V, MC) writeq(V, MC)
60 #define read_counter(MC) readq(MC)
62 #define write_counter(V, MC) writel(V, MC)
63 #define read_counter(MC) readl(MC)
/linux-4.1.27/drivers/media/dvb-frontends/
H A Ddib7000m.c35 /* offset is 1 in case of the 7000MC */
136 if (state->reg_offs && (r >= 112 && r <= 331)) // compensate for 7000MC dib7000m_write_tab()
244 /* P_sdio_select_clk = 0 on MC and after*/ dib7000m_set_power_mode()
725 if (state->revision > 0x4000) { // settings for the MC dib7000m_set_agc_config()
924 /* deactive the possibility of diversity reception if extended interleave - not for 7000MC */ dib7000m_set_channel()
1438 .name = "DiBcom 7000MA/MB/PA/PB/MC",
1469 MODULE_DESCRIPTION("Driver for the DiBcom 7000MA/MB/PA/PB/MC COFDM demodulator");
H A Ddib3000mc.c844 dprintk("-E- DiB3000P/MC #%d: not identified\n", k); dib3000mc_i2c_enumeration()
908 .name = "DiBcom 3000MC/P",
939 MODULE_DESCRIPTION("Driver for the DiBcom 3000MC/P COFDM demodulator");
/linux-4.1.27/drivers/misc/
H A Dbmp085.c73 s16 MB, MC, MD; member in struct:bmp085_calibration_data
120 cali->MC = be16_to_cpu(tmp[9]); bmp085_read_calibration_data()
213 x2 = (cali->MC << 11) / (x1 + cali->MD); bmp085_get_temperature()
/linux-4.1.27/drivers/scsi/csiostor/
H A Dcsio_hw_t5.c161 * csio_t5_mc_read - read from MC through backdoor accesses
168 * Read 64 bytes of data from MC starting at a 64-byte-aligned address
265 * csio_t5_memory_rw - read/write EDC 0, EDC 1 or MC via PCIE memory window
/linux-4.1.27/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_mbx.h84 #define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */
/linux-4.1.27/drivers/net/ethernet/intel/ixgbevf/
H A Dmbx.h94 #define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */
H A Dvf.c444 * there are more than 30 MC addresses to add then punt the ixgbevf_update_mc_addr_list_vf()
/linux-4.1.27/drivers/memory/
H A Dtegra20-mc.c252 MODULE_DESCRIPTION("Tegra20 MC driver");
/linux-4.1.27/include/ras/
H A Dras_event.h202 {PCI_ERR_UNC_MCBTLP, "MC Blocked TLP"}, \
/linux-4.1.27/arch/mips/include/asm/sibyte/
H A Dsb1250_regs.h59 * XXX: can't remove MC base 0 if 112x, since it's used by other macros,
63 #if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
275 #if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
306 #if SIBYTE_HDR_FEATURE_1250_112x /* This MC only on 1250 & 112x */
/linux-4.1.27/arch/cris/arch-v32/drivers/
H A Diop_fw_load.c102 printk(KERN_ERR "Timeout waiting to acquire MC\n"); iop_fw_load_spu()
/linux-4.1.27/drivers/net/ethernet/i825xx/
H A Dsun3_82586.h188 #define CMD_MCSETUP 0x0003 /* MC setup command */
252 unsigned short mc_cnt; /* number of bytes in the MC-List */
H A Dether1.c959 * num_addrs > 0 Multicast mode, receive normal and MC packets, and do
H A Dsun3_82586.c1139 * Set MC list ..
/linux-4.1.27/sound/isa/opti9xx/
H A Dmiro.c1170 "OPTi9xx MC"); snd_miro_opti_check()
1214 /* get ACI port from OPTi9xx MC 4 */ snd_card_miro_aci_detect()
1278 "miro (OPTi9xx MC)"); snd_miro_probe()
1280 snd_printk(KERN_ERR "request for OPTI9xx MC failed\n"); snd_miro_probe()
1540 snd_printk(KERN_ERR "MC pnp configure failure: %d\n", snd_card_miro_pnp()
1549 * The MC(0) is never accessed and the miroSOUND PCM20 card does not snd_card_miro_pnp()
H A Dopti92x-ad1848.c673 "OPTi9xx MC"); snd_opti9xx_read_check()
683 "OPTi93x MC"); snd_opti9xx_read_check()
765 snd_printk(KERN_ERR "MC pnp configure failure: %d\n", err); snd_card_opti9xx_pnp()
772 * The MC(0) is never accessed and card does not snd_card_opti9xx_pnp()
/linux-4.1.27/drivers/media/platform/s5p-mfc/
H A Ds5p_mfc_ctrl.c186 /* All reset except for MC */ s5p_mfc_reset()
191 /* Check MC status */ s5p_mfc_reset()
/linux-4.1.27/drivers/ide/
H A Dpdc202xx_old.c72 /* clear MC[3:0] bits of register C */ pdc202xx_set_mode()
/linux-4.1.27/drivers/net/ethernet/intel/ixgb/
H A Dixgb_hw.c446 /* Set the new number of MC addresses that we are being requested to use. */ ixgb_mc_addr_list_update()
465 pr_debug("MC Addr #%d = %pM\n", i, mca); ixgb_mc_addr_list_update()
485 pr_debug("MC Update Complete\n"); ixgb_mc_addr_list_update()
530 pr_debug("MC filter type param set incorrectly\n"); ixgb_hash_mc_addr()
/linux-4.1.27/drivers/pci/pcie/aer/
H A Daerdrv_errprint.c120 "MC Blocked TLP", /* Bit Position 23 */
/linux-4.1.27/arch/x86/kernel/
H A Ddumpstack_64.c27 [ MCE_STACK-1 ] = "#MC",
H A Dsmpboot.c355 * discard the MC level of the topology later.
369 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
/linux-4.1.27/drivers/acpi/apei/
H A Dhest.c126 * along with a set of MC banks which work in FF mode.
/linux-4.1.27/include/linux/
H A Dvia-core.h141 #define VDE_I_MCCFIEN 0x00040000 /* MC comp frame int mask enable */
H A Dedac.h92 * @DEV_UNKNOWN: Can't be determined, or MC doesn't support detect it
697 * For most MC's, this will be NULL.
760 /* work struct for this MC */
/linux-4.1.27/include/uapi/linux/
H A Dif_packet.h29 #define PACKET_LOOPBACK 5 /* MC/BRD frame looped back */
H A Dif_link.h206 IFLA_INET6_MCAST, /* MC things. What of them? */
/linux-4.1.27/arch/mips/sibyte/common/
H A Dbus_watcher.c126 seq_printf(m, "MC-d-cor %8ld\nMC-d-bad %8ld\n", bw_proc_show()
/linux-4.1.27/arch/powerpc/kernel/
H A Dmce_power.c258 * different way and hence we can recover from this MC. mce_handle_ue_error()
H A Dexceptions-64s.S484 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
1369 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1409 * continue in host kernel in V mode to deliver the MC event.
1411 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1421 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1462 * Return from MC interrupt.
H A Dhead_booke.h175 EXC_LEVEL_EXCEPTION_PROLOG(MC, MACHINE_CHECK, \
H A Dexceptions-64e.S340 EXCEPTION_PROLOG(n, intnum, MC, addition##_MC(n))
1645 SET_IVOR(39, 0x2e0) /* Guest Processor Doorbell Crit/MC */
/linux-4.1.27/arch/ia64/include/asm/
H A Dmca.h54 /* Information maintained by the MC infrastructure */
H A Dpal.h406 ci : 1, /* MC isolated */
420 tl : 1, /* 1 => MC occurred
440 in : 1, /* 0 = MC, 1 = INIT */
442 cm : 1, /* MC corrected */
443 ex : 1, /* MC is expected */
/linux-4.1.27/arch/ia64/kernel/
H A Derr_inject.c313 MODULE_DESCRIPTION("MC error injection kernel sysfs interface");
/linux-4.1.27/arch/arm/kernel/
H A Dtopology.c286 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
/linux-4.1.27/drivers/net/fddi/skfp/
H A Dskfddi.c865 // Reset all MC addresses skfp_ctl_set_multicast_list_wo_lock()
871 pr_debug("ENABLE ALL MC ADDRESSES\n"); skfp_ctl_set_multicast_list_wo_lock()
882 pr_debug("ENABLE MC ADDRESS: %pMF\n", netdev_for_each_mc_addr()
886 } else { // more MC addresses than HW supports
889 pr_debug("ENABLE ALL MC ADDRESSES\n");
891 } else { // no MC addresses
893 pr_debug("DISABLE ALL MC ADDRESSES\n");
/linux-4.1.27/drivers/video/fbdev/
H A Dw100fb.h163 /* Block MC Start: */
178 /* Block MC End: */
/linux-4.1.27/net/8021q/
H A Dvlan_dev.c13 * - Fix MC-list, finally.
14 * - Flush MC-list on VLAN destroy.
/linux-4.1.27/drivers/net/arcnet/
H A Dcom20020.c334 * num_addrs > 0 Multicast mode, receive normal and MC packets, and do
/linux-4.1.27/drivers/media/usb/dvb-usb/
H A Ddibusb-common.c187 /* 3000MC/P stuff */
/linux-4.1.27/drivers/net/wireless/orinoco/
H A Dorinoco_cs.c259 PCMCIA_DEVICE_PROD_ID12("ELSA", "AirLancer MC-11", 0x4507a33a, 0xef54f0e3),
/linux-4.1.27/drivers/staging/fbtft/
H A Dfb_ili9163.c7 * .S.U.M.O.T.O.Y. by Max MC Costa (https://github.com/sumotoy/TFT_ILI9163C).
/linux-4.1.27/drivers/net/wireless/ath/
H A Dregd_common.h427 {CTRY_MONACO, ETSI4_WORLD, "MC"},
/linux-4.1.27/arch/x86/kernel/cpu/mcheck/
H A Dmce-severity.c224 * error and exit #MC handler. mce_severity_amd()
/linux-4.1.27/arch/x86/kernel/cpu/
H A Dperf_event_intel_uncore_snbep.c1030 { /* MC Channel 0 */
1034 { /* MC Channel 1 */
1038 { /* MC Channel 2 */
1042 { /* MC Channel 3 */
/linux-4.1.27/arch/s390/kernel/
H A Dtopology.c451 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
/linux-4.1.27/arch/mips/mm/
H A Dinit.c49 * when needed. This is necessary only on R4000 / R4400 SC and MC versions
/linux-4.1.27/drivers/net/cris/
H A Deth_v10.c1552 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1589 /* MC mode, receive normal and MC packets */ set_multicast_list()
/linux-4.1.27/drivers/s390/char/
H A Dtape_3590.c1267 dev_warn (&device->cdev->dev, "MIM SEV=%i, MC=%02x, ES=%x/%x, " tape_3590_print_era_msg()
1278 " MC=%02x, ES=%x/%x, REF=0x%04x-0x%04x-0x%04x\n", tape_3590_print_era_msg()
1289 ", MC=%02x, ES=%x/%x, REF=0x%04x-0x%04x-0x%04x\n", tape_3590_print_era_msg()
/linux-4.1.27/drivers/infiniband/hw/nes/
H A Dnes_nic.c902 nes_debug(NES_DBG_NIC_RX, "Number of MC entries = %d, Promiscuous = %d, All Multicast = %d.\n", nes_netdev_set_multicast_list()
944 nes_debug(NES_DBG_NIC_RX, "Assigning MC Address %pM to register 0x%04X nic_idx=%d\n", nes_netdev_set_multicast_list()
965 nes_debug(NES_DBG_NIC_RX, "Clearing MC Address at register 0x%04X\n", nes_netdev_set_multicast_list()
/linux-4.1.27/drivers/staging/rtl8723au/core/
H A Drtw_xmit.c1851 case 0x11:/* BC/MC in PS (HIQ) */ rtw_get_ff_hwaddr23a()
2091 /* for BC/MC Frames */ stop_sta_xmit23a()
2114 /* for BC/MC Frames */ stop_sta_xmit23a()
2201 /* for BC/MC Frames */
/linux-4.1.27/drivers/staging/rtl8188eu/core/
H A Drtw_xmit.c1689 case 0x11:/* BC/MC in PS (HIQ) */ rtw_get_ff_hwaddr()
1901 /* for BC/MC Frames */ stop_sta_xmit()
1922 /* for BC/MC Frames */ stop_sta_xmit()
2013 /* for BC/MC Frames */ wakeup_sta_to_xmit()
/linux-4.1.27/arch/parisc/include/uapi/asm/
H A Dpdc.h388 /* [0x350] memory configuration (MC) */
/linux-4.1.27/Documentation/dvb/
H A Dget_dvb_firmware73 verify("$tmpdir/software/OEM/HE/App/boot/SC_MAIN.MC", $hash);
74 copy("$tmpdir/software/OEM/HE/App/boot/SC_MAIN.MC", $outfile);
/linux-4.1.27/drivers/char/ipmi/
H A Dipmi_msghandler.c213 /* Commands we sent to the MC. */
216 /* Responses from the MC that were delivered to a user. */
219 /* Responses from the MC that were not delivered to a user. */
2691 * If the MC does not support this channel_handler()
4073 * only for messages to the local MC, which don't get check_msg_timeout()
4412 /* Request the device info from the local MC. */ send_panic_events()
4421 /* Request the event receiver from the local MC. */ send_panic_events()
/linux-4.1.27/drivers/net/ethernet/amd/
H A Dariadne.c640 * num_addrs > 0 Multicast mode, receive normal and MC packets,
H A Datarilance.c1071 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
H A Dni65.c1224 printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev->name); set_multicast_list()
H A Dsun3lance.c892 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
H A Dnmclan_cs.c1412 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
/linux-4.1.27/drivers/net/ethernet/neterion/
H A Ds2io-regs.h850 /* MC configuration */
/linux-4.1.27/drivers/media/rc/
H A Dite-cir.h460 * micro-controller. So one of the MC's firmware role is to act as a bridge
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmsmac/
H A Dmain.h429 * mc_fid_counter: BC/MC FIFO frame ID counter.
/linux-4.1.27/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x.h376 /* MC hsi */
737 /* MC hsi */
1309 * Event queue (EQ or event ring) MC hsi
2453 /* Number of u32 elements in MC hash array */
/linux-4.1.27/drivers/dma/
H A Dpl330.c1308 * Returns the number of bytes taken to setup the MC for the req.
1871 /* Use default MC buffer size if not provided */ pl330_add()
2460 * MC buffer, but considering a req size is seldom __pl330_prep_dma_memcpy()
2464 * have the platform increase MC buffer size than __pl330_prep_dma_memcpy()
/linux-4.1.27/arch/x86/kvm/
H A Dtrace.h253 EXS(MF), EXS(AC), EXS(MC)
/linux-4.1.27/arch/powerpc/platforms/powernv/
H A Dopal.c163 * Allocate a buffer to hold the MC recoverable ranges. We would be early_init_dt_scan_recoverable_ranges()
/linux-4.1.27/arch/powerpc/sysdev/
H A Dfsl_rio.c111 pr_debug("RIO: %s - MC Exception handled\n", fsl_rio_mcheck_exception()
/linux-4.1.27/arch/powerpc/kvm/
H A Dbookehv_interrupts.S230 kvm_handler BOOKE_INTERRUPT_MACHINE_CHECK, EX_PARAMS(MC), \
/linux-4.1.27/arch/tile/kernel/
H A Dpci_gx.c990 pr_err("PCI: Mem-Map alloc failure on TRIO %d mac %d for MC %d, give up\n", for_each_online_node()
1022 pr_err("PCI: Mem-Map init failure on TRIO %d mac %d for MC %d, give up\n", for_each_online_node()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_hw.c336 * t4_mc_read - read from MC through backdoor accesses
339 * @idx: which MC to access
343 * Read 64 bytes of data from MC starting at a 64-byte-aligned address
446 * t4_memory_rw - read/write EDC 0, EDC 1 or MC via PCIE memory window
2637 * EDC/MC interrupt handler.
2641 static const char name[4][7] = { "EDC0", "EDC1", "MC/MC0", "MC1" }; mem_intr_handler()
H A Dcxgb4.h290 u32 memtype; /* which memory (EDC0, EDC1, MC) */
/linux-4.1.27/drivers/media/usb/dvb-usb-v2/
H A Daf9015.c1452 &af9015_props, "KWorld Digial MC-810", NULL) },
/linux-4.1.27/drivers/scsi/
H A Dscsi_debug.c3104 case 0x4: /* download microcode (MC) and activate (ACT) */ resp_write_buffer()
3109 case 0x5: /* download MC, save and ACT */ resp_write_buffer()
3112 case 0x6: /* download MC with offsets and ACT */ resp_write_buffer()
3124 case 0x7: /* download MC with offsets, save, and ACT */ resp_write_buffer()
/linux-4.1.27/drivers/target/iscsi/
H A Discsi_target_util.c275 * Commands may be received out of order if MC/S is in use.
/linux-4.1.27/drivers/gpu/drm/i810/
H A Di810_dma.c1044 DRM_DEBUG("MC found buffer that isn't mine!\n"); i810_dma_dispatch_mc()
/linux-4.1.27/drivers/block/paride/
H A Dpd.c247 "IDNF", "MC", "UNC", "???", "TMO"
/linux-4.1.27/arch/mips/kernel/
H A Dcpu-probe.c707 * SC and MC versions can't be reliably told apart, cpu_probe_legacy()
/linux-4.1.27/sound/spi/
H A Dat73c213.c52 0x09, /* 08 - MC */
/linux-4.1.27/sound/pci/ac97/
H A Dac97_codec.c2127 /* test for MC'97 */ snd_ac97_mixer()
2199 "MC'97 %d converters and GPIO not ready (0x%x)\n", snd_ac97_mixer()
/linux-4.1.27/drivers/net/ethernet/8390/
H A Dlib8390.c917 * Bug Alert! The MC regs on the SMC 83C690 (SMC Elite and SMC do_set_multicast_list()

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