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Searched refs:MAX_RATE_POWER (Results 1 – 13 of 13) sorted by relevance

/linux-4.1.27/drivers/net/wireless/ath/ath9k/
Dtx99.c143 if (sc->tx99_power == MAX_RATE_POWER + 1) in ath9k_tx99_init()
144 sc->tx99_power = MAX_RATE_POWER; in ath9k_tx99_init()
247 if (tx_power > MAX_RATE_POWER) in write_file_tx99_power()
Deeprom_9287.c641 twiceMaxEdgePower = MAX_RATE_POWER; in ath9k_hw_set_ar9287_power_per_rate_table()
789 if (ratesArray[i] > MAX_RATE_POWER) in ath9k_hw_ar9287_set_txpower()
790 ratesArray[i] = MAX_RATE_POWER; in ath9k_hw_ar9287_set_txpower()
898 MAX_RATE_POWER | AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE); in ath9k_hw_ar9287_set_txpower()
901 REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER); in ath9k_hw_ar9287_set_txpower()
Deeprom_4k.c540 twiceMaxEdgePower = MAX_RATE_POWER; in ath9k_hw_set_4k_power_per_rate_table()
675 if (ratesArray[i] > MAX_RATE_POWER) in ath9k_hw_4k_set_txpower()
676 ratesArray[i] = MAX_RATE_POWER; in ath9k_hw_4k_set_txpower()
761 MAX_RATE_POWER | AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE); in ath9k_hw_4k_set_txpower()
764 REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER); in ath9k_hw_4k_set_txpower()
Deeprom_def.c768 gb_limit = (u16)(MAX_RATE_POWER - pdGainOverlap_t2); in ath9k_change_gain_boundary_setting()
1078 twiceMaxEdgePower = MAX_RATE_POWER; in ath9k_hw_set_def_power_per_rate_table()
1219 if (ratesArray[i] > MAX_RATE_POWER) in ath9k_hw_def_set_txpower()
1220 ratesArray[i] = MAX_RATE_POWER; in ath9k_hw_def_set_txpower()
1337 MAX_RATE_POWER | AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE); in ath9k_hw_def_set_txpower()
1340 REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER); in ath9k_hw_def_set_txpower()
Deeprom.c281 u16 twiceMaxEdgePower = MAX_RATE_POWER; in ath9k_hw_get_max_edge_power()
496 min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]); in ath9k_hw_get_gain_boundaries_pdadcs()
Dar9003_wow.c80 ctl[0] = (KAL_FRAME_LEN | (MAX_RATE_POWER << 16)); in ath9k_wow_create_keep_alive_pattern()
Dinit.c566 sc->tx99_power = MAX_RATE_POWER + 1; in ath9k_init_softc()
706 ath9k_hw_set_txpowerlimit(ah, MAX_RATE_POWER, true); in ath9k_init_band_txpower()
Dhw.c446 regulatory->power_limit = MAX_RATE_POWER; in ath9k_hw_init_defaults()
2834 chan_pwr = min_t(int, channel->max_power * 2, MAX_RATE_POWER); in ath9k_hw_apply_txpower()
2853 reg->power_limit = min_t(u32, limit, MAX_RATE_POWER); in ath9k_hw_set_txpowerlimit()
2855 channel->max_power = MAX_RATE_POWER / 2; in ath9k_hw_set_txpowerlimit()
Dbeacon.c92 info.txpower[i] = MAX_RATE_POWER; in ath9k_beacon_setup()
Dar9003_phy.c1842 if (txpower <= MAX_RATE_POWER) { in ar9003_hw_tx99_set_txpower()
1847 p_pwr_array[i] = MAX_RATE_POWER; in ar9003_hw_tx99_set_txpower()
Dhw.h176 #define MAX_RATE_POWER 63 macro
Dar9003_eeprom.c5061 return MAX_RATE_POWER; in ar9003_hw_get_indirect_edge_power()
5070 u16 twiceMaxEdgePower = MAX_RATE_POWER; in ar9003_hw_get_max_edge_power()
5196 twiceMaxEdgePower = MAX_RATE_POWER; in ar9003_hw_set_power_per_rate_table()
Dxmit.c1109 return MAX_RATE_POWER; in ath_get_rate_txpower()