Home
last modified time | relevance | path

Searched refs:IXGBE_READ_REG (Results 1 – 23 of 23) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/intel/ixgbe/
Dixgbe_ethtool.c463 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_get_regs()
464 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS); in ixgbe_get_regs()
465 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); in ixgbe_get_regs()
466 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_get_regs()
467 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP); in ixgbe_get_regs()
468 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL); in ixgbe_get_regs()
469 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER); in ixgbe_get_regs()
470 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER); in ixgbe_get_regs()
473 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC); in ixgbe_get_regs()
474 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD); in ixgbe_get_regs()
[all …]
Dixgbe_common.c149 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); in ixgbe_setup_fc()
225 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); in ixgbe_setup_fc()
286 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); in ixgbe_start_hw_generic()
328 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i)); in ixgbe_start_hw_gen2()
336 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); in ixgbe_start_hw_gen2()
381 IXGBE_READ_REG(hw, IXGBE_CRCERRS); in ixgbe_clear_hw_cntrs_generic()
382 IXGBE_READ_REG(hw, IXGBE_ILLERRC); in ixgbe_clear_hw_cntrs_generic()
383 IXGBE_READ_REG(hw, IXGBE_ERRBC); in ixgbe_clear_hw_cntrs_generic()
384 IXGBE_READ_REG(hw, IXGBE_MSPDC); in ixgbe_clear_hw_cntrs_generic()
386 IXGBE_READ_REG(hw, IXGBE_MPC(i)); in ixgbe_clear_hw_cntrs_generic()
[all …]
Dixgbe_dcb_82598.c51 reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA; in ixgbe_dcb_config_rx_arbiter_82598()
54 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_dcb_config_rx_arbiter_82598()
77 reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); in ixgbe_dcb_config_rx_arbiter_82598()
83 reg = IXGBE_READ_REG(hw, IXGBE_RXCTRL); in ixgbe_dcb_config_rx_arbiter_82598()
107 reg = IXGBE_READ_REG(hw, IXGBE_DPMCS); in ixgbe_dcb_config_tx_desc_arbiter_82598()
153 reg = IXGBE_READ_REG(hw, IXGBE_PDPMCS); in ixgbe_dcb_config_tx_data_arbiter_82598()
177 reg = IXGBE_READ_REG(hw, IXGBE_DTXCTL); in ixgbe_dcb_config_tx_data_arbiter_82598()
197 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_dcb_config_pfc_82598()
203 reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); in ixgbe_dcb_config_pfc_82598()
252 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i)); in ixgbe_dcb_config_tc_stats_82598()
[all …]
Dixgbe_82599.c74 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); in ixgbe_mng_enabled()
78 manc = IXGBE_READ_REG(hw, IXGBE_MANC); in ixgbe_mng_enabled()
82 factps = IXGBE_READ_REG(hw, IXGBE_FACTPS); in ixgbe_mng_enabled()
215 *reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC); in prot_autoc_read_82599()
301 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_init_phy_ops_82599()
376 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_get_link_capabilities_82599()
513 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); in ixgbe_stop_mac_link_on_d3_82599()
518 autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2); in ixgbe_stop_mac_link_on_d3_82599()
558 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_start_mac_link_82599()
567 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_start_mac_link_82599()
[all …]
Dixgbe_ptp.c133 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_ptp_setup_sdp()
159 clock_edge |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIML); in ixgbe_ptp_setup_sdp()
160 clock_edge |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIMH) << 32; in ixgbe_ptp_setup_sdp()
199 stamp |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIML); in ixgbe_ptp_read()
200 stamp |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIMH) << 32; in ixgbe_ptp_read()
427 u32 tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); in ixgbe_ptp_rx_hang()
445 IXGBE_READ_REG(hw, IXGBE_RXSTMPH); in ixgbe_ptp_rx_hang()
467 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_TXSTMPL); in ixgbe_ptp_tx_hwtstamp()
468 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_TXSTMPH) << 32; in ixgbe_ptp_tx_hwtstamp()
508 tsynctxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL); in ixgbe_ptp_tx_hwtstamp_work()
[all …]
Dixgbe_x540.c105 ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_X540()
112 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_X540()
205 eec = IXGBE_READ_REG(hw, IXGBE_EEC); in ixgbe_init_eeprom_params_X540()
507 flup = IXGBE_READ_REG(hw, IXGBE_EEC) | IXGBE_EEC_FLUP; in ixgbe_update_flash_X540()
517 flup = IXGBE_READ_REG(hw, IXGBE_EEC); in ixgbe_update_flash_X540()
547 reg = IXGBE_READ_REG(hw, IXGBE_EEC); in ixgbe_poll_flash_update_done_X540()
583 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC); in ixgbe_acquire_swfw_sync_X540()
608 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC); in ixgbe_acquire_swfw_sync_X540()
638 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC); in ixgbe_release_swfw_sync_X540()
663 swsm = IXGBE_READ_REG(hw, IXGBE_SWSM); in ixgbe_get_swfw_sync_semaphore()
[all …]
Dixgbe_82598.c61 u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); in ixgbe_set_pcie_completion_timeout()
192 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); in ixgbe_start_hw_82598()
199 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); in ixgbe_start_hw_82598()
236 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_get_link_capabilities_82598()
373 fctrl_reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); in ixgbe_fc_enable_82598()
376 rmcs_reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_fc_enable_82598()
471 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_start_mac_link_82598()
483 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_start_mac_link_82598()
591 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_check_mac_link_82598()
601 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_check_mac_link_82598()
[all …]
Dixgbe_main.c475 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); in ixgbe_regdump()
479 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); in ixgbe_regdump()
483 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); in ixgbe_regdump()
487 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); in ixgbe_regdump()
491 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); in ixgbe_regdump()
495 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); in ixgbe_regdump()
499 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); in ixgbe_regdump()
503 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); in ixgbe_regdump()
507 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); in ixgbe_regdump()
511 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); in ixgbe_regdump()
[all …]
Dixgbe_sriov.c217 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); in ixgbe_disable_sriov()
222 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); in ixgbe_disable_sriov()
333 u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); in ixgbe_set_vf_multicasts()
356 mta_reg = IXGBE_READ_REG(hw, IXGBE_MTA(vector_reg)); in ixgbe_set_vf_multicasts()
377 u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(i)); in ixgbe_restore_vf_multicasts()
383 mta_reg = IXGBE_READ_REG(hw, IXGBE_MTA(vector_reg)); in ixgbe_restore_vf_multicasts()
462 vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset)); in ixgbe_set_vf_lpe()
482 max_frs = IXGBE_READ_REG(hw, IXGBE_MAXFRS); in ixgbe_set_vf_lpe()
498 u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); in ixgbe_set_vmolr()
675 reg = IXGBE_READ_REG(hw, IXGBE_VFTE(reg_offset)); in ixgbe_vf_reset_msg()
[all …]
Dixgbe_x550.c36 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_identify_phy_x550em()
93 eec = IXGBE_READ_REG(hw, IXGBE_EEC); in ixgbe_init_eeprom_params_X550()
131 command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL); in ixgbe_read_iosf_sb_reg_x550()
148 *data = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA); in ixgbe_read_iosf_sb_reg_x550()
240 u32 value = IXGBE_READ_REG(hw, reg); in ixgbe_read_ee_hostif_buffer_X550()
570 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); in ixgbe_disable_rx_x550()
572 pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC); in ixgbe_disable_rx_x550()
592 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); in ixgbe_disable_rx_x550()
810 command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL); in ixgbe_write_iosf_sb_reg_x550()
1105 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_init_phy_ops_X550em()
[all …]
Dixgbe_phy.c246 hw->phy.lan_id = IXGBE_READ_REG(hw, IXGBE_STATUS) & in ixgbe_identify_phy_generic()
304 mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC); in ixgbe_check_reset_blocked()
450 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
478 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
491 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_read_phy_reg_mdi()
554 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
582 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
609 if (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1) in ixgbe_write_phy_reg_generic()
1796 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_start()
1825 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_stop()
[all …]
Dixgbe_mbx.c238 u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index)); in ixgbe_check_for_bit_pf()
305 vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); in ixgbe_check_for_rst_pf()
310 vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset)); in ixgbe_check_for_rst_pf()
340 p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number)); in ixgbe_obtain_mbx_lock_pf()
Dixgbe_debugfs.c108 value = IXGBE_READ_REG(&adapter->hw, reg); in ixgbe_dbg_reg_ops_write()
118 value = IXGBE_READ_REG(&adapter->hw, reg); in ixgbe_dbg_reg_ops_write()
Dixgbe_dcb_82599.c222 reg = IXGBE_READ_REG(hw, IXGBE_MFLCN); in ixgbe_dcb_config_pfc_82599()
262 reg = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 32; in ixgbe_dcb_config_pfc_82599()
Dixgbe_fcoe.c112 fcbuff = IXGBE_READ_REG(hw, IXGBE_FCDDC(2, xid)); in ixgbe_fcoe_ddp_put()
126 fcbuff = IXGBE_READ_REG(hw, IXGBE_FCBUFF); in ixgbe_fcoe_ddp_put()
307 fcrxctl = IXGBE_READ_REG(hw, IXGBE_FCRXCTRL); in ixgbe_fcoe_ddp_setup()
Dixgbe_dcb.c383 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); in ixgbe_dcb_read_rtrup2tc_82599()
Dixgbe_common.h178 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg((a), (reg)) macro
/linux-4.1.27/drivers/net/ethernet/intel/ixgbevf/
Dethtool.c183 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_VFCTRL); in ixgbevf_get_regs()
184 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_VFSTATUS); in ixgbevf_get_regs()
185 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_VFLINKS); in ixgbevf_get_regs()
186 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_VFRXMEMWRAP); in ixgbevf_get_regs()
187 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_VFFRTIMER); in ixgbevf_get_regs()
193 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_VTEICS); in ixgbevf_get_regs()
194 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_VTEICS); in ixgbevf_get_regs()
195 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_VTEIMS); in ixgbevf_get_regs()
196 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_VTEIMC); in ixgbevf_get_regs()
197 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_VTEIAC); in ixgbevf_get_regs()
[all …]
Dvf.c149 reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)); in ixgbevf_stop_hw_vf()
162 IXGBE_READ_REG(hw, IXGBE_VTEICR); in ixgbevf_stop_hw_vf()
167 reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i)); in ixgbevf_stop_hw_vf()
554 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); in ixgbevf_check_mac_link_vf()
566 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); in ixgbevf_check_mac_link_vf()
Dixgbevf_main.c181 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC); in ixgbevf_set_ivar()
189 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1)); in ixgbevf_set_ivar()
228 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx)); in ixgbevf_get_tx_pending()
229 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx)); in ixgbevf_get_tx_pending()
405 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)), in ixgbevf_clean_tx_irq()
406 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)), in ixgbevf_clean_tx_irq()
1596 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx)); in ixgbevf_configure_tx_ring()
1659 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); in ixgbevf_disable_rx_queue()
1668 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); in ixgbevf_disable_rx_queue()
1688 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); in ixgbevf_rx_desc_queue_enable()
[all …]
Dregs.h82 #define IXGBE_WRITE_FLUSH(a) (IXGBE_READ_REG(a, IXGBE_VFSTATUS))
Dmbx.c139 u32 v2p_mailbox = IXGBE_READ_REG(hw, IXGBE_VFMAILBOX); in ixgbevf_read_v2p_mailbox()
Dvf.h191 #define IXGBE_READ_REG(h, r) ixgbevf_read_reg(h, r) macro