Searched refs:IS_HASWELL (Results 1 – 23 of 23) sorted by relevance
274 if (IS_HASWELL(dev) && dig_port->port != PORT_A) { in intel_psr_match_conditions()284 if (IS_HASWELL(dev) && in intel_psr_match_conditions()291 if (IS_HASWELL(dev) && in intel_psr_match_conditions()633 if (IS_HASWELL(dev) && in intel_psr_flush()
479 WARN_ON(!IS_HASWELL(dev) && !IS_BROADWELL(dev)); in intel_detect_pch()484 WARN_ON(!IS_HASWELL(dev) && !IS_BROADWELL(dev)); in intel_detect_pch()786 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in i915_drm_resume_early()1423 if (IS_HASWELL(dev)) { in intel_runtime_suspend()1467 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_runtime_resume()1499 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in intel_suspend_complete()
451 if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8) in intel_fbc_find_crtc()556 if (INTEL_INFO(dev)->gen >= 8 || IS_HASWELL(dev)) { in intel_fbc_update()715 if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8) in intel_fbc_init()
69 if (!IS_HASWELL(dev)) in i915_check_vgpu()
664 if (IS_HASWELL(ring->dev)) { in i915_cmd_parser_init_ring()676 if (IS_HASWELL(ring->dev)) { in i915_cmd_parser_init_ring()692 if (IS_HASWELL(ring->dev)) { in i915_cmd_parser_init_ring()703 if (IS_HASWELL(ring->dev)) { in i915_cmd_parser_init_ring()
2307 #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell) macro2311 #define IS_HSW_EARLY_SDV(dev) (IS_HASWELL(dev) && \2319 #define IS_HSW_ULT(dev) (IS_HASWELL(dev) && \2321 #define IS_HSW_GT3(dev) (IS_HASWELL(dev) && \2359 #define HAS_WT(dev) ((IS_HASWELL(dev) || IS_BROADWELL(dev)) && \2401 #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \2404 #define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \2429 #define HAS_L3_DPF(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
559 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ivb_update_plane()564 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ivb_update_plane()590 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) { in ivb_update_plane()616 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ivb_update_plane()
337 if ((IS_HASWELL(dev) || IS_BROADWELL(dev) || in intel_uncore_ellc_detect()1074 } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in intel_uncore_fw_domains_init()1077 if (IS_HASWELL(dev)) in intel_uncore_fw_domains_init()1169 if (IS_HASWELL(dev)) { in intel_uncore_init()
121 if (IS_HASWELL(dev)) in get_context_size()516 if (!IS_HASWELL(ring->dev) && INTEL_INFO(ring->dev)->gen < 8) in mi_set_context()
1878 } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in intel_read_wm_latency()1928 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ilk_wm_max_level()2123 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in intel_compute_pipe_wm()2255 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ilk_wm_lp_latency()2479 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in ilk_write_wm_values()3574 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ilk_pipe_wm_get_hw_state()3627 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ilk_wm_get_hw_state()3970 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in gen6_set_rps()4232 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in gen6_init_rps_frequencies()4251 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in gen6_init_rps_frequencies()[all …]
2825 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in ironlake_update_primary_plane()2858 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) in ironlake_update_primary_plane()2870 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) { in ironlake_update_primary_plane()2887 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in ironlake_update_primary_plane()4280 if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) in ironlake_pfit_enable()4423 if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled && in intel_crtc_load_lut()5719 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in ironlake_check_fdi_lanes()6645 if (IS_HASWELL(dev) && cpu_transcoder == TRANSCODER_EDP && in intel_set_pipe_timings()7635 if (IS_HASWELL(dev) && intel_crtc->config->dither) in haswell_set_pipeconf()8138 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in ironlake_get_initial_plane_config()[all …]
459 } else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) { in intel_init_audio()
1060 if (IS_HASWELL(dev)) { in gen7_ppgtt_enable()1377 } else if (IS_HASWELL(dev)) { in gen6_ppgtt_init()2483 if (IS_HASWELL(dev) && dev_priv->ellc_size) in i915_gem_gtt_init()2485 else if (IS_HASWELL(dev)) in i915_gem_gtt_init()
1044 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) in intel_dp_aux_init()1159 if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) || in intel_dp_source_supports_hbr2()1477 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in intel_dp_compute_config()2919 } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { in intel_dp_pre_emphasis_max()3418 if (IS_HASWELL(dev) || IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) { in intel_dp_set_signal_levels()5469 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in intel_dp_init_connector()5556 if (IS_HASWELL(dev) || IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) { in intel_dp_init_connector()
324 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in gt_act_freq_mhz_show()
236 } else if (IS_HASWELL(dev)) { in intel_prepare_ddi_buffers()1328 if (IS_HASWELL(dev) && in intel_ddi_enable_transcoder_func()
1116 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in i915_frequency_info()1136 else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) in i915_frequency_info()2381 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) { in i915_pc8_status()3579 if (IS_HASWELL(dev) && pipe == PIPE_A) in ivb_pipe_crc_ctl_reg()3691 else if (IS_HASWELL(dev) && pipe == PIPE_A) in pipe_crc_set_source()
1338 if (IS_HASWELL(dev_priv->dev)) { in intel_power_domains_init()
927 else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) in hdmi_portclock_limit()
1597 (IS_HASWELL(dev) ? GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1 : 0))2695 #define EDP_PSR_BASE(dev) (IS_HASWELL(dev) ? 0x64800 : 0x6f800)
2591 if (IS_HASWELL(dev)) in intel_init_render_ring_buffer()
308 if (INTEL_INFO(dev_priv)->gen <= 7 && !IS_HASWELL(dev_priv)) in gen6_sanitize_rps_pm_mask()
4795 if (IS_HASWELL(dev)) in i915_gem_init_hw()