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Searched refs:BIT3 (Results 1 – 47 of 47) sorted by relevance

/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8821ae/
Dpwrseq.h57 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
127 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3 \
132 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
198 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3 \
224 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, 0 \
408 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0 \
426 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3), 0 \
497 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3) \
501 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3 \
510 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4 \
[all …]
/linux-4.1.27/drivers/staging/rtl8188eu/include/
Dpwrseq.h80 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, 0}, \
122 PWR_CMD_WRITE, BIT3|BIT4, BIT3}, \
125 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, \
159 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, \
173 PWR_CMD_WRITE, BIT3|BIT4, BIT3}, \
206 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, \
Drtl8188e_spec.h29 #define BIT3 0x00000008 macro
543 #define CMD_IOCONFIG BIT3
554 #define RRSR_11M BIT3
613 #define WOW_UWF BIT3 /* Unicast Wakeup frame. */
639 #define IMR_VIDOK_88E BIT3 /* AC_VI DMA OK */
702 #define StopBK BIT3
729 #define RCR_AB BIT3 /* Accept broadcast packet */
1203 #define SDIO_HIMR_RXERR_MSK BIT3
1229 #define SDIO_HISR_RXERR BIT3
1300 #define WL_HWROF_EN BIT3
[all …]
Drtw_sreset.h36 #define WIFI_MAC_TXDMA_ERROR BIT3
Dodm_debug.h63 #define ODM_COMP_FA_CNT BIT3
Dodm.h420 ODM_BB_FA_CNT = BIT3,
466 ODM_RF_TX_D = BIT3,
504 ODM_POWERSAVE = BIT3,
518 ODM_WM_N24G = BIT3,
DHal8188EPhyCfg.h94 WIRELESS_MODE_N_24G = BIT3,
Dosdep_service.h91 #define BIT3 0x00000008 macro
Dhal_intf.h31 RTW_GSPI = BIT3,
/linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h144 #define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 | \
160 #define RCR_AB BIT3
218 #define SCR_RxDecEnable BIT3
239 #define IMR_BEDOK BIT3
248 #define TPPoll_VOQ BIT3
288 #define AcmHw_VoqEn BIT3
378 #define RRSR_11M BIT3
/linux-4.1.27/drivers/scsi/
Ddc395x.h72 #define BIT3 0x00000008 macro
81 #define UNIT_RETRY BIT3
131 #define UNDER_RUN BIT3
176 #define WIDE_NEGO_DONE BIT3
632 #define ACTIVE_NEGATION BIT3
/linux-4.1.27/drivers/staging/rtl8188eu/hal/
Drtl8188eu_led.c58 usb_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); in SwLedOff()
63 usb_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); in SwLedOff()
Drtl8188e_hal_init.c400 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ in Hal_ReadPowerValueFromPROM_8188E()
408 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ in Hal_ReadPowerValueFromPROM_8188E()
418 if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ in Hal_ReadPowerValueFromPROM_8188E()
426 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ in Hal_ReadPowerValueFromPROM_8188E()
435 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ in Hal_ReadPowerValueFromPROM_8188E()
443 if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ in Hal_ReadPowerValueFromPROM_8188E()
Dodm_RTL8188E.c64 BIT5|BIT4|BIT3, 0); in dm_trx_hw_antenna_div_init()
169 phy_set_bb_reg(adapter, 0x864, BIT5|BIT4|BIT3, 0); in dm_fast_training_init()
208 BIT5|BIT4|BIT3, default_ant); in rtl88eu_dm_update_rx_idle_ant()
217 BIT5|BIT4|BIT3, default_ant); in rtl88eu_dm_update_rx_idle_ant()
Dusb_halinit.c610 usb_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); in _BeaconFunctionEnable()
670 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT3)); in RfOnOffDetect()
673 rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; in RfOnOffDetect()
959 usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3))); in CardDisableRTL8188EU()
961 usb_write8(Adapter, REG_RSV_CTRL+1, val8|BIT3); in CardDisableRTL8188EU()
Dodm.c856 pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord)&BIT3)>>3; in ODM_RF_Saving()
885 phy_set_bb_reg(adapter, 0xc70, BIT3, 0); /* RegC70[3]=1'b0 */ in ODM_RF_Saving()
893 phy_set_bb_reg(adapter, 0xc70, BIT3, pDM_PSTable->RegC70); in ODM_RF_Saving()
Dphy.c963 usb_write8(adapt, mac_reg[i], (u8)(backup[i]&(~BIT3))); in mac_setting_calibration()
/linux-4.1.27/drivers/staging/rtl8192u/
Dr8192U_hw.h157 #define RCR_AB BIT3 // Accept broadcast packet
186 #define SCR_RxDecEnable BIT3 //Enable Rx Decryption
232 #define AcmHw_VoqEn BIT3
310 #define RRSR_11M BIT3
Dr8192U.h49 #define BIT3 0x00000008 macro
95 #define COMP_RECV BIT3 /* Receive data path. */
/linux-4.1.27/drivers/video/fbdev/via/
Ddvi.c359 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp0()
384 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
391 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
470 viafb_write_reg_mask(CRD2, VIACR, 0, BIT3); in viafb_dvi_enable()
Dlcd.c434 viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3); in load_lcd_scaling()
446 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3); in load_lcd_scaling()
534 BIT0 + BIT1 + BIT2 + BIT3); in lcd_patch_skew()
631 viafb_write_reg_mask(CR6A, VIACR, 0, BIT3); in integrated_lvds_disable()
679 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); in integrated_lvds_enable()
773 viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3); in viafb_lcd_enable()
774 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); in viafb_lcd_enable()
Dshare.h31 #define BIT3 0x08 macro
Dhw.c972 viafb_write_reg_mask(CR33, VIACR, 0x08, BIT3); in load_fix_bit_crtc_reg()
/linux-4.1.27/drivers/staging/rtl8192e/
Drtl819x_Qos.h25 #define BIT3 0x00000008 macro
243 #define GET_BE_UAPSD(_apsd) ((_apsd) & BIT3)
244 #define SET_BE_UAPSD(_apsd) ((_apsd) |= BIT3)
Drtllib.h128 #define RT_RF_OFF_LEVL_HALT_NIC BIT3
/linux-4.1.27/drivers/net/wireless/rtlwifi/btcoexist/
Dhalbt_precomp.h51 #define BIT3 0x00000008 macro
Dhalbtc8821a2ant.h34 #define BT_INFO_8821A_2ANT_B_ACL_BUSY BIT3
Dhalbtc8723b2ant.h37 #define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT3
Dhalbtcoutsrc.h104 #define ALGO_TRACE BIT3
116 #define WIFI_P2P_GO_CONNECTED BIT3
Dhalbtc8723b1ant.h34 #define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT3
Dhalbtc8192e2ant.h34 #define BT_INFO_8192E_2ANT_B_ACL_BUSY BIT3
Dhalbtc8821a1ant.h36 #define BT_INFO_8821A_1ANT_B_ACL_BUSY BIT3
Dhalbtc8821a1ant.c2784 if ((coex_sta->bt_info_ext & BIT3) && !wifi_under_5g) { in ex_halbtc8821a1ant_bt_info_notify()
Dhalbtc8723b1ant.c2974 if (coex_sta->bt_info_ext & BIT3) { in ex_halbtc8723b1ant_bt_info_notify()
Dhalbtc8821a2ant.c3757 if ((coex_sta->bt_info_ext & BIT3)) { in ex_halbtc8821a2ant_bt_info_notify()
Dhalbtc8723b2ant.c3567 if ((coex_sta->bt_info_ext & BIT3)) { in ex_btc8723b2ant_bt_info_notify()
Dhalbtc8192e2ant.c3694 if ((coex_sta->bt_info_ext & BIT3)) { in ex_halbtc8192e2ant_bt_info_notify()
/linux-4.1.27/drivers/staging/rtl8192u/ieee80211/
Drtl819x_Qos.h7 #define BIT3 0x00000008 macro
387 #define GET_BE_UAPSD(_apsd) ((_apsd) & BIT3)
388 #define SET_BE_UAPSD(_apsd) ((_apsd) |= BIT3)
/linux-4.1.27/drivers/staging/rtl8188eu/core/
Drtw_efuse.c429 if (!(word_en&BIT3)) { in Efuse_WordEnableDataWrite()
437 badworden &= (~BIT3); in Efuse_WordEnableDataWrite()
750 if (((pTargetPkt->word_en & BIT3) == 0) && in wordEnMatched()
751 ((pCurPkt->word_en & BIT3) == 0)) in wordEnMatched()
752 match_word_en &= ~BIT3; /* enable word 3 */ in wordEnMatched()
/linux-4.1.27/drivers/char/pcmcia/
Dsynclink_cs.c314 #define PVR_AUTOCTS BIT3
682 #define CMD_TXFIFO BIT3 // release current tx FIFO
1192 if (gis & (BIT3 | BIT2)) in mgslpc_isr()
3120 val |= BIT3; in hdlc_mode()
3129 val |= BIT4 | BIT3; in hdlc_mode()
3260 set_reg_bits(info, CHA + PVR, BIT3); in hdlc_mode()
3262 clear_reg_bits(info, CHA + PVR, BIT3); in hdlc_mode()
3297 clear_reg_bits(info, CHA + MODE, BIT3); in rx_stop()
3314 set_reg_bits(info, CHA + MODE, BIT3); in rx_start()
3530 val |= BIT3; in async_mode()
[all …]
/linux-4.1.27/include/uapi/linux/
Dsynclink.h21 #define BIT3 0x0008 macro
/linux-4.1.27/drivers/tty/
Dsynclink.c493 #define TRANSMIT_STATUS BIT3
510 #define RXSTATUS_CRC_ERROR BIT3
511 #define RXSTATUS_FRAMING_ERROR BIT3
550 #define TXSTATUS_CRC_SENT BIT3
570 #define MISCSTATUS_RCC_UNDERRUN BIT3
596 #define SICR_RCC_UNDERFLOW BIT3
630 #define TXSTATUS_CRC_SENT BIT3
1452 usc_OutReg( info, RICR+LSBONLY, (u16)(usc_InReg(info, RICR+LSBONLY) & ~BIT3 )); in mgsl_isr_receive_data()
1610 if ( status & BIT3 ) { in mgsl_isr_receive_dma()
5059 usc_OutReg(info, SICR, (u16)(usc_InReg(info,SICR) | BIT3)); in usc_set_sdlc_mode()
[all …]
Dsynclinkmp.c425 #define CCTS BIT3
441 #define OVRN BIT3
1540 RegValue |= BIT3; in set_break()
1542 RegValue &= ~BIT3; in set_break()
2591 if (status & BIT3 << shift) in synclinkmp_interrupt()
2600 if (dmastatus & BIT3 << shift) in synclinkmp_interrupt()
4417 case 6: RegValue |= BIT5 + BIT3; break; in async_mode()
4418 case 5: RegValue |= BIT5 + BIT4 + BIT3 + BIT2; break; in async_mode()
4592 RegValue |= BIT3; in hdlc_mode()
4754 if (!(status & BIT3)) in get_signals()
[all …]
Dsynclink_gt.c2013 if (status & BIT3) { in dsr_change()
2258 if (status & (BIT5 + BIT4 + BIT3)) { in isr_tdma()
2747 wr_reg16(info, RCR, rd_reg16(info, RCR) | BIT3); in rx_enable()
4177 val |= BIT3; in async_mode()
4259 val |= BIT3; in async_mode()
4434 val |= BIT3; /* 010, rxclk = BRG */ in sync_mode()
4547 if (status & BIT3) in get_signals()
4589 val |= BIT3; in msc_set_vcr()
4606 val |= BIT3; in set_signals()
4608 val &= ~BIT3; in set_signals()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8192de/
Dreg.h387 #define RRSR_11M BIT3
522 #define WOW_UWF BIT3 /* Unicast Wakeup frame. */
/linux-4.1.27/drivers/scsi/lpfc/
Dlpfc_hw4.h677 #define LPFC_SLI4_INTR3 BIT3
/linux-4.1.27/drivers/eisa/
Deisa.ids981 ISABB00 "BIT3 403/404/405 Bus Communications Adaptors"