Home
last modified time | relevance | path

Searched defs:_reg (Results 1 – 50 of 50) sorted by relevance

/linux-4.4.14/drivers/reset/sti/
Dreset-stih416.c49 #define STIH416_SRST_CPU(_reg, _bit) \ argument
52 #define STIH416_SRST_FRONT(_reg, _bit) \ argument
55 #define STIH416_SRST_REAR(_reg, _bit) \ argument
58 #define STIH416_SRST_LPM(_reg, _bit) \ argument
61 #define STIH416_SRST_SBC(_reg, _bit) \ argument
Dreset-stih415.c34 #define STIH415_SRST_REAR(_reg, _bit) \ argument
37 #define STIH415_SRST_SBC(_reg, _bit) \ argument
40 #define STIH415_SRST_FRONT(_reg, _bit) \ argument
43 #define STIH415_SRST_LPM(_reg, _bit) \ argument
Dreset-stih407.c60 #define STIH407_SRST_CORE(_reg, _bit) \ argument
63 #define STIH407_SRST_SBC(_reg, _bit) \ argument
66 #define STIH407_SRST_LPM(_reg, _bit) \ argument
/linux-4.4.14/drivers/regulator/
Dmc13xxx.h59 #define MC13xxx_DEFINE(prefix, _name, _reg, _vsel_reg, _voltages, _ops) \ argument
77 #define MC13xxx_FIXED_DEFINE(prefix, _name, _reg, _voltages, _ops) \ argument
92 #define MC13xxx_GPO_DEFINE(prefix, _name, _reg, _voltages, _ops) \ argument
107 #define MC13xxx_DEFINE_SW(_name, _reg, _vsel_reg, _voltages, ops) \ argument
109 #define MC13xxx_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages, ops) \ argument
Dmc13783-regulator.c247 #define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \ argument
249 #define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \ argument
Dpcap-regulator.c107 #define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr) \ argument
Dmax8998.c198 int *_reg, int *_shift, int *_mask) in max8998_get_voltage_register()
Dda9063-regulator.c33 #define BFIELD(_reg, _mask) \ argument
Dtps6524x-regulator.c372 #define __MK_FIELD(_reg, _mask, _shift) \ argument
Dmax8997.c302 int *_reg, int *_shift, int *_mask) in max8997_get_voltage_register()
/linux-4.4.14/arch/arm/mach-mmp/
Dclock.h31 #define APBC_CLK(_name, _reg, _fnclksel, _rate) \ argument
39 #define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ argument
47 #define APMU_CLK(_name, _reg, _eval, _rate) \ argument
55 #define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ argument
/linux-4.4.14/drivers/clk/pistachio/
Dclk.h22 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
42 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument
62 #define DIV(_id, _name, _pname, _reg, _width) \ argument
72 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument
122 #define PLL(_id, _name, _pname, _type, _reg, _rates) \ argument
133 #define PLL_FIXED(_id, _name, _pname, _type, _reg) \ argument
/linux-4.4.14/drivers/net/ethernet/amd/xgbe/
Dxgbe-common.h1121 #define XGMAC_IOREAD(_pdata, _reg) \ argument
1124 #define XGMAC_IOREAD_BITS(_pdata, _reg, _field) \ argument
1129 #define XGMAC_IOWRITE(_pdata, _reg, _val) \ argument
1132 #define XGMAC_IOWRITE_BITS(_pdata, _reg, _field, _val) \ argument
1145 #define XGMAC_MTL_IOREAD(_pdata, _n, _reg) \ argument
1149 #define XGMAC_MTL_IOREAD_BITS(_pdata, _n, _reg, _field) \ argument
1154 #define XGMAC_MTL_IOWRITE(_pdata, _n, _reg, _val) \ argument
1158 #define XGMAC_MTL_IOWRITE_BITS(_pdata, _n, _reg, _field, _val) \ argument
1171 #define XGMAC_DMA_IOREAD(_channel, _reg) \ argument
1174 #define XGMAC_DMA_IOREAD_BITS(_channel, _reg, _field) \ argument
[all …]
/linux-4.4.14/drivers/i2c/busses/
Di2c-brcmstb.c176 #define __bsc_readl(_reg) ioread32be(_reg) argument
177 #define __bsc_writel(_val, _reg) iowrite32be(_val, _reg) argument
179 #define __bsc_readl(_reg) ioread32(_reg) argument
180 #define __bsc_writel(_val, _reg) iowrite32(_val, _reg) argument
183 #define bsc_readl(_dev, _reg) \ argument
186 #define bsc_writel(_dev, _val, _reg) \ argument
/linux-4.4.14/drivers/net/ethernet/freescale/fs_enet/
Dmac-fec.c67 #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v)) argument
70 #define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg) argument
73 #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v)) argument
76 #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v)) argument
/linux-4.4.14/include/linux/
Dsh_clk.h154 #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \ argument
178 #define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \ argument
191 #define SH_CLK_DIV6(_parent, _reg, _flags) \ argument
208 #define SH_CLK_FSIDIV(_reg, _parent) \ argument
Dregmap.h758 #define REG_FIELD(_reg, _lsb, _msb) { \ argument
/linux-4.4.14/arch/arm64/kvm/
Dregmap.c28 #define REG_OFFSET(_reg) \ argument
/linux-4.4.14/drivers/net/wireless/ath/
Dhw.c24 #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) argument
Dkey.c26 #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) argument
/linux-4.4.14/drivers/mfd/
Dtps80031.c83 #define TPS80031_IRQ(_reg, _mask) \ argument
126 #define PUPD_DATA(_reg, _pulldown_bit, _pullup_bit) \ argument
Drc5t583.c43 #define DEEPSLEEP_INIT(_id, _reg, _pos) \ argument
Dtps6586x.c62 #define TPS6586X_IRQ(_reg, _mask) \ argument
/linux-4.4.14/arch/sh/kernel/cpu/sh4a/
Dclock-sh7366.c120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
140 #define MSTP(_parent, _reg, _bit, _flags) \ argument
Dclock-sh7343.c117 #define DIV4(_reg, _bit, _mask, _flags) \ argument
137 #define MSTP(_parent, _reg, _bit, _flags) \ argument
Dclock-sh7722.c120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
Dclock-sh7723.c123 #define DIV4(_reg, _bit, _mask, _flags) \ argument
Dclock-sh7724.c162 #define DIV4(_reg, _bit, _mask, _flags) \ argument
Dclock-sh7734.c72 #define DIV4(_reg, _bit, _mask, _flags) \ argument
/linux-4.4.14/drivers/media/i2c/smiapp/
Dsmiapp-quirk.h69 #define SMIAPP_MK_QUIRK_REG_8(_reg, _val) \ argument
/linux-4.4.14/drivers/misc/
Dad525x_dpot.c500 #define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \ argument
507 #define DPOT_DEVICE_SET(_name, _reg) static ssize_t \ argument
/linux-4.4.14/drivers/media/tuners/
Dmc44s803_priv.h193 #define MC44S803_REG_SM(_val, _reg) \ argument
197 #define MC44S803_REG_MS(_val, _reg) \ argument
/linux-4.4.14/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c80 #define DIV4(_reg, _bit, _mask, _flags) \ argument
Dclock-sh7269.c108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
/linux-4.4.14/drivers/clk/mediatek/
Dclk-mtk.h86 #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) { \ argument
100 #define MUX(_id, _name, _parents, _reg, _shift, _width) { \ argument
Dclk-mt8173.c1007 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1027 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt8135.c604 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
/linux-4.4.14/arch/arm/kvm/
Demulate.c35 #define REG_OFFSET(_reg) \ argument
/linux-4.4.14/sound/soc/codecs/
Dadau1373.c597 #define DECLARE_ADAU1373_OUTPUT_MIXER_CTRLS(_name, _reg) \ argument
642 #define DECLARE_ADAU1373_DSP_CHANNEL_MIXER_CTRLS(_name, _reg) \ argument
664 #define DECLARE_ADAU1373_DSP_OUTPUT_MIXER_CTRLS(_name, _reg) \ argument
/linux-4.4.14/drivers/soc/sunxi/
Dsunxi_sram.c48 #define SUNXI_SRAM_DATA(_name, _reg, _off, _width, ...) \ argument
/linux-4.4.14/drivers/dma/
Dpxa_dma.c145 #define _phy_readl_relaxed(phy, _reg) \ argument
147 #define phy_readl_relaxed(phy, _reg) \ argument
156 #define phy_writel(phy, val, _reg) \ argument
163 #define phy_writel_relaxed(phy, val, _reg) \ argument
/linux-4.4.14/drivers/net/wireless/ath/ath5k/
Dath5k.h124 #define AR5K_REG_WRITE_BITS(ah, _reg, _flags, _val) \ argument
128 #define AR5K_REG_MASKED_BITS(ah, _reg, _flags, _mask) \ argument
132 #define AR5K_REG_ENABLE_BITS(ah, _reg, _flags) \ argument
135 #define AR5K_REG_DISABLE_BITS(ah, _reg, _flags) \ argument
139 #define AR5K_REG_READ_Q(ah, _reg, _queue) \ argument
142 #define AR5K_REG_WRITE_Q(ah, _reg, _queue) \ argument
145 #define AR5K_Q_ENABLE_BITS(_reg, _queue) do { \ argument
149 #define AR5K_Q_DISABLE_BITS(_reg, _queue) do { \ argument
/linux-4.4.14/arch/ia64/kernel/
Dhead.S63 #define SAVE_ONE_RR(num, _reg, _tmp) \ argument
/linux-4.4.14/drivers/net/wireless/ath/ath9k/
Ddebug.c24 #define REG_WRITE_D(_ah, _reg, _val) \ argument
26 #define REG_READ_D(_ah, _reg) \ argument
Dhw.h79 #define REG_WRITE(_ah, _reg, _val) \ argument
82 #define REG_READ(_ah, _reg) \ argument
88 #define REG_RMW(_ah, _reg, _set, _clr) \ argument
/linux-4.4.14/drivers/gpu/drm/msm/adreno/
Dadreno_gpu.h30 #define REG_ADRENO_DEFINE(_offset, _reg) [_offset] = (_reg) + 1 argument
/linux-4.4.14/drivers/pinctrl/
Dpinctrl-pistachio.c503 #define FUNCTION_SCENARIO(_name, _reg, _shift, _mask) \ argument
666 #define MFIO_MUX_PIN_GROUP(_pin, _f0, _f1, _f2, _reg, _shift, _mask) \ argument
/linux-4.4.14/drivers/net/wireless/mediatek/mt7601u/
Dmt7601u.h301 #define mt76_rmw_field(_dev, _reg, _field, _val) \ argument
/linux-4.4.14/drivers/scsi/csiostor/
Dcsio_wr.c53 #define CSIO_SET_FLBUF_SIZE(_hw, _reg, _val) \ argument
/linux-4.4.14/drivers/net/ethernet/micrel/
Dks8851.c150 #define MK_OP(_byteen, _reg) (BYTE_EN(_byteen) | (_reg) << (8+2) | (_reg) >> 6) argument