1/* 2 * rt5651.c -- RT5651 ALSA SoC audio codec driver 3 * 4 * Copyright 2014 Realtek Semiconductor Corp. 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12#include <linux/module.h> 13#include <linux/moduleparam.h> 14#include <linux/init.h> 15#include <linux/delay.h> 16#include <linux/pm.h> 17#include <linux/i2c.h> 18#include <linux/regmap.h> 19#include <linux/platform_device.h> 20#include <linux/spi/spi.h> 21#include <sound/core.h> 22#include <sound/pcm.h> 23#include <sound/pcm_params.h> 24#include <sound/soc.h> 25#include <sound/soc-dapm.h> 26#include <sound/initval.h> 27#include <sound/tlv.h> 28 29#include "rl6231.h" 30#include "rt5651.h" 31 32#define RT5651_DEVICE_ID_VALUE 0x6281 33 34#define RT5651_PR_RANGE_BASE (0xff + 1) 35#define RT5651_PR_SPACING 0x100 36 37#define RT5651_PR_BASE (RT5651_PR_RANGE_BASE + (0 * RT5651_PR_SPACING)) 38 39static const struct regmap_range_cfg rt5651_ranges[] = { 40 { .name = "PR", .range_min = RT5651_PR_BASE, 41 .range_max = RT5651_PR_BASE + 0xb4, 42 .selector_reg = RT5651_PRIV_INDEX, 43 .selector_mask = 0xff, 44 .selector_shift = 0x0, 45 .window_start = RT5651_PRIV_DATA, 46 .window_len = 0x1, }, 47}; 48 49static const struct reg_sequence init_list[] = { 50 {RT5651_PR_BASE + 0x3d, 0x3e00}, 51}; 52 53static const struct reg_default rt5651_reg[] = { 54 { 0x00, 0x0000 }, 55 { 0x02, 0xc8c8 }, 56 { 0x03, 0xc8c8 }, 57 { 0x05, 0x0000 }, 58 { 0x0d, 0x0000 }, 59 { 0x0e, 0x0000 }, 60 { 0x0f, 0x0808 }, 61 { 0x10, 0x0808 }, 62 { 0x19, 0xafaf }, 63 { 0x1a, 0xafaf }, 64 { 0x1b, 0x0c00 }, 65 { 0x1c, 0x2f2f }, 66 { 0x1d, 0x2f2f }, 67 { 0x1e, 0x0000 }, 68 { 0x27, 0x7860 }, 69 { 0x28, 0x7070 }, 70 { 0x29, 0x8080 }, 71 { 0x2a, 0x5252 }, 72 { 0x2b, 0x5454 }, 73 { 0x2f, 0x0000 }, 74 { 0x30, 0x5000 }, 75 { 0x3b, 0x0000 }, 76 { 0x3c, 0x006f }, 77 { 0x3d, 0x0000 }, 78 { 0x3e, 0x006f }, 79 { 0x45, 0x6000 }, 80 { 0x4d, 0x0000 }, 81 { 0x4e, 0x0000 }, 82 { 0x4f, 0x0279 }, 83 { 0x50, 0x0000 }, 84 { 0x51, 0x0000 }, 85 { 0x52, 0x0279 }, 86 { 0x53, 0xf000 }, 87 { 0x61, 0x0000 }, 88 { 0x62, 0x0000 }, 89 { 0x63, 0x00c0 }, 90 { 0x64, 0x0000 }, 91 { 0x65, 0x0000 }, 92 { 0x66, 0x0000 }, 93 { 0x70, 0x8000 }, 94 { 0x71, 0x8000 }, 95 { 0x73, 0x1104 }, 96 { 0x74, 0x0c00 }, 97 { 0x75, 0x1400 }, 98 { 0x77, 0x0c00 }, 99 { 0x78, 0x4000 }, 100 { 0x79, 0x0123 }, 101 { 0x80, 0x0000 }, 102 { 0x81, 0x0000 }, 103 { 0x82, 0x0000 }, 104 { 0x83, 0x0800 }, 105 { 0x84, 0x0000 }, 106 { 0x85, 0x0008 }, 107 { 0x89, 0x0000 }, 108 { 0x8e, 0x0004 }, 109 { 0x8f, 0x1100 }, 110 { 0x90, 0x0000 }, 111 { 0x93, 0x2000 }, 112 { 0x94, 0x0200 }, 113 { 0xb0, 0x2080 }, 114 { 0xb1, 0x0000 }, 115 { 0xb4, 0x2206 }, 116 { 0xb5, 0x1f00 }, 117 { 0xb6, 0x0000 }, 118 { 0xbb, 0x0000 }, 119 { 0xbc, 0x0000 }, 120 { 0xbd, 0x0000 }, 121 { 0xbe, 0x0000 }, 122 { 0xbf, 0x0000 }, 123 { 0xc0, 0x0400 }, 124 { 0xc1, 0x0000 }, 125 { 0xc2, 0x0000 }, 126 { 0xcf, 0x0013 }, 127 { 0xd0, 0x0680 }, 128 { 0xd1, 0x1c17 }, 129 { 0xd3, 0xb320 }, 130 { 0xd9, 0x0809 }, 131 { 0xfa, 0x0010 }, 132 { 0xfe, 0x10ec }, 133 { 0xff, 0x6281 }, 134}; 135 136static bool rt5651_volatile_register(struct device *dev, unsigned int reg) 137{ 138 int i; 139 140 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) { 141 if ((reg >= rt5651_ranges[i].window_start && 142 reg <= rt5651_ranges[i].window_start + 143 rt5651_ranges[i].window_len) || 144 (reg >= rt5651_ranges[i].range_min && 145 reg <= rt5651_ranges[i].range_max)) { 146 return true; 147 } 148 } 149 150 switch (reg) { 151 case RT5651_RESET: 152 case RT5651_PRIV_DATA: 153 case RT5651_EQ_CTRL1: 154 case RT5651_ALC_1: 155 case RT5651_IRQ_CTRL2: 156 case RT5651_INT_IRQ_ST: 157 case RT5651_PGM_REG_ARR1: 158 case RT5651_PGM_REG_ARR3: 159 case RT5651_VENDOR_ID: 160 case RT5651_DEVICE_ID: 161 return true; 162 default: 163 return false; 164 } 165} 166 167static bool rt5651_readable_register(struct device *dev, unsigned int reg) 168{ 169 int i; 170 171 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) { 172 if ((reg >= rt5651_ranges[i].window_start && 173 reg <= rt5651_ranges[i].window_start + 174 rt5651_ranges[i].window_len) || 175 (reg >= rt5651_ranges[i].range_min && 176 reg <= rt5651_ranges[i].range_max)) { 177 return true; 178 } 179 } 180 181 switch (reg) { 182 case RT5651_RESET: 183 case RT5651_VERSION_ID: 184 case RT5651_VENDOR_ID: 185 case RT5651_DEVICE_ID: 186 case RT5651_HP_VOL: 187 case RT5651_LOUT_CTRL1: 188 case RT5651_LOUT_CTRL2: 189 case RT5651_IN1_IN2: 190 case RT5651_IN3: 191 case RT5651_INL1_INR1_VOL: 192 case RT5651_INL2_INR2_VOL: 193 case RT5651_DAC1_DIG_VOL: 194 case RT5651_DAC2_DIG_VOL: 195 case RT5651_DAC2_CTRL: 196 case RT5651_ADC_DIG_VOL: 197 case RT5651_ADC_DATA: 198 case RT5651_ADC_BST_VOL: 199 case RT5651_STO1_ADC_MIXER: 200 case RT5651_STO2_ADC_MIXER: 201 case RT5651_AD_DA_MIXER: 202 case RT5651_STO_DAC_MIXER: 203 case RT5651_DD_MIXER: 204 case RT5651_DIG_INF_DATA: 205 case RT5651_PDM_CTL: 206 case RT5651_REC_L1_MIXER: 207 case RT5651_REC_L2_MIXER: 208 case RT5651_REC_R1_MIXER: 209 case RT5651_REC_R2_MIXER: 210 case RT5651_HPO_MIXER: 211 case RT5651_OUT_L1_MIXER: 212 case RT5651_OUT_L2_MIXER: 213 case RT5651_OUT_L3_MIXER: 214 case RT5651_OUT_R1_MIXER: 215 case RT5651_OUT_R2_MIXER: 216 case RT5651_OUT_R3_MIXER: 217 case RT5651_LOUT_MIXER: 218 case RT5651_PWR_DIG1: 219 case RT5651_PWR_DIG2: 220 case RT5651_PWR_ANLG1: 221 case RT5651_PWR_ANLG2: 222 case RT5651_PWR_MIXER: 223 case RT5651_PWR_VOL: 224 case RT5651_PRIV_INDEX: 225 case RT5651_PRIV_DATA: 226 case RT5651_I2S1_SDP: 227 case RT5651_I2S2_SDP: 228 case RT5651_ADDA_CLK1: 229 case RT5651_ADDA_CLK2: 230 case RT5651_DMIC: 231 case RT5651_TDM_CTL_1: 232 case RT5651_TDM_CTL_2: 233 case RT5651_TDM_CTL_3: 234 case RT5651_GLB_CLK: 235 case RT5651_PLL_CTRL1: 236 case RT5651_PLL_CTRL2: 237 case RT5651_PLL_MODE_1: 238 case RT5651_PLL_MODE_2: 239 case RT5651_PLL_MODE_3: 240 case RT5651_PLL_MODE_4: 241 case RT5651_PLL_MODE_5: 242 case RT5651_PLL_MODE_6: 243 case RT5651_PLL_MODE_7: 244 case RT5651_DEPOP_M1: 245 case RT5651_DEPOP_M2: 246 case RT5651_DEPOP_M3: 247 case RT5651_CHARGE_PUMP: 248 case RT5651_MICBIAS: 249 case RT5651_A_JD_CTL1: 250 case RT5651_EQ_CTRL1: 251 case RT5651_EQ_CTRL2: 252 case RT5651_ALC_1: 253 case RT5651_ALC_2: 254 case RT5651_ALC_3: 255 case RT5651_JD_CTRL1: 256 case RT5651_JD_CTRL2: 257 case RT5651_IRQ_CTRL1: 258 case RT5651_IRQ_CTRL2: 259 case RT5651_INT_IRQ_ST: 260 case RT5651_GPIO_CTRL1: 261 case RT5651_GPIO_CTRL2: 262 case RT5651_GPIO_CTRL3: 263 case RT5651_PGM_REG_ARR1: 264 case RT5651_PGM_REG_ARR2: 265 case RT5651_PGM_REG_ARR3: 266 case RT5651_PGM_REG_ARR4: 267 case RT5651_PGM_REG_ARR5: 268 case RT5651_SCB_FUNC: 269 case RT5651_SCB_CTRL: 270 case RT5651_BASE_BACK: 271 case RT5651_MP3_PLUS1: 272 case RT5651_MP3_PLUS2: 273 case RT5651_ADJ_HPF_CTRL1: 274 case RT5651_ADJ_HPF_CTRL2: 275 case RT5651_HP_CALIB_AMP_DET: 276 case RT5651_HP_CALIB2: 277 case RT5651_SV_ZCD1: 278 case RT5651_SV_ZCD2: 279 case RT5651_D_MISC: 280 case RT5651_DUMMY2: 281 case RT5651_DUMMY3: 282 return true; 283 default: 284 return false; 285 } 286} 287 288static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 289static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); 290static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 291static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); 292static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); 293 294/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ 295static const DECLARE_TLV_DB_RANGE(bst_tlv, 296 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 297 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 298 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 299 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), 300 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), 301 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), 302 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) 303); 304 305/* Interface data select */ 306static const char * const rt5651_data_select[] = { 307 "Normal", "Swap", "left copy to right", "right copy to left"}; 308 309static SOC_ENUM_SINGLE_DECL(rt5651_if2_dac_enum, RT5651_DIG_INF_DATA, 310 RT5651_IF2_DAC_SEL_SFT, rt5651_data_select); 311 312static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_enum, RT5651_DIG_INF_DATA, 313 RT5651_IF2_ADC_SEL_SFT, rt5651_data_select); 314 315static const struct snd_kcontrol_new rt5651_snd_controls[] = { 316 /* Headphone Output Volume */ 317 SOC_DOUBLE_TLV("HP Playback Volume", RT5651_HP_VOL, 318 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv), 319 /* OUTPUT Control */ 320 SOC_DOUBLE_TLV("OUT Playback Volume", RT5651_LOUT_CTRL1, 321 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv), 322 323 /* DAC Digital Volume */ 324 SOC_DOUBLE("DAC2 Playback Switch", RT5651_DAC2_CTRL, 325 RT5651_M_DAC_L2_VOL_SFT, RT5651_M_DAC_R2_VOL_SFT, 1, 1), 326 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5651_DAC1_DIG_VOL, 327 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 328 175, 0, dac_vol_tlv), 329 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5651_DAC2_DIG_VOL, 330 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 331 175, 0, dac_vol_tlv), 332 /* IN1/IN2 Control */ 333 SOC_SINGLE_TLV("IN1 Boost", RT5651_IN1_IN2, 334 RT5651_BST_SFT1, 8, 0, bst_tlv), 335 SOC_SINGLE_TLV("IN2 Boost", RT5651_IN1_IN2, 336 RT5651_BST_SFT2, 8, 0, bst_tlv), 337 /* INL/INR Volume Control */ 338 SOC_DOUBLE_TLV("IN Capture Volume", RT5651_INL1_INR1_VOL, 339 RT5651_INL_VOL_SFT, RT5651_INR_VOL_SFT, 340 31, 1, in_vol_tlv), 341 /* ADC Digital Volume Control */ 342 SOC_DOUBLE("ADC Capture Switch", RT5651_ADC_DIG_VOL, 343 RT5651_L_MUTE_SFT, RT5651_R_MUTE_SFT, 1, 1), 344 SOC_DOUBLE_TLV("ADC Capture Volume", RT5651_ADC_DIG_VOL, 345 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 346 127, 0, adc_vol_tlv), 347 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5651_ADC_DATA, 348 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 349 127, 0, adc_vol_tlv), 350 /* ADC Boost Volume Control */ 351 SOC_DOUBLE_TLV("ADC Boost Gain", RT5651_ADC_BST_VOL, 352 RT5651_ADC_L_BST_SFT, RT5651_ADC_R_BST_SFT, 353 3, 0, adc_bst_tlv), 354 355 /* ASRC */ 356 SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1, 357 RT5651_STO1_T_SFT, 1, 0), 358 SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1, 359 RT5651_STO2_T_SFT, 1, 0), 360 SOC_SINGLE("DMIC ASRC Switch", RT5651_PLL_MODE_1, 361 RT5651_DMIC_1_M_SFT, 1, 0), 362 363 SOC_ENUM("ADC IF2 Data Switch", rt5651_if2_adc_enum), 364 SOC_ENUM("DAC IF2 Data Switch", rt5651_if2_dac_enum), 365}; 366 367/** 368 * set_dmic_clk - Set parameter of dmic. 369 * 370 * @w: DAPM widget. 371 * @kcontrol: The kcontrol of this widget. 372 * @event: Event id. 373 * 374 */ 375static int set_dmic_clk(struct snd_soc_dapm_widget *w, 376 struct snd_kcontrol *kcontrol, int event) 377{ 378 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 379 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 380 int idx, rate; 381 382 rate = rt5651->sysclk / rl6231_get_pre_div(rt5651->regmap, 383 RT5651_ADDA_CLK1, RT5651_I2S_PD1_SFT); 384 idx = rl6231_calc_dmic_clk(rate); 385 if (idx < 0) 386 dev_err(codec->dev, "Failed to set DMIC clock\n"); 387 else 388 snd_soc_update_bits(codec, RT5651_DMIC, RT5651_DMIC_CLK_MASK, 389 idx << RT5651_DMIC_CLK_SFT); 390 391 return idx; 392} 393 394static int is_sysclk_from_pll(struct snd_soc_dapm_widget *source, 395 struct snd_soc_dapm_widget *sink) 396{ 397 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); 398 unsigned int val; 399 400 val = snd_soc_read(codec, RT5651_GLB_CLK); 401 val &= RT5651_SCLK_SRC_MASK; 402 if (val == RT5651_SCLK_SRC_PLL1) 403 return 1; 404 else 405 return 0; 406} 407 408/* Digital Mixer */ 409static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = { 410 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER, 411 RT5651_M_STO1_ADC_L1_SFT, 1, 1), 412 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER, 413 RT5651_M_STO1_ADC_L2_SFT, 1, 1), 414}; 415 416static const struct snd_kcontrol_new rt5651_sto1_adc_r_mix[] = { 417 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER, 418 RT5651_M_STO1_ADC_R1_SFT, 1, 1), 419 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER, 420 RT5651_M_STO1_ADC_R2_SFT, 1, 1), 421}; 422 423static const struct snd_kcontrol_new rt5651_sto2_adc_l_mix[] = { 424 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER, 425 RT5651_M_STO2_ADC_L1_SFT, 1, 1), 426 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER, 427 RT5651_M_STO2_ADC_L2_SFT, 1, 1), 428}; 429 430static const struct snd_kcontrol_new rt5651_sto2_adc_r_mix[] = { 431 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER, 432 RT5651_M_STO2_ADC_R1_SFT, 1, 1), 433 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER, 434 RT5651_M_STO2_ADC_R2_SFT, 1, 1), 435}; 436 437static const struct snd_kcontrol_new rt5651_dac_l_mix[] = { 438 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER, 439 RT5651_M_ADCMIX_L_SFT, 1, 1), 440 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER, 441 RT5651_M_IF1_DAC_L_SFT, 1, 1), 442}; 443 444static const struct snd_kcontrol_new rt5651_dac_r_mix[] = { 445 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER, 446 RT5651_M_ADCMIX_R_SFT, 1, 1), 447 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER, 448 RT5651_M_IF1_DAC_R_SFT, 1, 1), 449}; 450 451static const struct snd_kcontrol_new rt5651_sto_dac_l_mix[] = { 452 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER, 453 RT5651_M_DAC_L1_MIXL_SFT, 1, 1), 454 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_STO_DAC_MIXER, 455 RT5651_M_DAC_L2_MIXL_SFT, 1, 1), 456 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER, 457 RT5651_M_DAC_R1_MIXL_SFT, 1, 1), 458}; 459 460static const struct snd_kcontrol_new rt5651_sto_dac_r_mix[] = { 461 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER, 462 RT5651_M_DAC_R1_MIXR_SFT, 1, 1), 463 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_STO_DAC_MIXER, 464 RT5651_M_DAC_R2_MIXR_SFT, 1, 1), 465 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER, 466 RT5651_M_DAC_L1_MIXR_SFT, 1, 1), 467}; 468 469static const struct snd_kcontrol_new rt5651_dd_dac_l_mix[] = { 470 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_DD_MIXER, 471 RT5651_M_STO_DD_L1_SFT, 1, 1), 472 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER, 473 RT5651_M_STO_DD_L2_SFT, 1, 1), 474 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER, 475 RT5651_M_STO_DD_R2_L_SFT, 1, 1), 476}; 477 478static const struct snd_kcontrol_new rt5651_dd_dac_r_mix[] = { 479 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_DD_MIXER, 480 RT5651_M_STO_DD_R1_SFT, 1, 1), 481 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER, 482 RT5651_M_STO_DD_R2_SFT, 1, 1), 483 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER, 484 RT5651_M_STO_DD_L2_R_SFT, 1, 1), 485}; 486 487/* Analog Input Mixer */ 488static const struct snd_kcontrol_new rt5651_rec_l_mix[] = { 489 SOC_DAPM_SINGLE("INL1 Switch", RT5651_REC_L2_MIXER, 490 RT5651_M_IN1_L_RM_L_SFT, 1, 1), 491 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_L2_MIXER, 492 RT5651_M_BST3_RM_L_SFT, 1, 1), 493 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_L2_MIXER, 494 RT5651_M_BST2_RM_L_SFT, 1, 1), 495 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_L2_MIXER, 496 RT5651_M_BST1_RM_L_SFT, 1, 1), 497}; 498 499static const struct snd_kcontrol_new rt5651_rec_r_mix[] = { 500 SOC_DAPM_SINGLE("INR1 Switch", RT5651_REC_R2_MIXER, 501 RT5651_M_IN1_R_RM_R_SFT, 1, 1), 502 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_R2_MIXER, 503 RT5651_M_BST3_RM_R_SFT, 1, 1), 504 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_R2_MIXER, 505 RT5651_M_BST2_RM_R_SFT, 1, 1), 506 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_R2_MIXER, 507 RT5651_M_BST1_RM_R_SFT, 1, 1), 508}; 509 510/* Analog Output Mixer */ 511 512static const struct snd_kcontrol_new rt5651_out_l_mix[] = { 513 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_L3_MIXER, 514 RT5651_M_BST1_OM_L_SFT, 1, 1), 515 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_L3_MIXER, 516 RT5651_M_BST2_OM_L_SFT, 1, 1), 517 SOC_DAPM_SINGLE("INL1 Switch", RT5651_OUT_L3_MIXER, 518 RT5651_M_IN1_L_OM_L_SFT, 1, 1), 519 SOC_DAPM_SINGLE("REC MIXL Switch", RT5651_OUT_L3_MIXER, 520 RT5651_M_RM_L_OM_L_SFT, 1, 1), 521 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_OUT_L3_MIXER, 522 RT5651_M_DAC_L1_OM_L_SFT, 1, 1), 523}; 524 525static const struct snd_kcontrol_new rt5651_out_r_mix[] = { 526 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_R3_MIXER, 527 RT5651_M_BST2_OM_R_SFT, 1, 1), 528 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_R3_MIXER, 529 RT5651_M_BST1_OM_R_SFT, 1, 1), 530 SOC_DAPM_SINGLE("INR1 Switch", RT5651_OUT_R3_MIXER, 531 RT5651_M_IN1_R_OM_R_SFT, 1, 1), 532 SOC_DAPM_SINGLE("REC MIXR Switch", RT5651_OUT_R3_MIXER, 533 RT5651_M_RM_R_OM_R_SFT, 1, 1), 534 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_OUT_R3_MIXER, 535 RT5651_M_DAC_R1_OM_R_SFT, 1, 1), 536}; 537 538static const struct snd_kcontrol_new rt5651_hpo_mix[] = { 539 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5651_HPO_MIXER, 540 RT5651_M_DAC1_HM_SFT, 1, 1), 541 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5651_HPO_MIXER, 542 RT5651_M_HPVOL_HM_SFT, 1, 1), 543}; 544 545static const struct snd_kcontrol_new rt5651_lout_mix[] = { 546 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_LOUT_MIXER, 547 RT5651_M_DAC_L1_LM_SFT, 1, 1), 548 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_LOUT_MIXER, 549 RT5651_M_DAC_R1_LM_SFT, 1, 1), 550 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5651_LOUT_MIXER, 551 RT5651_M_OV_L_LM_SFT, 1, 1), 552 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5651_LOUT_MIXER, 553 RT5651_M_OV_R_LM_SFT, 1, 1), 554}; 555 556static const struct snd_kcontrol_new outvol_l_control = 557 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1, 558 RT5651_VOL_L_SFT, 1, 1); 559 560static const struct snd_kcontrol_new outvol_r_control = 561 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1, 562 RT5651_VOL_R_SFT, 1, 1); 563 564static const struct snd_kcontrol_new lout_l_mute_control = 565 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1, 566 RT5651_L_MUTE_SFT, 1, 1); 567 568static const struct snd_kcontrol_new lout_r_mute_control = 569 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1, 570 RT5651_R_MUTE_SFT, 1, 1); 571 572static const struct snd_kcontrol_new hpovol_l_control = 573 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL, 574 RT5651_VOL_L_SFT, 1, 1); 575 576static const struct snd_kcontrol_new hpovol_r_control = 577 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL, 578 RT5651_VOL_R_SFT, 1, 1); 579 580static const struct snd_kcontrol_new hpo_l_mute_control = 581 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL, 582 RT5651_L_MUTE_SFT, 1, 1); 583 584static const struct snd_kcontrol_new hpo_r_mute_control = 585 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL, 586 RT5651_R_MUTE_SFT, 1, 1); 587 588/* INL/R source */ 589static const char * const rt5651_inl_src[] = {"IN2P", "HPOVOLLP"}; 590 591static SOC_ENUM_SINGLE_DECL( 592 rt5651_inl_enum, RT5651_INL1_INR1_VOL, 593 RT5651_INL_SEL_SFT, rt5651_inl_src); 594 595static const struct snd_kcontrol_new rt5651_inl1_mux = 596 SOC_DAPM_ENUM("INL1 source", rt5651_inl_enum); 597 598static const char * const rt5651_inr1_src[] = {"IN2N", "HPOVOLRP"}; 599 600static SOC_ENUM_SINGLE_DECL( 601 rt5651_inr1_enum, RT5651_INL1_INR1_VOL, 602 RT5651_INR_SEL_SFT, rt5651_inr1_src); 603 604static const struct snd_kcontrol_new rt5651_inr1_mux = 605 SOC_DAPM_ENUM("INR1 source", rt5651_inr1_enum); 606 607static const char * const rt5651_inl2_src[] = {"IN3P", "OUTVOLLP"}; 608 609static SOC_ENUM_SINGLE_DECL( 610 rt5651_inl2_enum, RT5651_INL2_INR2_VOL, 611 RT5651_INL_SEL_SFT, rt5651_inl2_src); 612 613static const struct snd_kcontrol_new rt5651_inl2_mux = 614 SOC_DAPM_ENUM("INL2 source", rt5651_inl2_enum); 615 616static const char * const rt5651_inr2_src[] = {"IN3N", "OUTVOLRP"}; 617 618static SOC_ENUM_SINGLE_DECL( 619 rt5651_inr2_enum, RT5651_INL2_INR2_VOL, 620 RT5651_INR_SEL_SFT, rt5651_inr2_src); 621 622static const struct snd_kcontrol_new rt5651_inr2_mux = 623 SOC_DAPM_ENUM("INR2 source", rt5651_inr2_enum); 624 625 626/* Stereo ADC source */ 627static const char * const rt5651_stereo1_adc1_src[] = {"DD MIX", "ADC"}; 628 629static SOC_ENUM_SINGLE_DECL( 630 rt5651_stereo1_adc1_enum, RT5651_STO1_ADC_MIXER, 631 RT5651_STO1_ADC_1_SRC_SFT, rt5651_stereo1_adc1_src); 632 633static const struct snd_kcontrol_new rt5651_sto1_adc_l1_mux = 634 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5651_stereo1_adc1_enum); 635 636static const struct snd_kcontrol_new rt5651_sto1_adc_r1_mux = 637 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5651_stereo1_adc1_enum); 638 639static const char * const rt5651_stereo1_adc2_src[] = {"DMIC", "DD MIX"}; 640 641static SOC_ENUM_SINGLE_DECL( 642 rt5651_stereo1_adc2_enum, RT5651_STO1_ADC_MIXER, 643 RT5651_STO1_ADC_2_SRC_SFT, rt5651_stereo1_adc2_src); 644 645static const struct snd_kcontrol_new rt5651_sto1_adc_l2_mux = 646 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5651_stereo1_adc2_enum); 647 648static const struct snd_kcontrol_new rt5651_sto1_adc_r2_mux = 649 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5651_stereo1_adc2_enum); 650 651/* Mono ADC source */ 652static const char * const rt5651_sto2_adc_l1_src[] = {"DD MIXL", "ADCL"}; 653 654static SOC_ENUM_SINGLE_DECL( 655 rt5651_sto2_adc_l1_enum, RT5651_STO1_ADC_MIXER, 656 RT5651_STO2_ADC_L1_SRC_SFT, rt5651_sto2_adc_l1_src); 657 658static const struct snd_kcontrol_new rt5651_sto2_adc_l1_mux = 659 SOC_DAPM_ENUM("Stereo2 ADC1 left source", rt5651_sto2_adc_l1_enum); 660 661static const char * const rt5651_sto2_adc_l2_src[] = {"DMIC L", "DD MIXL"}; 662 663static SOC_ENUM_SINGLE_DECL( 664 rt5651_sto2_adc_l2_enum, RT5651_STO1_ADC_MIXER, 665 RT5651_STO2_ADC_L2_SRC_SFT, rt5651_sto2_adc_l2_src); 666 667static const struct snd_kcontrol_new rt5651_sto2_adc_l2_mux = 668 SOC_DAPM_ENUM("Stereo2 ADC2 left source", rt5651_sto2_adc_l2_enum); 669 670static const char * const rt5651_sto2_adc_r1_src[] = {"DD MIXR", "ADCR"}; 671 672static SOC_ENUM_SINGLE_DECL( 673 rt5651_sto2_adc_r1_enum, RT5651_STO1_ADC_MIXER, 674 RT5651_STO2_ADC_R1_SRC_SFT, rt5651_sto2_adc_r1_src); 675 676static const struct snd_kcontrol_new rt5651_sto2_adc_r1_mux = 677 SOC_DAPM_ENUM("Stereo2 ADC1 right source", rt5651_sto2_adc_r1_enum); 678 679static const char * const rt5651_sto2_adc_r2_src[] = {"DMIC R", "DD MIXR"}; 680 681static SOC_ENUM_SINGLE_DECL( 682 rt5651_sto2_adc_r2_enum, RT5651_STO1_ADC_MIXER, 683 RT5651_STO2_ADC_R2_SRC_SFT, rt5651_sto2_adc_r2_src); 684 685static const struct snd_kcontrol_new rt5651_sto2_adc_r2_mux = 686 SOC_DAPM_ENUM("Stereo2 ADC2 right source", rt5651_sto2_adc_r2_enum); 687 688/* DAC2 channel source */ 689 690static const char * const rt5651_dac_src[] = {"IF1", "IF2"}; 691 692static SOC_ENUM_SINGLE_DECL(rt5651_dac_l2_enum, RT5651_DAC2_CTRL, 693 RT5651_SEL_DAC_L2_SFT, rt5651_dac_src); 694 695static const struct snd_kcontrol_new rt5651_dac_l2_mux = 696 SOC_DAPM_ENUM("DAC2 left channel source", rt5651_dac_l2_enum); 697 698static SOC_ENUM_SINGLE_DECL( 699 rt5651_dac_r2_enum, RT5651_DAC2_CTRL, 700 RT5651_SEL_DAC_R2_SFT, rt5651_dac_src); 701 702static const struct snd_kcontrol_new rt5651_dac_r2_mux = 703 SOC_DAPM_ENUM("DAC2 right channel source", rt5651_dac_r2_enum); 704 705/* IF2_ADC channel source */ 706 707static const char * const rt5651_adc_src[] = {"IF1 ADC1", "IF1 ADC2"}; 708 709static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_src_enum, RT5651_DIG_INF_DATA, 710 RT5651_IF2_ADC_SRC_SFT, rt5651_adc_src); 711 712static const struct snd_kcontrol_new rt5651_if2_adc_src_mux = 713 SOC_DAPM_ENUM("IF2 ADC channel source", rt5651_if2_adc_src_enum); 714 715/* PDM select */ 716static const char * const rt5651_pdm_sel[] = {"DD MIX", "Stereo DAC MIX"}; 717 718static SOC_ENUM_SINGLE_DECL( 719 rt5651_pdm_l_sel_enum, RT5651_PDM_CTL, 720 RT5651_PDM_L_SEL_SFT, rt5651_pdm_sel); 721 722static SOC_ENUM_SINGLE_DECL( 723 rt5651_pdm_r_sel_enum, RT5651_PDM_CTL, 724 RT5651_PDM_R_SEL_SFT, rt5651_pdm_sel); 725 726static const struct snd_kcontrol_new rt5651_pdm_l_mux = 727 SOC_DAPM_ENUM("PDM L select", rt5651_pdm_l_sel_enum); 728 729static const struct snd_kcontrol_new rt5651_pdm_r_mux = 730 SOC_DAPM_ENUM("PDM R select", rt5651_pdm_r_sel_enum); 731 732static int rt5651_amp_power_event(struct snd_soc_dapm_widget *w, 733 struct snd_kcontrol *kcontrol, int event) 734{ 735 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 736 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 737 738 switch (event) { 739 case SND_SOC_DAPM_POST_PMU: 740 /* depop parameters */ 741 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE + 742 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0200); 743 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2, 744 RT5651_DEPOP_MASK, RT5651_DEPOP_MAN); 745 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1, 746 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK | 747 RT5651_HP_CB_MASK, RT5651_HP_CP_PU | 748 RT5651_HP_SG_DIS | RT5651_HP_CB_PU); 749 regmap_write(rt5651->regmap, RT5651_PR_BASE + 750 RT5651_HP_DCC_INT1, 0x9f00); 751 /* headphone amp power on */ 752 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, 753 RT5651_PWR_FV1 | RT5651_PWR_FV2, 0); 754 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, 755 RT5651_PWR_HA, 756 RT5651_PWR_HA); 757 usleep_range(10000, 15000); 758 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, 759 RT5651_PWR_FV1 | RT5651_PWR_FV2 , 760 RT5651_PWR_FV1 | RT5651_PWR_FV2); 761 break; 762 763 default: 764 return 0; 765 } 766 767 return 0; 768} 769 770static int rt5651_hp_event(struct snd_soc_dapm_widget *w, 771 struct snd_kcontrol *kcontrol, int event) 772{ 773 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 774 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 775 776 switch (event) { 777 case SND_SOC_DAPM_POST_PMU: 778 /* headphone unmute sequence */ 779 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2, 780 RT5651_DEPOP_MASK | RT5651_DIG_DP_MASK, 781 RT5651_DEPOP_AUTO | RT5651_DIG_DP_EN); 782 regmap_update_bits(rt5651->regmap, RT5651_CHARGE_PUMP, 783 RT5651_PM_HP_MASK, RT5651_PM_HP_HV); 784 785 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M3, 786 RT5651_CP_FQ1_MASK | RT5651_CP_FQ2_MASK | 787 RT5651_CP_FQ3_MASK, 788 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ1_SFT) | 789 (RT5651_CP_FQ_12_KHZ << RT5651_CP_FQ2_SFT) | 790 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ3_SFT)); 791 792 regmap_write(rt5651->regmap, RT5651_PR_BASE + 793 RT5651_MAMP_INT_REG2, 0x1c00); 794 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1, 795 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK, 796 RT5651_HP_CP_PD | RT5651_HP_SG_EN); 797 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE + 798 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0400); 799 rt5651->hp_mute = 0; 800 break; 801 802 case SND_SOC_DAPM_PRE_PMD: 803 rt5651->hp_mute = 1; 804 usleep_range(70000, 75000); 805 break; 806 807 default: 808 return 0; 809 } 810 811 return 0; 812} 813 814static int rt5651_hp_post_event(struct snd_soc_dapm_widget *w, 815 struct snd_kcontrol *kcontrol, int event) 816{ 817 818 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 819 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 820 821 switch (event) { 822 case SND_SOC_DAPM_POST_PMU: 823 if (!rt5651->hp_mute) 824 usleep_range(80000, 85000); 825 826 break; 827 828 default: 829 return 0; 830 } 831 832 return 0; 833} 834 835static int rt5651_bst1_event(struct snd_soc_dapm_widget *w, 836 struct snd_kcontrol *kcontrol, int event) 837{ 838 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 839 840 switch (event) { 841 case SND_SOC_DAPM_POST_PMU: 842 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 843 RT5651_PWR_BST1_OP2, RT5651_PWR_BST1_OP2); 844 break; 845 846 case SND_SOC_DAPM_PRE_PMD: 847 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 848 RT5651_PWR_BST1_OP2, 0); 849 break; 850 851 default: 852 return 0; 853 } 854 855 return 0; 856} 857 858static int rt5651_bst2_event(struct snd_soc_dapm_widget *w, 859 struct snd_kcontrol *kcontrol, int event) 860{ 861 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 862 863 switch (event) { 864 case SND_SOC_DAPM_POST_PMU: 865 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 866 RT5651_PWR_BST2_OP2, RT5651_PWR_BST2_OP2); 867 break; 868 869 case SND_SOC_DAPM_PRE_PMD: 870 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 871 RT5651_PWR_BST2_OP2, 0); 872 break; 873 874 default: 875 return 0; 876 } 877 878 return 0; 879} 880 881static int rt5651_bst3_event(struct snd_soc_dapm_widget *w, 882 struct snd_kcontrol *kcontrol, int event) 883{ 884 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 885 886 switch (event) { 887 case SND_SOC_DAPM_POST_PMU: 888 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 889 RT5651_PWR_BST3_OP2, RT5651_PWR_BST3_OP2); 890 break; 891 892 case SND_SOC_DAPM_PRE_PMD: 893 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 894 RT5651_PWR_BST3_OP2, 0); 895 break; 896 897 default: 898 return 0; 899 } 900 901 return 0; 902} 903 904static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = { 905 /* ASRC */ 906 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5651_PLL_MODE_2, 907 15, 0, NULL, 0), 908 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5651_PLL_MODE_2, 909 14, 0, NULL, 0), 910 SND_SOC_DAPM_SUPPLY_S("STO1 DAC ASRC", 1, RT5651_PLL_MODE_2, 911 13, 0, NULL, 0), 912 SND_SOC_DAPM_SUPPLY_S("STO2 DAC ASRC", 1, RT5651_PLL_MODE_2, 913 12, 0, NULL, 0), 914 SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2, 915 11, 0, NULL, 0), 916 917 SND_SOC_DAPM_SUPPLY("PLL1", RT5651_PWR_ANLG2, 918 RT5651_PWR_PLL_BIT, 0, NULL, 0), 919 /* Input Side */ 920 /* micbias */ 921 SND_SOC_DAPM_SUPPLY("LDO", RT5651_PWR_ANLG1, 922 RT5651_PWR_LDO_BIT, 0, NULL, 0), 923 SND_SOC_DAPM_MICBIAS("micbias1", RT5651_PWR_ANLG2, 924 RT5651_PWR_MB1_BIT, 0), 925 /* Input Lines */ 926 SND_SOC_DAPM_INPUT("MIC1"), 927 SND_SOC_DAPM_INPUT("MIC2"), 928 SND_SOC_DAPM_INPUT("MIC3"), 929 930 SND_SOC_DAPM_INPUT("IN1P"), 931 SND_SOC_DAPM_INPUT("IN2P"), 932 SND_SOC_DAPM_INPUT("IN2N"), 933 SND_SOC_DAPM_INPUT("IN3P"), 934 SND_SOC_DAPM_INPUT("DMIC L1"), 935 SND_SOC_DAPM_INPUT("DMIC R1"), 936 SND_SOC_DAPM_SUPPLY("DMIC CLK", RT5651_DMIC, RT5651_DMIC_1_EN_SFT, 937 0, set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 938 /* Boost */ 939 SND_SOC_DAPM_PGA_E("BST1", RT5651_PWR_ANLG2, 940 RT5651_PWR_BST1_BIT, 0, NULL, 0, rt5651_bst1_event, 941 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 942 SND_SOC_DAPM_PGA_E("BST2", RT5651_PWR_ANLG2, 943 RT5651_PWR_BST2_BIT, 0, NULL, 0, rt5651_bst2_event, 944 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 945 SND_SOC_DAPM_PGA_E("BST3", RT5651_PWR_ANLG2, 946 RT5651_PWR_BST3_BIT, 0, NULL, 0, rt5651_bst3_event, 947 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 948 /* Input Volume */ 949 SND_SOC_DAPM_PGA("INL1 VOL", RT5651_PWR_VOL, 950 RT5651_PWR_IN1_L_BIT, 0, NULL, 0), 951 SND_SOC_DAPM_PGA("INR1 VOL", RT5651_PWR_VOL, 952 RT5651_PWR_IN1_R_BIT, 0, NULL, 0), 953 SND_SOC_DAPM_PGA("INL2 VOL", RT5651_PWR_VOL, 954 RT5651_PWR_IN2_L_BIT, 0, NULL, 0), 955 SND_SOC_DAPM_PGA("INR2 VOL", RT5651_PWR_VOL, 956 RT5651_PWR_IN2_R_BIT, 0, NULL, 0), 957 /* IN Mux */ 958 SND_SOC_DAPM_MUX("INL1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl1_mux), 959 SND_SOC_DAPM_MUX("INR1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr1_mux), 960 SND_SOC_DAPM_MUX("INL2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl2_mux), 961 SND_SOC_DAPM_MUX("INR2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr2_mux), 962 /* REC Mixer */ 963 SND_SOC_DAPM_MIXER("RECMIXL", RT5651_PWR_MIXER, RT5651_PWR_RM_L_BIT, 0, 964 rt5651_rec_l_mix, ARRAY_SIZE(rt5651_rec_l_mix)), 965 SND_SOC_DAPM_MIXER("RECMIXR", RT5651_PWR_MIXER, RT5651_PWR_RM_R_BIT, 0, 966 rt5651_rec_r_mix, ARRAY_SIZE(rt5651_rec_r_mix)), 967 /* ADCs */ 968 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), 969 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), 970 SND_SOC_DAPM_SUPPLY("ADC L Power", RT5651_PWR_DIG1, 971 RT5651_PWR_ADC_L_BIT, 0, NULL, 0), 972 SND_SOC_DAPM_SUPPLY("ADC R Power", RT5651_PWR_DIG1, 973 RT5651_PWR_ADC_R_BIT, 0, NULL, 0), 974 /* ADC Mux */ 975 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 976 &rt5651_sto1_adc_l2_mux), 977 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 978 &rt5651_sto1_adc_r2_mux), 979 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 980 &rt5651_sto1_adc_l1_mux), 981 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 982 &rt5651_sto1_adc_r1_mux), 983 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 984 &rt5651_sto2_adc_l2_mux), 985 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 986 &rt5651_sto2_adc_l1_mux), 987 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 988 &rt5651_sto2_adc_r1_mux), 989 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 990 &rt5651_sto2_adc_r2_mux), 991 /* ADC Mixer */ 992 SND_SOC_DAPM_SUPPLY("Stereo1 Filter", RT5651_PWR_DIG2, 993 RT5651_PWR_ADC_STO1_F_BIT, 0, NULL, 0), 994 SND_SOC_DAPM_SUPPLY("Stereo2 Filter", RT5651_PWR_DIG2, 995 RT5651_PWR_ADC_STO2_F_BIT, 0, NULL, 0), 996 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, 997 rt5651_sto1_adc_l_mix, 998 ARRAY_SIZE(rt5651_sto1_adc_l_mix)), 999 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, 1000 rt5651_sto1_adc_r_mix, 1001 ARRAY_SIZE(rt5651_sto1_adc_r_mix)), 1002 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, 1003 rt5651_sto2_adc_l_mix, 1004 ARRAY_SIZE(rt5651_sto2_adc_l_mix)), 1005 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, 1006 rt5651_sto2_adc_r_mix, 1007 ARRAY_SIZE(rt5651_sto2_adc_r_mix)), 1008 1009 /* Digital Interface */ 1010 SND_SOC_DAPM_SUPPLY("I2S1", RT5651_PWR_DIG1, 1011 RT5651_PWR_I2S1_BIT, 0, NULL, 0), 1012 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1013 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1014 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1015 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1016 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1017 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1018 SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1019 SND_SOC_DAPM_SUPPLY("I2S2", RT5651_PWR_DIG1, 1020 RT5651_PWR_I2S2_BIT, 0, NULL, 0), 1021 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1022 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1023 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1024 SND_SOC_DAPM_MUX("IF2 ADC", SND_SOC_NOPM, 0, 0, 1025 &rt5651_if2_adc_src_mux), 1026 1027 /* Digital Interface Select */ 1028 1029 SND_SOC_DAPM_MUX("PDM L Mux", RT5651_PDM_CTL, 1030 RT5651_M_PDM_L_SFT, 1, &rt5651_pdm_l_mux), 1031 SND_SOC_DAPM_MUX("PDM R Mux", RT5651_PDM_CTL, 1032 RT5651_M_PDM_R_SFT, 1, &rt5651_pdm_r_mux), 1033 /* Audio Interface */ 1034 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 1035 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 1036 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 1037 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), 1038 1039 /* Audio DSP */ 1040 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), 1041 1042 /* Output Side */ 1043 /* DAC mixer before sound effect */ 1044 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 1045 rt5651_dac_l_mix, ARRAY_SIZE(rt5651_dac_l_mix)), 1046 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 1047 rt5651_dac_r_mix, ARRAY_SIZE(rt5651_dac_r_mix)), 1048 1049 /* DAC2 channel Mux */ 1050 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_l2_mux), 1051 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_r2_mux), 1052 SND_SOC_DAPM_PGA("DAC L2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0), 1053 SND_SOC_DAPM_PGA("DAC R2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0), 1054 1055 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5651_PWR_DIG2, 1056 RT5651_PWR_DAC_STO1_F_BIT, 0, NULL, 0), 1057 SND_SOC_DAPM_SUPPLY("Stero2 DAC Power", RT5651_PWR_DIG2, 1058 RT5651_PWR_DAC_STO2_F_BIT, 0, NULL, 0), 1059 /* DAC Mixer */ 1060 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, 1061 rt5651_sto_dac_l_mix, 1062 ARRAY_SIZE(rt5651_sto_dac_l_mix)), 1063 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, 1064 rt5651_sto_dac_r_mix, 1065 ARRAY_SIZE(rt5651_sto_dac_r_mix)), 1066 SND_SOC_DAPM_MIXER("DD MIXL", SND_SOC_NOPM, 0, 0, 1067 rt5651_dd_dac_l_mix, 1068 ARRAY_SIZE(rt5651_dd_dac_l_mix)), 1069 SND_SOC_DAPM_MIXER("DD MIXR", SND_SOC_NOPM, 0, 0, 1070 rt5651_dd_dac_r_mix, 1071 ARRAY_SIZE(rt5651_dd_dac_r_mix)), 1072 1073 /* DACs */ 1074 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), 1075 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), 1076 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5651_PWR_DIG1, 1077 RT5651_PWR_DAC_L1_BIT, 0, NULL, 0), 1078 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5651_PWR_DIG1, 1079 RT5651_PWR_DAC_R1_BIT, 0, NULL, 0), 1080 /* OUT Mixer */ 1081 SND_SOC_DAPM_MIXER("OUT MIXL", RT5651_PWR_MIXER, RT5651_PWR_OM_L_BIT, 1082 0, rt5651_out_l_mix, ARRAY_SIZE(rt5651_out_l_mix)), 1083 SND_SOC_DAPM_MIXER("OUT MIXR", RT5651_PWR_MIXER, RT5651_PWR_OM_R_BIT, 1084 0, rt5651_out_r_mix, ARRAY_SIZE(rt5651_out_r_mix)), 1085 /* Ouput Volume */ 1086 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5651_PWR_VOL, 1087 RT5651_PWR_OV_L_BIT, 0, &outvol_l_control), 1088 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5651_PWR_VOL, 1089 RT5651_PWR_OV_R_BIT, 0, &outvol_r_control), 1090 SND_SOC_DAPM_SWITCH("HPOVOL L", RT5651_PWR_VOL, 1091 RT5651_PWR_HV_L_BIT, 0, &hpovol_l_control), 1092 SND_SOC_DAPM_SWITCH("HPOVOL R", RT5651_PWR_VOL, 1093 RT5651_PWR_HV_R_BIT, 0, &hpovol_r_control), 1094 SND_SOC_DAPM_PGA("INL1", RT5651_PWR_VOL, 1095 RT5651_PWR_IN1_L_BIT, 0, NULL, 0), 1096 SND_SOC_DAPM_PGA("INR1", RT5651_PWR_VOL, 1097 RT5651_PWR_IN1_R_BIT, 0, NULL, 0), 1098 SND_SOC_DAPM_PGA("INL2", RT5651_PWR_VOL, 1099 RT5651_PWR_IN2_L_BIT, 0, NULL, 0), 1100 SND_SOC_DAPM_PGA("INR2", RT5651_PWR_VOL, 1101 RT5651_PWR_IN2_R_BIT, 0, NULL, 0), 1102 /* HPO/LOUT/Mono Mixer */ 1103 SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0, 1104 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)), 1105 SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0, 1106 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)), 1107 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5651_PWR_ANLG1, 1108 RT5651_PWR_HP_L_BIT, 0, NULL, 0), 1109 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5651_PWR_ANLG1, 1110 RT5651_PWR_HP_R_BIT, 0, NULL, 0), 1111 SND_SOC_DAPM_MIXER("LOUT MIX", RT5651_PWR_ANLG1, RT5651_PWR_LM_BIT, 0, 1112 rt5651_lout_mix, ARRAY_SIZE(rt5651_lout_mix)), 1113 1114 SND_SOC_DAPM_SUPPLY("Amp Power", RT5651_PWR_ANLG1, 1115 RT5651_PWR_HA_BIT, 0, rt5651_amp_power_event, 1116 SND_SOC_DAPM_POST_PMU), 1117 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5651_hp_event, 1118 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1119 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0, 1120 &hpo_l_mute_control), 1121 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0, 1122 &hpo_r_mute_control), 1123 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, 1124 &lout_l_mute_control), 1125 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, 1126 &lout_r_mute_control), 1127 SND_SOC_DAPM_POST("HP Post", rt5651_hp_post_event), 1128 1129 /* Output Lines */ 1130 SND_SOC_DAPM_OUTPUT("HPOL"), 1131 SND_SOC_DAPM_OUTPUT("HPOR"), 1132 SND_SOC_DAPM_OUTPUT("LOUTL"), 1133 SND_SOC_DAPM_OUTPUT("LOUTR"), 1134 SND_SOC_DAPM_OUTPUT("PDML"), 1135 SND_SOC_DAPM_OUTPUT("PDMR"), 1136}; 1137 1138static const struct snd_soc_dapm_route rt5651_dapm_routes[] = { 1139 {"Stero1 DAC Power", NULL, "STO1 DAC ASRC"}, 1140 {"Stero2 DAC Power", NULL, "STO2 DAC ASRC"}, 1141 {"I2S1", NULL, "I2S1 ASRC"}, 1142 {"I2S2", NULL, "I2S2 ASRC"}, 1143 1144 {"IN1P", NULL, "LDO"}, 1145 {"IN2P", NULL, "LDO"}, 1146 {"IN3P", NULL, "LDO"}, 1147 1148 {"IN1P", NULL, "MIC1"}, 1149 {"IN2P", NULL, "MIC2"}, 1150 {"IN2N", NULL, "MIC2"}, 1151 {"IN3P", NULL, "MIC3"}, 1152 1153 {"BST1", NULL, "IN1P"}, 1154 {"BST2", NULL, "IN2P"}, 1155 {"BST2", NULL, "IN2N"}, 1156 {"BST3", NULL, "IN3P"}, 1157 1158 {"INL1 VOL", NULL, "IN2P"}, 1159 {"INR1 VOL", NULL, "IN2N"}, 1160 1161 {"RECMIXL", "INL1 Switch", "INL1 VOL"}, 1162 {"RECMIXL", "BST3 Switch", "BST3"}, 1163 {"RECMIXL", "BST2 Switch", "BST2"}, 1164 {"RECMIXL", "BST1 Switch", "BST1"}, 1165 1166 {"RECMIXR", "INR1 Switch", "INR1 VOL"}, 1167 {"RECMIXR", "BST3 Switch", "BST3"}, 1168 {"RECMIXR", "BST2 Switch", "BST2"}, 1169 {"RECMIXR", "BST1 Switch", "BST1"}, 1170 1171 {"ADC L", NULL, "RECMIXL"}, 1172 {"ADC L", NULL, "ADC L Power"}, 1173 {"ADC R", NULL, "RECMIXR"}, 1174 {"ADC R", NULL, "ADC R Power"}, 1175 1176 {"DMIC L1", NULL, "DMIC CLK"}, 1177 {"DMIC R1", NULL, "DMIC CLK"}, 1178 1179 {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"}, 1180 {"Stereo1 ADC L2 Mux", "DD MIX", "DD MIXL"}, 1181 {"Stereo1 ADC L1 Mux", "ADC", "ADC L"}, 1182 {"Stereo1 ADC L1 Mux", "DD MIX", "DD MIXL"}, 1183 1184 {"Stereo1 ADC R1 Mux", "ADC", "ADC R"}, 1185 {"Stereo1 ADC R1 Mux", "DD MIX", "DD MIXR"}, 1186 {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"}, 1187 {"Stereo1 ADC R2 Mux", "DD MIX", "DD MIXR"}, 1188 1189 {"Stereo2 ADC L2 Mux", "DMIC L", "DMIC L1"}, 1190 {"Stereo2 ADC L2 Mux", "DD MIXL", "DD MIXL"}, 1191 {"Stereo2 ADC L1 Mux", "DD MIXL", "DD MIXL"}, 1192 {"Stereo2 ADC L1 Mux", "ADCL", "ADC L"}, 1193 1194 {"Stereo2 ADC R1 Mux", "DD MIXR", "DD MIXR"}, 1195 {"Stereo2 ADC R1 Mux", "ADCR", "ADC R"}, 1196 {"Stereo2 ADC R2 Mux", "DMIC R", "DMIC R1"}, 1197 {"Stereo2 ADC R2 Mux", "DD MIXR", "DD MIXR"}, 1198 1199 {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"}, 1200 {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"}, 1201 {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"}, 1202 {"Stereo1 Filter", NULL, "PLL1", is_sysclk_from_pll}, 1203 {"Stereo1 Filter", NULL, "ADC ASRC"}, 1204 1205 {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"}, 1206 {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"}, 1207 {"Stereo1 ADC MIXR", NULL, "Stereo1 Filter"}, 1208 1209 {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"}, 1210 {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"}, 1211 {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"}, 1212 {"Stereo2 Filter", NULL, "PLL1", is_sysclk_from_pll}, 1213 {"Stereo2 Filter", NULL, "ADC ASRC"}, 1214 1215 {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"}, 1216 {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"}, 1217 {"Stereo2 ADC MIXR", NULL, "Stereo2 Filter"}, 1218 1219 {"IF1 ADC2", NULL, "Stereo2 ADC MIXL"}, 1220 {"IF1 ADC2", NULL, "Stereo2 ADC MIXR"}, 1221 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"}, 1222 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"}, 1223 1224 {"IF1 ADC1", NULL, "I2S1"}, 1225 1226 {"IF2 ADC", "IF1 ADC1", "IF1 ADC1"}, 1227 {"IF2 ADC", "IF1 ADC2", "IF1 ADC2"}, 1228 {"IF2 ADC", NULL, "I2S2"}, 1229 1230 {"AIF1TX", NULL, "IF1 ADC1"}, 1231 {"AIF1TX", NULL, "IF1 ADC2"}, 1232 {"AIF2TX", NULL, "IF2 ADC"}, 1233 1234 {"IF1 DAC", NULL, "AIF1RX"}, 1235 {"IF1 DAC", NULL, "I2S1"}, 1236 {"IF2 DAC", NULL, "AIF2RX"}, 1237 {"IF2 DAC", NULL, "I2S2"}, 1238 1239 {"IF1 DAC1 L", NULL, "IF1 DAC"}, 1240 {"IF1 DAC1 R", NULL, "IF1 DAC"}, 1241 {"IF1 DAC2 L", NULL, "IF1 DAC"}, 1242 {"IF1 DAC2 R", NULL, "IF1 DAC"}, 1243 {"IF2 DAC L", NULL, "IF2 DAC"}, 1244 {"IF2 DAC R", NULL, "IF2 DAC"}, 1245 1246 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"}, 1247 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"}, 1248 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"}, 1249 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"}, 1250 1251 {"Audio DSP", NULL, "DAC MIXL"}, 1252 {"Audio DSP", NULL, "DAC MIXR"}, 1253 1254 {"DAC L2 Mux", "IF1", "IF1 DAC2 L"}, 1255 {"DAC L2 Mux", "IF2", "IF2 DAC L"}, 1256 {"DAC L2 Volume", NULL, "DAC L2 Mux"}, 1257 1258 {"DAC R2 Mux", "IF1", "IF1 DAC2 R"}, 1259 {"DAC R2 Mux", "IF2", "IF2 DAC R"}, 1260 {"DAC R2 Volume", NULL, "DAC R2 Mux"}, 1261 1262 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"}, 1263 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"}, 1264 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"}, 1265 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"}, 1266 {"Stereo DAC MIXL", NULL, "Stero2 DAC Power"}, 1267 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"}, 1268 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"}, 1269 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"}, 1270 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"}, 1271 {"Stereo DAC MIXR", NULL, "Stero2 DAC Power"}, 1272 1273 {"PDM L Mux", "Stereo DAC MIX", "Stereo DAC MIXL"}, 1274 {"PDM L Mux", "DD MIX", "DAC MIXL"}, 1275 {"PDM R Mux", "Stereo DAC MIX", "Stereo DAC MIXR"}, 1276 {"PDM R Mux", "DD MIX", "DAC MIXR"}, 1277 1278 {"DAC L1", NULL, "Stereo DAC MIXL"}, 1279 {"DAC L1", NULL, "PLL1", is_sysclk_from_pll}, 1280 {"DAC L1", NULL, "DAC L1 Power"}, 1281 {"DAC R1", NULL, "Stereo DAC MIXR"}, 1282 {"DAC R1", NULL, "PLL1", is_sysclk_from_pll}, 1283 {"DAC R1", NULL, "DAC R1 Power"}, 1284 1285 {"DD MIXL", "DAC L1 Switch", "DAC MIXL"}, 1286 {"DD MIXL", "DAC L2 Switch", "DAC L2 Volume"}, 1287 {"DD MIXL", "DAC R2 Switch", "DAC R2 Volume"}, 1288 {"DD MIXL", NULL, "Stero2 DAC Power"}, 1289 1290 {"DD MIXR", "DAC R1 Switch", "DAC MIXR"}, 1291 {"DD MIXR", "DAC R2 Switch", "DAC R2 Volume"}, 1292 {"DD MIXR", "DAC L2 Switch", "DAC L2 Volume"}, 1293 {"DD MIXR", NULL, "Stero2 DAC Power"}, 1294 1295 {"OUT MIXL", "BST1 Switch", "BST1"}, 1296 {"OUT MIXL", "BST2 Switch", "BST2"}, 1297 {"OUT MIXL", "INL1 Switch", "INL1 VOL"}, 1298 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"}, 1299 {"OUT MIXL", "DAC L1 Switch", "DAC L1"}, 1300 1301 {"OUT MIXR", "BST2 Switch", "BST2"}, 1302 {"OUT MIXR", "BST1 Switch", "BST1"}, 1303 {"OUT MIXR", "INR1 Switch", "INR1 VOL"}, 1304 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"}, 1305 {"OUT MIXR", "DAC R1 Switch", "DAC R1"}, 1306 1307 {"HPOVOL L", "Switch", "OUT MIXL"}, 1308 {"HPOVOL R", "Switch", "OUT MIXR"}, 1309 {"OUTVOL L", "Switch", "OUT MIXL"}, 1310 {"OUTVOL R", "Switch", "OUT MIXR"}, 1311 1312 {"HPOL MIX", "HPO MIX DAC1 Switch", "DAC L1"}, 1313 {"HPOL MIX", "HPO MIX HPVOL Switch", "HPOVOL L"}, 1314 {"HPOL MIX", NULL, "HP L Amp"}, 1315 {"HPOR MIX", "HPO MIX DAC1 Switch", "DAC R1"}, 1316 {"HPOR MIX", "HPO MIX HPVOL Switch", "HPOVOL R"}, 1317 {"HPOR MIX", NULL, "HP R Amp"}, 1318 1319 {"LOUT MIX", "DAC L1 Switch", "DAC L1"}, 1320 {"LOUT MIX", "DAC R1 Switch", "DAC R1"}, 1321 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"}, 1322 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"}, 1323 1324 {"HP Amp", NULL, "HPOL MIX"}, 1325 {"HP Amp", NULL, "HPOR MIX"}, 1326 {"HP Amp", NULL, "Amp Power"}, 1327 {"HPO L Playback", "Switch", "HP Amp"}, 1328 {"HPO R Playback", "Switch", "HP Amp"}, 1329 {"HPOL", NULL, "HPO L Playback"}, 1330 {"HPOR", NULL, "HPO R Playback"}, 1331 1332 {"LOUT L Playback", "Switch", "LOUT MIX"}, 1333 {"LOUT R Playback", "Switch", "LOUT MIX"}, 1334 {"LOUTL", NULL, "LOUT L Playback"}, 1335 {"LOUTL", NULL, "Amp Power"}, 1336 {"LOUTR", NULL, "LOUT R Playback"}, 1337 {"LOUTR", NULL, "Amp Power"}, 1338 1339 {"PDML", NULL, "PDM L Mux"}, 1340 {"PDMR", NULL, "PDM R Mux"}, 1341}; 1342 1343static int rt5651_hw_params(struct snd_pcm_substream *substream, 1344 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 1345{ 1346 struct snd_soc_codec *codec = dai->codec; 1347 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1348 unsigned int val_len = 0, val_clk, mask_clk; 1349 int pre_div, bclk_ms, frame_size; 1350 1351 rt5651->lrck[dai->id] = params_rate(params); 1352 pre_div = rl6231_get_clk_info(rt5651->sysclk, rt5651->lrck[dai->id]); 1353 1354 if (pre_div < 0) { 1355 dev_err(codec->dev, "Unsupported clock setting\n"); 1356 return -EINVAL; 1357 } 1358 frame_size = snd_soc_params_to_frame_size(params); 1359 if (frame_size < 0) { 1360 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); 1361 return -EINVAL; 1362 } 1363 bclk_ms = frame_size > 32 ? 1 : 0; 1364 rt5651->bclk[dai->id] = rt5651->lrck[dai->id] * (32 << bclk_ms); 1365 1366 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", 1367 rt5651->bclk[dai->id], rt5651->lrck[dai->id]); 1368 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 1369 bclk_ms, pre_div, dai->id); 1370 1371 switch (params_width(params)) { 1372 case 16: 1373 break; 1374 case 20: 1375 val_len |= RT5651_I2S_DL_20; 1376 break; 1377 case 24: 1378 val_len |= RT5651_I2S_DL_24; 1379 break; 1380 case 8: 1381 val_len |= RT5651_I2S_DL_8; 1382 break; 1383 default: 1384 return -EINVAL; 1385 } 1386 1387 switch (dai->id) { 1388 case RT5651_AIF1: 1389 mask_clk = RT5651_I2S_PD1_MASK; 1390 val_clk = pre_div << RT5651_I2S_PD1_SFT; 1391 snd_soc_update_bits(codec, RT5651_I2S1_SDP, 1392 RT5651_I2S_DL_MASK, val_len); 1393 snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk); 1394 break; 1395 case RT5651_AIF2: 1396 mask_clk = RT5651_I2S_BCLK_MS2_MASK | RT5651_I2S_PD2_MASK; 1397 val_clk = pre_div << RT5651_I2S_PD2_SFT; 1398 snd_soc_update_bits(codec, RT5651_I2S2_SDP, 1399 RT5651_I2S_DL_MASK, val_len); 1400 snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk); 1401 break; 1402 default: 1403 dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id); 1404 return -EINVAL; 1405 } 1406 1407 return 0; 1408} 1409 1410static int rt5651_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1411{ 1412 struct snd_soc_codec *codec = dai->codec; 1413 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1414 unsigned int reg_val = 0; 1415 1416 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1417 case SND_SOC_DAIFMT_CBM_CFM: 1418 rt5651->master[dai->id] = 1; 1419 break; 1420 case SND_SOC_DAIFMT_CBS_CFS: 1421 reg_val |= RT5651_I2S_MS_S; 1422 rt5651->master[dai->id] = 0; 1423 break; 1424 default: 1425 return -EINVAL; 1426 } 1427 1428 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1429 case SND_SOC_DAIFMT_NB_NF: 1430 break; 1431 case SND_SOC_DAIFMT_IB_NF: 1432 reg_val |= RT5651_I2S_BP_INV; 1433 break; 1434 default: 1435 return -EINVAL; 1436 } 1437 1438 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1439 case SND_SOC_DAIFMT_I2S: 1440 break; 1441 case SND_SOC_DAIFMT_LEFT_J: 1442 reg_val |= RT5651_I2S_DF_LEFT; 1443 break; 1444 case SND_SOC_DAIFMT_DSP_A: 1445 reg_val |= RT5651_I2S_DF_PCM_A; 1446 break; 1447 case SND_SOC_DAIFMT_DSP_B: 1448 reg_val |= RT5651_I2S_DF_PCM_B; 1449 break; 1450 default: 1451 return -EINVAL; 1452 } 1453 1454 switch (dai->id) { 1455 case RT5651_AIF1: 1456 snd_soc_update_bits(codec, RT5651_I2S1_SDP, 1457 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK | 1458 RT5651_I2S_DF_MASK, reg_val); 1459 break; 1460 case RT5651_AIF2: 1461 snd_soc_update_bits(codec, RT5651_I2S2_SDP, 1462 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK | 1463 RT5651_I2S_DF_MASK, reg_val); 1464 break; 1465 default: 1466 dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id); 1467 return -EINVAL; 1468 } 1469 return 0; 1470} 1471 1472static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai, 1473 int clk_id, unsigned int freq, int dir) 1474{ 1475 struct snd_soc_codec *codec = dai->codec; 1476 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1477 unsigned int reg_val = 0; 1478 1479 if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src) 1480 return 0; 1481 1482 switch (clk_id) { 1483 case RT5651_SCLK_S_MCLK: 1484 reg_val |= RT5651_SCLK_SRC_MCLK; 1485 break; 1486 case RT5651_SCLK_S_PLL1: 1487 reg_val |= RT5651_SCLK_SRC_PLL1; 1488 break; 1489 case RT5651_SCLK_S_RCCLK: 1490 reg_val |= RT5651_SCLK_SRC_RCCLK; 1491 break; 1492 default: 1493 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); 1494 return -EINVAL; 1495 } 1496 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1497 RT5651_SCLK_SRC_MASK, reg_val); 1498 rt5651->sysclk = freq; 1499 rt5651->sysclk_src = clk_id; 1500 1501 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); 1502 1503 return 0; 1504} 1505 1506static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 1507 unsigned int freq_in, unsigned int freq_out) 1508{ 1509 struct snd_soc_codec *codec = dai->codec; 1510 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1511 struct rl6231_pll_code pll_code; 1512 int ret; 1513 1514 if (source == rt5651->pll_src && freq_in == rt5651->pll_in && 1515 freq_out == rt5651->pll_out) 1516 return 0; 1517 1518 if (!freq_in || !freq_out) { 1519 dev_dbg(codec->dev, "PLL disabled\n"); 1520 1521 rt5651->pll_in = 0; 1522 rt5651->pll_out = 0; 1523 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1524 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_MCLK); 1525 return 0; 1526 } 1527 1528 switch (source) { 1529 case RT5651_PLL1_S_MCLK: 1530 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1531 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_MCLK); 1532 break; 1533 case RT5651_PLL1_S_BCLK1: 1534 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1535 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK1); 1536 break; 1537 case RT5651_PLL1_S_BCLK2: 1538 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1539 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK2); 1540 break; 1541 default: 1542 dev_err(codec->dev, "Unknown PLL source %d\n", source); 1543 return -EINVAL; 1544 } 1545 1546 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); 1547 if (ret < 0) { 1548 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); 1549 return ret; 1550 } 1551 1552 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", 1553 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), 1554 pll_code.n_code, pll_code.k_code); 1555 1556 snd_soc_write(codec, RT5651_PLL_CTRL1, 1557 pll_code.n_code << RT5651_PLL_N_SFT | pll_code.k_code); 1558 snd_soc_write(codec, RT5651_PLL_CTRL2, 1559 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5651_PLL_M_SFT | 1560 pll_code.m_bp << RT5651_PLL_M_BP_SFT); 1561 1562 rt5651->pll_in = freq_in; 1563 rt5651->pll_out = freq_out; 1564 rt5651->pll_src = source; 1565 1566 return 0; 1567} 1568 1569static int rt5651_set_bias_level(struct snd_soc_codec *codec, 1570 enum snd_soc_bias_level level) 1571{ 1572 switch (level) { 1573 case SND_SOC_BIAS_PREPARE: 1574 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) { 1575 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1576 RT5651_PWR_VREF1 | RT5651_PWR_MB | 1577 RT5651_PWR_BG | RT5651_PWR_VREF2, 1578 RT5651_PWR_VREF1 | RT5651_PWR_MB | 1579 RT5651_PWR_BG | RT5651_PWR_VREF2); 1580 usleep_range(10000, 15000); 1581 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1582 RT5651_PWR_FV1 | RT5651_PWR_FV2, 1583 RT5651_PWR_FV1 | RT5651_PWR_FV2); 1584 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1585 RT5651_PWR_LDO_DVO_MASK, 1586 RT5651_PWR_LDO_DVO_1_2V); 1587 snd_soc_update_bits(codec, RT5651_D_MISC, 0x1, 0x1); 1588 if (snd_soc_read(codec, RT5651_PLL_MODE_1) & 0x9200) 1589 snd_soc_update_bits(codec, RT5651_D_MISC, 1590 0xc00, 0xc00); 1591 } 1592 break; 1593 1594 case SND_SOC_BIAS_STANDBY: 1595 snd_soc_write(codec, RT5651_D_MISC, 0x0010); 1596 snd_soc_write(codec, RT5651_PWR_DIG1, 0x0000); 1597 snd_soc_write(codec, RT5651_PWR_DIG2, 0x0000); 1598 snd_soc_write(codec, RT5651_PWR_VOL, 0x0000); 1599 snd_soc_write(codec, RT5651_PWR_MIXER, 0x0000); 1600 snd_soc_write(codec, RT5651_PWR_ANLG1, 0x0000); 1601 snd_soc_write(codec, RT5651_PWR_ANLG2, 0x0000); 1602 break; 1603 1604 default: 1605 break; 1606 } 1607 1608 return 0; 1609} 1610 1611static int rt5651_probe(struct snd_soc_codec *codec) 1612{ 1613 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1614 1615 rt5651->codec = codec; 1616 1617 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1618 RT5651_PWR_VREF1 | RT5651_PWR_MB | 1619 RT5651_PWR_BG | RT5651_PWR_VREF2, 1620 RT5651_PWR_VREF1 | RT5651_PWR_MB | 1621 RT5651_PWR_BG | RT5651_PWR_VREF2); 1622 usleep_range(10000, 15000); 1623 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1624 RT5651_PWR_FV1 | RT5651_PWR_FV2, 1625 RT5651_PWR_FV1 | RT5651_PWR_FV2); 1626 1627 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); 1628 1629 return 0; 1630} 1631 1632#ifdef CONFIG_PM 1633static int rt5651_suspend(struct snd_soc_codec *codec) 1634{ 1635 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1636 1637 regcache_cache_only(rt5651->regmap, true); 1638 regcache_mark_dirty(rt5651->regmap); 1639 return 0; 1640} 1641 1642static int rt5651_resume(struct snd_soc_codec *codec) 1643{ 1644 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1645 1646 regcache_cache_only(rt5651->regmap, false); 1647 snd_soc_cache_sync(codec); 1648 1649 return 0; 1650} 1651#else 1652#define rt5651_suspend NULL 1653#define rt5651_resume NULL 1654#endif 1655 1656#define RT5651_STEREO_RATES SNDRV_PCM_RATE_8000_96000 1657#define RT5651_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 1658 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 1659 1660static const struct snd_soc_dai_ops rt5651_aif_dai_ops = { 1661 .hw_params = rt5651_hw_params, 1662 .set_fmt = rt5651_set_dai_fmt, 1663 .set_sysclk = rt5651_set_dai_sysclk, 1664 .set_pll = rt5651_set_dai_pll, 1665}; 1666 1667static struct snd_soc_dai_driver rt5651_dai[] = { 1668 { 1669 .name = "rt5651-aif1", 1670 .id = RT5651_AIF1, 1671 .playback = { 1672 .stream_name = "AIF1 Playback", 1673 .channels_min = 1, 1674 .channels_max = 2, 1675 .rates = RT5651_STEREO_RATES, 1676 .formats = RT5651_FORMATS, 1677 }, 1678 .capture = { 1679 .stream_name = "AIF1 Capture", 1680 .channels_min = 1, 1681 .channels_max = 2, 1682 .rates = RT5651_STEREO_RATES, 1683 .formats = RT5651_FORMATS, 1684 }, 1685 .ops = &rt5651_aif_dai_ops, 1686 }, 1687 { 1688 .name = "rt5651-aif2", 1689 .id = RT5651_AIF2, 1690 .playback = { 1691 .stream_name = "AIF2 Playback", 1692 .channels_min = 1, 1693 .channels_max = 2, 1694 .rates = RT5651_STEREO_RATES, 1695 .formats = RT5651_FORMATS, 1696 }, 1697 .capture = { 1698 .stream_name = "AIF2 Capture", 1699 .channels_min = 1, 1700 .channels_max = 2, 1701 .rates = RT5651_STEREO_RATES, 1702 .formats = RT5651_FORMATS, 1703 }, 1704 .ops = &rt5651_aif_dai_ops, 1705 }, 1706}; 1707 1708static struct snd_soc_codec_driver soc_codec_dev_rt5651 = { 1709 .probe = rt5651_probe, 1710 .suspend = rt5651_suspend, 1711 .resume = rt5651_resume, 1712 .set_bias_level = rt5651_set_bias_level, 1713 .idle_bias_off = true, 1714 .controls = rt5651_snd_controls, 1715 .num_controls = ARRAY_SIZE(rt5651_snd_controls), 1716 .dapm_widgets = rt5651_dapm_widgets, 1717 .num_dapm_widgets = ARRAY_SIZE(rt5651_dapm_widgets), 1718 .dapm_routes = rt5651_dapm_routes, 1719 .num_dapm_routes = ARRAY_SIZE(rt5651_dapm_routes), 1720}; 1721 1722static const struct regmap_config rt5651_regmap = { 1723 .reg_bits = 8, 1724 .val_bits = 16, 1725 1726 .max_register = RT5651_DEVICE_ID + 1 + (ARRAY_SIZE(rt5651_ranges) * 1727 RT5651_PR_SPACING), 1728 .volatile_reg = rt5651_volatile_register, 1729 .readable_reg = rt5651_readable_register, 1730 1731 .cache_type = REGCACHE_RBTREE, 1732 .reg_defaults = rt5651_reg, 1733 .num_reg_defaults = ARRAY_SIZE(rt5651_reg), 1734 .ranges = rt5651_ranges, 1735 .num_ranges = ARRAY_SIZE(rt5651_ranges), 1736}; 1737 1738static const struct i2c_device_id rt5651_i2c_id[] = { 1739 { "rt5651", 0 }, 1740 { } 1741}; 1742MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id); 1743 1744static int rt5651_i2c_probe(struct i2c_client *i2c, 1745 const struct i2c_device_id *id) 1746{ 1747 struct rt5651_platform_data *pdata = dev_get_platdata(&i2c->dev); 1748 struct rt5651_priv *rt5651; 1749 int ret; 1750 1751 rt5651 = devm_kzalloc(&i2c->dev, sizeof(*rt5651), 1752 GFP_KERNEL); 1753 if (NULL == rt5651) 1754 return -ENOMEM; 1755 1756 i2c_set_clientdata(i2c, rt5651); 1757 1758 if (pdata) 1759 rt5651->pdata = *pdata; 1760 1761 rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap); 1762 if (IS_ERR(rt5651->regmap)) { 1763 ret = PTR_ERR(rt5651->regmap); 1764 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 1765 ret); 1766 return ret; 1767 } 1768 1769 regmap_read(rt5651->regmap, RT5651_DEVICE_ID, &ret); 1770 if (ret != RT5651_DEVICE_ID_VALUE) { 1771 dev_err(&i2c->dev, 1772 "Device with ID register %#x is not rt5651\n", ret); 1773 return -ENODEV; 1774 } 1775 1776 regmap_write(rt5651->regmap, RT5651_RESET, 0); 1777 1778 ret = regmap_register_patch(rt5651->regmap, init_list, 1779 ARRAY_SIZE(init_list)); 1780 if (ret != 0) 1781 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 1782 1783 if (rt5651->pdata.in2_diff) 1784 regmap_update_bits(rt5651->regmap, RT5651_IN1_IN2, 1785 RT5651_IN_DF2, RT5651_IN_DF2); 1786 1787 if (rt5651->pdata.dmic_en) 1788 regmap_update_bits(rt5651->regmap, RT5651_GPIO_CTRL1, 1789 RT5651_GP2_PIN_MASK, RT5651_GP2_PIN_DMIC1_SCL); 1790 1791 rt5651->hp_mute = 1; 1792 1793 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5651, 1794 rt5651_dai, ARRAY_SIZE(rt5651_dai)); 1795 1796 return ret; 1797} 1798 1799static int rt5651_i2c_remove(struct i2c_client *i2c) 1800{ 1801 snd_soc_unregister_codec(&i2c->dev); 1802 1803 return 0; 1804} 1805 1806static struct i2c_driver rt5651_i2c_driver = { 1807 .driver = { 1808 .name = "rt5651", 1809 }, 1810 .probe = rt5651_i2c_probe, 1811 .remove = rt5651_i2c_remove, 1812 .id_table = rt5651_i2c_id, 1813}; 1814module_i2c_driver(rt5651_i2c_driver); 1815 1816MODULE_DESCRIPTION("ASoC RT5651 driver"); 1817MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 1818MODULE_LICENSE("GPL v2"); 1819