1/* 2 * nv_tco 0.01: TCO timer driver for NV chipsets 3 * 4 * (c) Copyright 2005 Google Inc., All Rights Reserved. 5 * 6 * Based off i8xx_tco.c: 7 * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights 8 * Reserved. 9 * http://www.kernelconcepts.de 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * as published by the Free Software Foundation; either version 14 * 2 of the License, or (at your option) any later version. 15 * 16 * TCO timer driver for NV chipsets 17 * based on softdog.c by Alan Cox <alan@redhat.com> 18 */ 19 20/* 21 * Includes, defines, variables, module parameters, ... 22 */ 23 24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 25 26#include <linux/module.h> 27#include <linux/moduleparam.h> 28#include <linux/types.h> 29#include <linux/miscdevice.h> 30#include <linux/watchdog.h> 31#include <linux/init.h> 32#include <linux/fs.h> 33#include <linux/pci.h> 34#include <linux/ioport.h> 35#include <linux/jiffies.h> 36#include <linux/platform_device.h> 37#include <linux/uaccess.h> 38#include <linux/io.h> 39 40#include "nv_tco.h" 41 42/* Module and version information */ 43#define TCO_VERSION "0.01" 44#define TCO_MODULE_NAME "NV_TCO" 45#define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION 46 47/* internal variables */ 48static unsigned int tcobase; 49static DEFINE_SPINLOCK(tco_lock); /* Guards the hardware */ 50static unsigned long timer_alive; 51static char tco_expect_close; 52static struct pci_dev *tco_pci; 53 54/* the watchdog platform device */ 55static struct platform_device *nv_tco_platform_device; 56 57/* module parameters */ 58#define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (2<heartbeat<39) */ 59static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */ 60module_param(heartbeat, int, 0); 61MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, " 62 "default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); 63 64static bool nowayout = WATCHDOG_NOWAYOUT; 65module_param(nowayout, bool, 0); 66MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started" 67 " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 68 69/* 70 * Some TCO specific functions 71 */ 72static inline unsigned char seconds_to_ticks(int seconds) 73{ 74 /* the internal timer is stored as ticks which decrement 75 * every 0.6 seconds */ 76 return (seconds * 10) / 6; 77} 78 79static void tco_timer_start(void) 80{ 81 u32 val; 82 unsigned long flags; 83 84 spin_lock_irqsave(&tco_lock, flags); 85 val = inl(TCO_CNT(tcobase)); 86 val &= ~TCO_CNT_TCOHALT; 87 outl(val, TCO_CNT(tcobase)); 88 spin_unlock_irqrestore(&tco_lock, flags); 89} 90 91static void tco_timer_stop(void) 92{ 93 u32 val; 94 unsigned long flags; 95 96 spin_lock_irqsave(&tco_lock, flags); 97 val = inl(TCO_CNT(tcobase)); 98 val |= TCO_CNT_TCOHALT; 99 outl(val, TCO_CNT(tcobase)); 100 spin_unlock_irqrestore(&tco_lock, flags); 101} 102 103static void tco_timer_keepalive(void) 104{ 105 unsigned long flags; 106 107 spin_lock_irqsave(&tco_lock, flags); 108 outb(0x01, TCO_RLD(tcobase)); 109 spin_unlock_irqrestore(&tco_lock, flags); 110} 111 112static int tco_timer_set_heartbeat(int t) 113{ 114 int ret = 0; 115 unsigned char tmrval; 116 unsigned long flags; 117 u8 val; 118 119 /* 120 * note seconds_to_ticks(t) > t, so if t > 0x3f, so is 121 * tmrval=seconds_to_ticks(t). Check that the count in seconds isn't 122 * out of range on it's own (to avoid overflow in tmrval). 123 */ 124 if (t < 0 || t > 0x3f) 125 return -EINVAL; 126 tmrval = seconds_to_ticks(t); 127 128 /* "Values of 0h-3h are ignored and should not be attempted" */ 129 if (tmrval > 0x3f || tmrval < 0x04) 130 return -EINVAL; 131 132 /* Write new heartbeat to watchdog */ 133 spin_lock_irqsave(&tco_lock, flags); 134 val = inb(TCO_TMR(tcobase)); 135 val &= 0xc0; 136 val |= tmrval; 137 outb(val, TCO_TMR(tcobase)); 138 val = inb(TCO_TMR(tcobase)); 139 140 if ((val & 0x3f) != tmrval) 141 ret = -EINVAL; 142 spin_unlock_irqrestore(&tco_lock, flags); 143 144 if (ret) 145 return ret; 146 147 heartbeat = t; 148 return 0; 149} 150 151/* 152 * /dev/watchdog handling 153 */ 154 155static int nv_tco_open(struct inode *inode, struct file *file) 156{ 157 /* /dev/watchdog can only be opened once */ 158 if (test_and_set_bit(0, &timer_alive)) 159 return -EBUSY; 160 161 /* Reload and activate timer */ 162 tco_timer_keepalive(); 163 tco_timer_start(); 164 return nonseekable_open(inode, file); 165} 166 167static int nv_tco_release(struct inode *inode, struct file *file) 168{ 169 /* Shut off the timer */ 170 if (tco_expect_close == 42) { 171 tco_timer_stop(); 172 } else { 173 pr_crit("Unexpected close, not stopping watchdog!\n"); 174 tco_timer_keepalive(); 175 } 176 clear_bit(0, &timer_alive); 177 tco_expect_close = 0; 178 return 0; 179} 180 181static ssize_t nv_tco_write(struct file *file, const char __user *data, 182 size_t len, loff_t *ppos) 183{ 184 /* See if we got the magic character 'V' and reload the timer */ 185 if (len) { 186 if (!nowayout) { 187 size_t i; 188 189 /* 190 * note: just in case someone wrote the magic character 191 * five months ago... 192 */ 193 tco_expect_close = 0; 194 195 /* 196 * scan to see whether or not we got the magic 197 * character 198 */ 199 for (i = 0; i != len; i++) { 200 char c; 201 if (get_user(c, data + i)) 202 return -EFAULT; 203 if (c == 'V') 204 tco_expect_close = 42; 205 } 206 } 207 208 /* someone wrote to us, we should reload the timer */ 209 tco_timer_keepalive(); 210 } 211 return len; 212} 213 214static long nv_tco_ioctl(struct file *file, unsigned int cmd, 215 unsigned long arg) 216{ 217 int new_options, retval = -EINVAL; 218 int new_heartbeat; 219 void __user *argp = (void __user *)arg; 220 int __user *p = argp; 221 static const struct watchdog_info ident = { 222 .options = WDIOF_SETTIMEOUT | 223 WDIOF_KEEPALIVEPING | 224 WDIOF_MAGICCLOSE, 225 .firmware_version = 0, 226 .identity = TCO_MODULE_NAME, 227 }; 228 229 switch (cmd) { 230 case WDIOC_GETSUPPORT: 231 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; 232 case WDIOC_GETSTATUS: 233 case WDIOC_GETBOOTSTATUS: 234 return put_user(0, p); 235 case WDIOC_SETOPTIONS: 236 if (get_user(new_options, p)) 237 return -EFAULT; 238 if (new_options & WDIOS_DISABLECARD) { 239 tco_timer_stop(); 240 retval = 0; 241 } 242 if (new_options & WDIOS_ENABLECARD) { 243 tco_timer_keepalive(); 244 tco_timer_start(); 245 retval = 0; 246 } 247 return retval; 248 case WDIOC_KEEPALIVE: 249 tco_timer_keepalive(); 250 return 0; 251 case WDIOC_SETTIMEOUT: 252 if (get_user(new_heartbeat, p)) 253 return -EFAULT; 254 if (tco_timer_set_heartbeat(new_heartbeat)) 255 return -EINVAL; 256 tco_timer_keepalive(); 257 /* Fall through */ 258 case WDIOC_GETTIMEOUT: 259 return put_user(heartbeat, p); 260 default: 261 return -ENOTTY; 262 } 263} 264 265/* 266 * Kernel Interfaces 267 */ 268 269static const struct file_operations nv_tco_fops = { 270 .owner = THIS_MODULE, 271 .llseek = no_llseek, 272 .write = nv_tco_write, 273 .unlocked_ioctl = nv_tco_ioctl, 274 .open = nv_tco_open, 275 .release = nv_tco_release, 276}; 277 278static struct miscdevice nv_tco_miscdev = { 279 .minor = WATCHDOG_MINOR, 280 .name = "watchdog", 281 .fops = &nv_tco_fops, 282}; 283 284/* 285 * Data for PCI driver interface 286 * 287 * This data only exists for exporting the supported 288 * PCI ids via MODULE_DEVICE_TABLE. We do not actually 289 * register a pci_driver, because someone else might one day 290 * want to register another driver on the same PCI id. 291 */ 292static const struct pci_device_id tco_pci_tbl[] = { 293 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS, 294 PCI_ANY_ID, PCI_ANY_ID, }, 295 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS, 296 PCI_ANY_ID, PCI_ANY_ID, }, 297 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS, 298 PCI_ANY_ID, PCI_ANY_ID, }, 299 { 0, }, /* End of list */ 300}; 301MODULE_DEVICE_TABLE(pci, tco_pci_tbl); 302 303/* 304 * Init & exit routines 305 */ 306 307static unsigned char nv_tco_getdevice(void) 308{ 309 struct pci_dev *dev = NULL; 310 u32 val; 311 312 /* Find the PCI device */ 313 for_each_pci_dev(dev) { 314 if (pci_match_id(tco_pci_tbl, dev) != NULL) { 315 tco_pci = dev; 316 break; 317 } 318 } 319 320 if (!tco_pci) 321 return 0; 322 323 /* Find the base io port */ 324 pci_read_config_dword(tco_pci, 0x64, &val); 325 val &= 0xffff; 326 if (val == 0x0001 || val == 0x0000) { 327 /* Something is wrong here, bar isn't setup */ 328 pr_err("failed to get tcobase address\n"); 329 return 0; 330 } 331 val &= 0xff00; 332 tcobase = val + 0x40; 333 334 if (!request_region(tcobase, 0x10, "NV TCO")) { 335 pr_err("I/O address 0x%04x already in use\n", tcobase); 336 return 0; 337 } 338 339 /* Set a reasonable heartbeat before we stop the timer */ 340 tco_timer_set_heartbeat(30); 341 342 /* 343 * Stop the TCO before we change anything so we don't race with 344 * a zeroed timer. 345 */ 346 tco_timer_keepalive(); 347 tco_timer_stop(); 348 349 /* Disable SMI caused by TCO */ 350 if (!request_region(MCP51_SMI_EN(tcobase), 4, "NV TCO")) { 351 pr_err("I/O address 0x%04x already in use\n", 352 MCP51_SMI_EN(tcobase)); 353 goto out; 354 } 355 val = inl(MCP51_SMI_EN(tcobase)); 356 val &= ~MCP51_SMI_EN_TCO; 357 outl(val, MCP51_SMI_EN(tcobase)); 358 val = inl(MCP51_SMI_EN(tcobase)); 359 release_region(MCP51_SMI_EN(tcobase), 4); 360 if (val & MCP51_SMI_EN_TCO) { 361 pr_err("Could not disable SMI caused by TCO\n"); 362 goto out; 363 } 364 365 /* Check chipset's NO_REBOOT bit */ 366 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val); 367 val |= MCP51_SMBUS_SETUP_B_TCO_REBOOT; 368 pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val); 369 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val); 370 if (!(val & MCP51_SMBUS_SETUP_B_TCO_REBOOT)) { 371 pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware\n"); 372 goto out; 373 } 374 375 return 1; 376out: 377 release_region(tcobase, 0x10); 378 return 0; 379} 380 381static int nv_tco_init(struct platform_device *dev) 382{ 383 int ret; 384 385 /* Check whether or not the hardware watchdog is there */ 386 if (!nv_tco_getdevice()) 387 return -ENODEV; 388 389 /* Check to see if last reboot was due to watchdog timeout */ 390 pr_info("Watchdog reboot %sdetected\n", 391 inl(TCO_STS(tcobase)) & TCO_STS_TCO2TO_STS ? "" : "not "); 392 393 /* Clear out the old status */ 394 outl(TCO_STS_RESET, TCO_STS(tcobase)); 395 396 /* 397 * Check that the heartbeat value is within it's range. 398 * If not, reset to the default. 399 */ 400 if (tco_timer_set_heartbeat(heartbeat)) { 401 heartbeat = WATCHDOG_HEARTBEAT; 402 tco_timer_set_heartbeat(heartbeat); 403 pr_info("heartbeat value must be 2<heartbeat<39, using %d\n", 404 heartbeat); 405 } 406 407 ret = misc_register(&nv_tco_miscdev); 408 if (ret != 0) { 409 pr_err("cannot register miscdev on minor=%d (err=%d)\n", 410 WATCHDOG_MINOR, ret); 411 goto unreg_region; 412 } 413 414 clear_bit(0, &timer_alive); 415 416 tco_timer_stop(); 417 418 pr_info("initialized (0x%04x). heartbeat=%d sec (nowayout=%d)\n", 419 tcobase, heartbeat, nowayout); 420 421 return 0; 422 423unreg_region: 424 release_region(tcobase, 0x10); 425 return ret; 426} 427 428static void nv_tco_cleanup(void) 429{ 430 u32 val; 431 432 /* Stop the timer before we leave */ 433 if (!nowayout) 434 tco_timer_stop(); 435 436 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */ 437 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val); 438 val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT; 439 pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val); 440 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val); 441 if (val & MCP51_SMBUS_SETUP_B_TCO_REBOOT) { 442 pr_crit("Couldn't unset REBOOT bit. Machine may soon reset\n"); 443 } 444 445 /* Deregister */ 446 misc_deregister(&nv_tco_miscdev); 447 release_region(tcobase, 0x10); 448} 449 450static int nv_tco_remove(struct platform_device *dev) 451{ 452 if (tcobase) 453 nv_tco_cleanup(); 454 455 return 0; 456} 457 458static void nv_tco_shutdown(struct platform_device *dev) 459{ 460 u32 val; 461 462 tco_timer_stop(); 463 464 /* Some BIOSes fail the POST (once) if the NO_REBOOT flag is not 465 * unset during shutdown. */ 466 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val); 467 val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT; 468 pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val); 469} 470 471static struct platform_driver nv_tco_driver = { 472 .probe = nv_tco_init, 473 .remove = nv_tco_remove, 474 .shutdown = nv_tco_shutdown, 475 .driver = { 476 .name = TCO_MODULE_NAME, 477 }, 478}; 479 480static int __init nv_tco_init_module(void) 481{ 482 int err; 483 484 pr_info("NV TCO WatchDog Timer Driver v%s\n", TCO_VERSION); 485 486 err = platform_driver_register(&nv_tco_driver); 487 if (err) 488 return err; 489 490 nv_tco_platform_device = platform_device_register_simple( 491 TCO_MODULE_NAME, -1, NULL, 0); 492 if (IS_ERR(nv_tco_platform_device)) { 493 err = PTR_ERR(nv_tco_platform_device); 494 goto unreg_platform_driver; 495 } 496 497 return 0; 498 499unreg_platform_driver: 500 platform_driver_unregister(&nv_tco_driver); 501 return err; 502} 503 504static void __exit nv_tco_cleanup_module(void) 505{ 506 platform_device_unregister(nv_tco_platform_device); 507 platform_driver_unregister(&nv_tco_driver); 508 pr_info("NV TCO Watchdog Module Unloaded\n"); 509} 510 511module_init(nv_tco_init_module); 512module_exit(nv_tco_cleanup_module); 513 514MODULE_AUTHOR("Mike Waychison"); 515MODULE_DESCRIPTION("TCO timer driver for NV chipsets"); 516MODULE_LICENSE("GPL"); 517