1/*
2 * Watchdog driver for IMX2 and later processors
3 *
4 *  Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
5 *  Copyright (C) 2014 Freescale Semiconductor, Inc.
6 *
7 * some parts adapted by similar drivers from Darius Augulis and Vladimir
8 * Zapolskiy, additional improvements by Wim Van Sebroeck.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
15 *
16 *			MX1:		MX2+:
17 *			----		-----
18 * Registers:		32-bit		16-bit
19 * Stopable timer:	Yes		No
20 * Need to enable clk:	No		Yes
21 * Halt on suspend:	Manual		Can be automatic
22 */
23
24#include <linux/clk.h>
25#include <linux/delay.h>
26#include <linux/init.h>
27#include <linux/io.h>
28#include <linux/jiffies.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/notifier.h>
33#include <linux/of_address.h>
34#include <linux/platform_device.h>
35#include <linux/reboot.h>
36#include <linux/regmap.h>
37#include <linux/timer.h>
38#include <linux/watchdog.h>
39
40#define DRIVER_NAME "imx2-wdt"
41
42#define IMX2_WDT_WCR		0x00		/* Control Register */
43#define IMX2_WDT_WCR_WT		(0xFF << 8)	/* -> Watchdog Timeout Field */
44#define IMX2_WDT_WCR_WRE	(1 << 3)	/* -> WDOG Reset Enable */
45#define IMX2_WDT_WCR_WDE	(1 << 2)	/* -> Watchdog Enable */
46#define IMX2_WDT_WCR_WDZST	(1 << 0)	/* -> Watchdog timer Suspend */
47
48#define IMX2_WDT_WSR		0x02		/* Service Register */
49#define IMX2_WDT_SEQ1		0x5555		/* -> service sequence 1 */
50#define IMX2_WDT_SEQ2		0xAAAA		/* -> service sequence 2 */
51
52#define IMX2_WDT_WRSR		0x04		/* Reset Status Register */
53#define IMX2_WDT_WRSR_TOUT	(1 << 1)	/* -> Reset due to Timeout */
54
55#define IMX2_WDT_WMCR		0x08		/* Misc Register */
56
57#define IMX2_WDT_MAX_TIME	128
58#define IMX2_WDT_DEFAULT_TIME	60		/* in seconds */
59
60#define WDOG_SEC_TO_COUNT(s)	((s * 2 - 1) << 8)
61
62struct imx2_wdt_device {
63	struct clk *clk;
64	struct regmap *regmap;
65	struct timer_list timer;	/* Pings the watchdog when closed */
66	struct watchdog_device wdog;
67	struct notifier_block restart_handler;
68};
69
70static bool nowayout = WATCHDOG_NOWAYOUT;
71module_param(nowayout, bool, 0);
72MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
73				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
74
75
76static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
77module_param(timeout, uint, 0);
78MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
79				__MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
80
81static const struct watchdog_info imx2_wdt_info = {
82	.identity = "imx2+ watchdog",
83	.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
84};
85
86static int imx2_restart_handler(struct notifier_block *this, unsigned long mode,
87				void *cmd)
88{
89	unsigned int wcr_enable = IMX2_WDT_WCR_WDE;
90	struct imx2_wdt_device *wdev = container_of(this,
91						    struct imx2_wdt_device,
92						    restart_handler);
93	/* Assert SRS signal */
94	regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
95	/*
96	 * Due to imx6q errata ERR004346 (WDOG: WDOG SRS bit requires to be
97	 * written twice), we add another two writes to ensure there must be at
98	 * least two writes happen in the same one 32kHz clock period.  We save
99	 * the target check here, since the writes shouldn't be a huge burden
100	 * for other platforms.
101	 */
102	regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
103	regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
104
105	/* wait for reset to assert... */
106	mdelay(500);
107
108	return NOTIFY_DONE;
109}
110
111static inline void imx2_wdt_setup(struct watchdog_device *wdog)
112{
113	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
114	u32 val;
115
116	regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
117
118	/* Suspend timer in low power mode, write once-only */
119	val |= IMX2_WDT_WCR_WDZST;
120	/* Strip the old watchdog Time-Out value */
121	val &= ~IMX2_WDT_WCR_WT;
122	/* Generate reset if WDOG times out */
123	val &= ~IMX2_WDT_WCR_WRE;
124	/* Keep Watchdog Disabled */
125	val &= ~IMX2_WDT_WCR_WDE;
126	/* Set the watchdog's Time-Out value */
127	val |= WDOG_SEC_TO_COUNT(wdog->timeout);
128
129	regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
130
131	/* enable the watchdog */
132	val |= IMX2_WDT_WCR_WDE;
133	regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
134}
135
136static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev)
137{
138	u32 val;
139
140	regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
141
142	return val & IMX2_WDT_WCR_WDE;
143}
144
145static int imx2_wdt_ping(struct watchdog_device *wdog)
146{
147	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
148
149	regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1);
150	regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2);
151	return 0;
152}
153
154static void imx2_wdt_timer_ping(unsigned long arg)
155{
156	struct watchdog_device *wdog = (struct watchdog_device *)arg;
157	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
158
159	/* ping it every wdog->timeout / 2 seconds to prevent reboot */
160	imx2_wdt_ping(wdog);
161	mod_timer(&wdev->timer, jiffies + wdog->timeout * HZ / 2);
162}
163
164static int imx2_wdt_set_timeout(struct watchdog_device *wdog,
165				unsigned int new_timeout)
166{
167	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
168
169	wdog->timeout = new_timeout;
170
171	regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT,
172			   WDOG_SEC_TO_COUNT(new_timeout));
173	return 0;
174}
175
176static int imx2_wdt_start(struct watchdog_device *wdog)
177{
178	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
179
180	if (imx2_wdt_is_running(wdev)) {
181		/* delete the timer that pings the watchdog after close */
182		del_timer_sync(&wdev->timer);
183		imx2_wdt_set_timeout(wdog, wdog->timeout);
184	} else
185		imx2_wdt_setup(wdog);
186
187	return imx2_wdt_ping(wdog);
188}
189
190static int imx2_wdt_stop(struct watchdog_device *wdog)
191{
192	/*
193	 * We don't need a clk_disable, it cannot be disabled once started.
194	 * We use a timer to ping the watchdog while /dev/watchdog is closed
195	 */
196	imx2_wdt_timer_ping((unsigned long)wdog);
197	return 0;
198}
199
200static inline void imx2_wdt_ping_if_active(struct watchdog_device *wdog)
201{
202	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
203
204	if (imx2_wdt_is_running(wdev)) {
205		imx2_wdt_set_timeout(wdog, wdog->timeout);
206		imx2_wdt_timer_ping((unsigned long)wdog);
207	}
208}
209
210static const struct watchdog_ops imx2_wdt_ops = {
211	.owner = THIS_MODULE,
212	.start = imx2_wdt_start,
213	.stop = imx2_wdt_stop,
214	.ping = imx2_wdt_ping,
215	.set_timeout = imx2_wdt_set_timeout,
216};
217
218static const struct regmap_config imx2_wdt_regmap_config = {
219	.reg_bits = 16,
220	.reg_stride = 2,
221	.val_bits = 16,
222	.max_register = 0x8,
223};
224
225static int __init imx2_wdt_probe(struct platform_device *pdev)
226{
227	struct imx2_wdt_device *wdev;
228	struct watchdog_device *wdog;
229	struct resource *res;
230	void __iomem *base;
231	int ret;
232	u32 val;
233
234	wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
235	if (!wdev)
236		return -ENOMEM;
237
238	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
239	base = devm_ioremap_resource(&pdev->dev, res);
240	if (IS_ERR(base))
241		return PTR_ERR(base);
242
243	wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
244						 &imx2_wdt_regmap_config);
245	if (IS_ERR(wdev->regmap)) {
246		dev_err(&pdev->dev, "regmap init failed\n");
247		return PTR_ERR(wdev->regmap);
248	}
249
250	wdev->clk = devm_clk_get(&pdev->dev, NULL);
251	if (IS_ERR(wdev->clk)) {
252		dev_err(&pdev->dev, "can't get Watchdog clock\n");
253		return PTR_ERR(wdev->clk);
254	}
255
256	wdog			= &wdev->wdog;
257	wdog->info		= &imx2_wdt_info;
258	wdog->ops		= &imx2_wdt_ops;
259	wdog->min_timeout	= 1;
260	wdog->max_timeout	= IMX2_WDT_MAX_TIME;
261	wdog->parent		= &pdev->dev;
262
263	ret = clk_prepare_enable(wdev->clk);
264	if (ret)
265		return ret;
266
267	regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
268	wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
269
270	wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
271	if (wdog->timeout != timeout)
272		dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
273			 timeout, wdog->timeout);
274
275	platform_set_drvdata(pdev, wdog);
276	watchdog_set_drvdata(wdog, wdev);
277	watchdog_set_nowayout(wdog, nowayout);
278	watchdog_init_timeout(wdog, timeout, &pdev->dev);
279
280	setup_timer(&wdev->timer, imx2_wdt_timer_ping, (unsigned long)wdog);
281
282	imx2_wdt_ping_if_active(wdog);
283
284	/*
285	 * Disable the watchdog power down counter at boot. Otherwise the power
286	 * down counter will pull down the #WDOG interrupt line for one clock
287	 * cycle.
288	 */
289	regmap_write(wdev->regmap, IMX2_WDT_WMCR, 0);
290
291	ret = watchdog_register_device(wdog);
292	if (ret) {
293		dev_err(&pdev->dev, "cannot register watchdog device\n");
294		goto disable_clk;
295	}
296
297	wdev->restart_handler.notifier_call = imx2_restart_handler;
298	wdev->restart_handler.priority = 128;
299	ret = register_restart_handler(&wdev->restart_handler);
300	if (ret)
301		dev_err(&pdev->dev, "cannot register restart handler\n");
302
303	dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n",
304		 wdog->timeout, nowayout);
305
306	return 0;
307
308disable_clk:
309	clk_disable_unprepare(wdev->clk);
310	return ret;
311}
312
313static int __exit imx2_wdt_remove(struct platform_device *pdev)
314{
315	struct watchdog_device *wdog = platform_get_drvdata(pdev);
316	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
317
318	unregister_restart_handler(&wdev->restart_handler);
319
320	watchdog_unregister_device(wdog);
321
322	if (imx2_wdt_is_running(wdev)) {
323		del_timer_sync(&wdev->timer);
324		imx2_wdt_ping(wdog);
325		dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
326	}
327	return 0;
328}
329
330static void imx2_wdt_shutdown(struct platform_device *pdev)
331{
332	struct watchdog_device *wdog = platform_get_drvdata(pdev);
333	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
334
335	if (imx2_wdt_is_running(wdev)) {
336		/*
337		 * We are running, we need to delete the timer but will
338		 * give max timeout before reboot will take place
339		 */
340		del_timer_sync(&wdev->timer);
341		imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
342		imx2_wdt_ping(wdog);
343		dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n");
344	}
345}
346
347#ifdef CONFIG_PM_SLEEP
348/* Disable watchdog if it is active or non-active but still running */
349static int imx2_wdt_suspend(struct device *dev)
350{
351	struct watchdog_device *wdog = dev_get_drvdata(dev);
352	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
353
354	/* The watchdog IP block is running */
355	if (imx2_wdt_is_running(wdev)) {
356		imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
357		imx2_wdt_ping(wdog);
358
359		/* The watchdog is not active */
360		if (!watchdog_active(wdog))
361			del_timer_sync(&wdev->timer);
362	}
363
364	clk_disable_unprepare(wdev->clk);
365
366	return 0;
367}
368
369/* Enable watchdog and configure it if necessary */
370static int imx2_wdt_resume(struct device *dev)
371{
372	struct watchdog_device *wdog = dev_get_drvdata(dev);
373	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
374	int ret;
375
376	ret = clk_prepare_enable(wdev->clk);
377	if (ret)
378		return ret;
379
380	if (watchdog_active(wdog) && !imx2_wdt_is_running(wdev)) {
381		/*
382		 * If the watchdog is still active and resumes
383		 * from deep sleep state, need to restart the
384		 * watchdog again.
385		 */
386		imx2_wdt_setup(wdog);
387		imx2_wdt_set_timeout(wdog, wdog->timeout);
388		imx2_wdt_ping(wdog);
389	} else if (imx2_wdt_is_running(wdev)) {
390		/* Resuming from non-deep sleep state. */
391		imx2_wdt_set_timeout(wdog, wdog->timeout);
392		imx2_wdt_ping(wdog);
393		/*
394		 * But the watchdog is not active, then start
395		 * the timer again.
396		 */
397		if (!watchdog_active(wdog))
398			mod_timer(&wdev->timer,
399				  jiffies + wdog->timeout * HZ / 2);
400	}
401
402	return 0;
403}
404#endif
405
406static SIMPLE_DEV_PM_OPS(imx2_wdt_pm_ops, imx2_wdt_suspend,
407			 imx2_wdt_resume);
408
409static const struct of_device_id imx2_wdt_dt_ids[] = {
410	{ .compatible = "fsl,imx21-wdt", },
411	{ /* sentinel */ }
412};
413MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
414
415static struct platform_driver imx2_wdt_driver = {
416	.remove		= __exit_p(imx2_wdt_remove),
417	.shutdown	= imx2_wdt_shutdown,
418	.driver		= {
419		.name	= DRIVER_NAME,
420		.pm     = &imx2_wdt_pm_ops,
421		.of_match_table = imx2_wdt_dt_ids,
422	},
423};
424
425module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
426
427MODULE_AUTHOR("Wolfram Sang");
428MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
429MODULE_LICENSE("GPL v2");
430MODULE_ALIAS("platform:" DRIVER_NAME);
431