1/*
2 *  linux/drivers/video/offb.c -- Open Firmware based frame buffer device
3 *
4 *	Copyright (C) 1997 Geert Uytterhoeven
5 *
6 *  This driver is partly based on the PowerMac console driver:
7 *
8 *	Copyright (C) 1996 Paul Mackerras
9 *
10 *  This file is subject to the terms and conditions of the GNU General Public
11 *  License. See the file COPYING in the main directory of this archive for
12 *  more details.
13 */
14
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/errno.h>
18#include <linux/string.h>
19#include <linux/mm.h>
20#include <linux/vmalloc.h>
21#include <linux/delay.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
24#include <linux/interrupt.h>
25#include <linux/fb.h>
26#include <linux/init.h>
27#include <linux/ioport.h>
28#include <linux/pci.h>
29#include <asm/io.h>
30
31#ifdef CONFIG_PPC64
32#include <asm/pci-bridge.h>
33#endif
34
35#ifdef CONFIG_PPC32
36#include <asm/bootx.h>
37#endif
38
39#include "macmodes.h"
40
41/* Supported palette hacks */
42enum {
43	cmap_unknown,
44	cmap_simple,		/* ATI Mach64 */
45	cmap_r128,		/* ATI Rage128 */
46	cmap_M3A,		/* ATI Rage Mobility M3 Head A */
47	cmap_M3B,		/* ATI Rage Mobility M3 Head B */
48	cmap_radeon,		/* ATI Radeon */
49	cmap_gxt2000,		/* IBM GXT2000 */
50	cmap_avivo,		/* ATI R5xx */
51	cmap_qemu,		/* qemu vga */
52};
53
54struct offb_par {
55	volatile void __iomem *cmap_adr;
56	volatile void __iomem *cmap_data;
57	int cmap_type;
58	int blanked;
59};
60
61struct offb_par default_par;
62
63#ifdef CONFIG_PPC32
64extern boot_infos_t *boot_infos;
65#endif
66
67/* Definitions used by the Avivo palette hack */
68#define AVIVO_DC_LUT_RW_SELECT                  0x6480
69#define AVIVO_DC_LUT_RW_MODE                    0x6484
70#define AVIVO_DC_LUT_RW_INDEX                   0x6488
71#define AVIVO_DC_LUT_SEQ_COLOR                  0x648c
72#define AVIVO_DC_LUT_PWL_DATA                   0x6490
73#define AVIVO_DC_LUT_30_COLOR                   0x6494
74#define AVIVO_DC_LUT_READ_PIPE_SELECT           0x6498
75#define AVIVO_DC_LUT_WRITE_EN_MASK              0x649c
76#define AVIVO_DC_LUT_AUTOFILL                   0x64a0
77
78#define AVIVO_DC_LUTA_CONTROL                   0x64c0
79#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE         0x64c4
80#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN        0x64c8
81#define AVIVO_DC_LUTA_BLACK_OFFSET_RED          0x64cc
82#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE         0x64d0
83#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN        0x64d4
84#define AVIVO_DC_LUTA_WHITE_OFFSET_RED          0x64d8
85
86#define AVIVO_DC_LUTB_CONTROL                   0x6cc0
87#define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE         0x6cc4
88#define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN        0x6cc8
89#define AVIVO_DC_LUTB_BLACK_OFFSET_RED          0x6ccc
90#define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE         0x6cd0
91#define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN        0x6cd4
92#define AVIVO_DC_LUTB_WHITE_OFFSET_RED          0x6cd8
93
94    /*
95     *  Set a single color register. The values supplied are already
96     *  rounded down to the hardware's capabilities (according to the
97     *  entries in the var structure). Return != 0 for invalid regno.
98     */
99
100static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
101			  u_int transp, struct fb_info *info)
102{
103	struct offb_par *par = (struct offb_par *) info->par;
104
105	if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
106		u32 *pal = info->pseudo_palette;
107		u32 cr = red >> (16 - info->var.red.length);
108		u32 cg = green >> (16 - info->var.green.length);
109		u32 cb = blue >> (16 - info->var.blue.length);
110		u32 value;
111
112		if (regno >= 16)
113			return -EINVAL;
114
115		value = (cr << info->var.red.offset) |
116			(cg << info->var.green.offset) |
117			(cb << info->var.blue.offset);
118		if (info->var.transp.length > 0) {
119			u32 mask = (1 << info->var.transp.length) - 1;
120			mask <<= info->var.transp.offset;
121			value |= mask;
122		}
123		pal[regno] = value;
124		return 0;
125	}
126
127	if (regno > 255)
128		return -EINVAL;
129
130	red >>= 8;
131	green >>= 8;
132	blue >>= 8;
133
134	if (!par->cmap_adr)
135		return 0;
136
137	switch (par->cmap_type) {
138	case cmap_simple:
139		writeb(regno, par->cmap_adr);
140		writeb(red, par->cmap_data);
141		writeb(green, par->cmap_data);
142		writeb(blue, par->cmap_data);
143		break;
144	case cmap_M3A:
145		/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
146		out_le32(par->cmap_adr + 0x58,
147			 in_le32(par->cmap_adr + 0x58) & ~0x20);
148	case cmap_r128:
149		/* Set palette index & data */
150		out_8(par->cmap_adr + 0xb0, regno);
151		out_le32(par->cmap_adr + 0xb4,
152			 (red << 16 | green << 8 | blue));
153		break;
154	case cmap_M3B:
155		/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
156		out_le32(par->cmap_adr + 0x58,
157			 in_le32(par->cmap_adr + 0x58) | 0x20);
158		/* Set palette index & data */
159		out_8(par->cmap_adr + 0xb0, regno);
160		out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
161		break;
162	case cmap_radeon:
163		/* Set palette index & data (could be smarter) */
164		out_8(par->cmap_adr + 0xb0, regno);
165		out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
166		break;
167	case cmap_gxt2000:
168		out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
169			 (red << 16 | green << 8 | blue));
170		break;
171	case cmap_avivo:
172		/* Write to both LUTs for now */
173		writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
174		writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
175		writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
176		       par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
177		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
178		writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
179		writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
180		       par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
181		break;
182	}
183
184	return 0;
185}
186
187    /*
188     *  Blank the display.
189     */
190
191static int offb_blank(int blank, struct fb_info *info)
192{
193	struct offb_par *par = (struct offb_par *) info->par;
194	int i, j;
195
196	if (!par->cmap_adr)
197		return 0;
198
199	if (!par->blanked)
200		if (!blank)
201			return 0;
202
203	par->blanked = blank;
204
205	if (blank)
206		for (i = 0; i < 256; i++) {
207			switch (par->cmap_type) {
208			case cmap_simple:
209				writeb(i, par->cmap_adr);
210				for (j = 0; j < 3; j++)
211					writeb(0, par->cmap_data);
212				break;
213			case cmap_M3A:
214				/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
215				out_le32(par->cmap_adr + 0x58,
216					 in_le32(par->cmap_adr + 0x58) & ~0x20);
217			case cmap_r128:
218				/* Set palette index & data */
219				out_8(par->cmap_adr + 0xb0, i);
220				out_le32(par->cmap_adr + 0xb4, 0);
221				break;
222			case cmap_M3B:
223				/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
224				out_le32(par->cmap_adr + 0x58,
225					 in_le32(par->cmap_adr + 0x58) | 0x20);
226				/* Set palette index & data */
227				out_8(par->cmap_adr + 0xb0, i);
228				out_le32(par->cmap_adr + 0xb4, 0);
229				break;
230			case cmap_radeon:
231				out_8(par->cmap_adr + 0xb0, i);
232				out_le32(par->cmap_adr + 0xb4, 0);
233				break;
234			case cmap_gxt2000:
235				out_le32(((unsigned __iomem *) par->cmap_adr) + i,
236					 0);
237				break;
238			case cmap_avivo:
239				writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
240				writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
241				writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
242				writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
243				writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
244				writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
245				break;
246			}
247	} else
248		fb_set_cmap(&info->cmap, info);
249	return 0;
250}
251
252static int offb_set_par(struct fb_info *info)
253{
254	struct offb_par *par = (struct offb_par *) info->par;
255
256	/* On avivo, initialize palette control */
257	if (par->cmap_type == cmap_avivo) {
258		writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
259		writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
260		writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
261		writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
262		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
263		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
264		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
265		writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
266		writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
267		writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
268		writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
269		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
270		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
271		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
272		writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
273		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
274		writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
275		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
276		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
277		writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
278	}
279	return 0;
280}
281
282static void offb_destroy(struct fb_info *info)
283{
284	if (info->screen_base)
285		iounmap(info->screen_base);
286	release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size);
287	framebuffer_release(info);
288}
289
290static struct fb_ops offb_ops = {
291	.owner		= THIS_MODULE,
292	.fb_destroy	= offb_destroy,
293	.fb_setcolreg	= offb_setcolreg,
294	.fb_set_par	= offb_set_par,
295	.fb_blank	= offb_blank,
296	.fb_fillrect	= cfb_fillrect,
297	.fb_copyarea	= cfb_copyarea,
298	.fb_imageblit	= cfb_imageblit,
299};
300
301static void __iomem *offb_map_reg(struct device_node *np, int index,
302				  unsigned long offset, unsigned long size)
303{
304	const __be32 *addrp;
305	u64 asize, taddr;
306	unsigned int flags;
307
308	addrp = of_get_pci_address(np, index, &asize, &flags);
309	if (addrp == NULL)
310		addrp = of_get_address(np, index, &asize, &flags);
311	if (addrp == NULL)
312		return NULL;
313	if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
314		return NULL;
315	if ((offset + size) > asize)
316		return NULL;
317	taddr = of_translate_address(np, addrp);
318	if (taddr == OF_BAD_ADDR)
319		return NULL;
320	return ioremap(taddr + offset, size);
321}
322
323static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
324				    const char *name, unsigned long address)
325{
326	struct offb_par *par = (struct offb_par *) info->par;
327
328	if (dp && !strncmp(name, "ATY,Rage128", 11)) {
329		par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
330		if (par->cmap_adr)
331			par->cmap_type = cmap_r128;
332	} else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
333			  || !strncmp(name, "ATY,RageM3p12A", 14))) {
334		par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
335		if (par->cmap_adr)
336			par->cmap_type = cmap_M3A;
337	} else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
338		par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
339		if (par->cmap_adr)
340			par->cmap_type = cmap_M3B;
341	} else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
342		par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
343		if (par->cmap_adr)
344			par->cmap_type = cmap_radeon;
345	} else if (!strncmp(name, "ATY,", 4)) {
346		unsigned long base = address & 0xff000000UL;
347		par->cmap_adr =
348			ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
349		par->cmap_data = par->cmap_adr + 1;
350		par->cmap_type = cmap_simple;
351	} else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
352			  of_device_is_compatible(dp, "pci1014,21c"))) {
353		par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
354		if (par->cmap_adr)
355			par->cmap_type = cmap_gxt2000;
356	} else if (dp && !strncmp(name, "vga,Display-", 12)) {
357		/* Look for AVIVO initialized by SLOF */
358		struct device_node *pciparent = of_get_parent(dp);
359		const u32 *vid, *did;
360		vid = of_get_property(pciparent, "vendor-id", NULL);
361		did = of_get_property(pciparent, "device-id", NULL);
362		/* This will match most R5xx */
363		if (vid && did && *vid == 0x1002 &&
364		    ((*did >= 0x7100 && *did < 0x7800) ||
365		     (*did >= 0x9400))) {
366			par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
367			if (par->cmap_adr)
368				par->cmap_type = cmap_avivo;
369		}
370		of_node_put(pciparent);
371	} else if (dp && of_device_is_compatible(dp, "qemu,std-vga")) {
372#ifdef __BIG_ENDIAN
373		const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
374#else
375		const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 };
376#endif
377		u64 io_addr = of_translate_address(dp, io_of_addr);
378		if (io_addr != OF_BAD_ADDR) {
379			par->cmap_adr = ioremap(io_addr + 0x3c8, 2);
380			if (par->cmap_adr) {
381				par->cmap_type = cmap_simple;
382				par->cmap_data = par->cmap_adr + 1;
383			}
384		}
385	}
386	info->fix.visual = (par->cmap_type != cmap_unknown) ?
387		FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
388}
389
390static void __init offb_init_fb(const char *name, const char *full_name,
391				int width, int height, int depth,
392				int pitch, unsigned long address,
393				int foreign_endian, struct device_node *dp)
394{
395	unsigned long res_size = pitch * height;
396	struct offb_par *par = &default_par;
397	unsigned long res_start = address;
398	struct fb_fix_screeninfo *fix;
399	struct fb_var_screeninfo *var;
400	struct fb_info *info;
401
402	if (!request_mem_region(res_start, res_size, "offb"))
403		return;
404
405	printk(KERN_INFO
406	       "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
407	       width, height, name, address, depth, pitch);
408	if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
409		printk(KERN_ERR "%s: can't use depth = %d\n", full_name,
410		       depth);
411		release_mem_region(res_start, res_size);
412		return;
413	}
414
415	info = framebuffer_alloc(sizeof(u32) * 16, NULL);
416
417	if (info == 0) {
418		release_mem_region(res_start, res_size);
419		return;
420	}
421
422	fix = &info->fix;
423	var = &info->var;
424	info->par = par;
425
426	strcpy(fix->id, "OFfb ");
427	strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
428	fix->id[sizeof(fix->id) - 1] = '\0';
429
430	var->xres = var->xres_virtual = width;
431	var->yres = var->yres_virtual = height;
432	fix->line_length = pitch;
433
434	fix->smem_start = address;
435	fix->smem_len = pitch * height;
436	fix->type = FB_TYPE_PACKED_PIXELS;
437	fix->type_aux = 0;
438
439	par->cmap_type = cmap_unknown;
440	if (depth == 8)
441		offb_init_palette_hacks(info, dp, name, address);
442	else
443		fix->visual = FB_VISUAL_TRUECOLOR;
444
445	var->xoffset = var->yoffset = 0;
446	switch (depth) {
447	case 8:
448		var->bits_per_pixel = 8;
449		var->red.offset = 0;
450		var->red.length = 8;
451		var->green.offset = 0;
452		var->green.length = 8;
453		var->blue.offset = 0;
454		var->blue.length = 8;
455		var->transp.offset = 0;
456		var->transp.length = 0;
457		break;
458	case 15:		/* RGB 555 */
459		var->bits_per_pixel = 16;
460		var->red.offset = 10;
461		var->red.length = 5;
462		var->green.offset = 5;
463		var->green.length = 5;
464		var->blue.offset = 0;
465		var->blue.length = 5;
466		var->transp.offset = 0;
467		var->transp.length = 0;
468		break;
469	case 16:		/* RGB 565 */
470		var->bits_per_pixel = 16;
471		var->red.offset = 11;
472		var->red.length = 5;
473		var->green.offset = 5;
474		var->green.length = 6;
475		var->blue.offset = 0;
476		var->blue.length = 5;
477		var->transp.offset = 0;
478		var->transp.length = 0;
479		break;
480	case 32:		/* RGB 888 */
481		var->bits_per_pixel = 32;
482		var->red.offset = 16;
483		var->red.length = 8;
484		var->green.offset = 8;
485		var->green.length = 8;
486		var->blue.offset = 0;
487		var->blue.length = 8;
488		var->transp.offset = 24;
489		var->transp.length = 8;
490		break;
491	}
492	var->red.msb_right = var->green.msb_right = var->blue.msb_right =
493	    var->transp.msb_right = 0;
494	var->grayscale = 0;
495	var->nonstd = 0;
496	var->activate = 0;
497	var->height = var->width = -1;
498	var->pixclock = 10000;
499	var->left_margin = var->right_margin = 16;
500	var->upper_margin = var->lower_margin = 16;
501	var->hsync_len = var->vsync_len = 8;
502	var->sync = 0;
503	var->vmode = FB_VMODE_NONINTERLACED;
504
505	/* set offb aperture size for generic probing */
506	info->apertures = alloc_apertures(1);
507	if (!info->apertures)
508		goto out_aper;
509	info->apertures->ranges[0].base = address;
510	info->apertures->ranges[0].size = fix->smem_len;
511
512	info->fbops = &offb_ops;
513	info->screen_base = ioremap(address, fix->smem_len);
514	info->pseudo_palette = (void *) (info + 1);
515	info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE | foreign_endian;
516
517	fb_alloc_cmap(&info->cmap, 256, 0);
518
519	if (register_framebuffer(info) < 0)
520		goto out_err;
521
522	fb_info(info, "Open Firmware frame buffer device on %s\n", full_name);
523	return;
524
525out_err:
526	iounmap(info->screen_base);
527out_aper:
528	iounmap(par->cmap_adr);
529	par->cmap_adr = NULL;
530	framebuffer_release(info);
531	release_mem_region(res_start, res_size);
532}
533
534
535static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
536{
537	unsigned int len;
538	int i, width = 640, height = 480, depth = 8, pitch = 640;
539	unsigned int flags, rsize, addr_prop = 0;
540	unsigned long max_size = 0;
541	u64 rstart, address = OF_BAD_ADDR;
542	const __be32 *pp, *addrp, *up;
543	u64 asize;
544	int foreign_endian = 0;
545
546#ifdef __BIG_ENDIAN
547	if (of_get_property(dp, "little-endian", NULL))
548		foreign_endian = FBINFO_FOREIGN_ENDIAN;
549#else
550	if (of_get_property(dp, "big-endian", NULL))
551		foreign_endian = FBINFO_FOREIGN_ENDIAN;
552#endif
553
554	pp = of_get_property(dp, "linux,bootx-depth", &len);
555	if (pp == NULL)
556		pp = of_get_property(dp, "depth", &len);
557	if (pp && len == sizeof(u32))
558		depth = be32_to_cpup(pp);
559
560	pp = of_get_property(dp, "linux,bootx-width", &len);
561	if (pp == NULL)
562		pp = of_get_property(dp, "width", &len);
563	if (pp && len == sizeof(u32))
564		width = be32_to_cpup(pp);
565
566	pp = of_get_property(dp, "linux,bootx-height", &len);
567	if (pp == NULL)
568		pp = of_get_property(dp, "height", &len);
569	if (pp && len == sizeof(u32))
570		height = be32_to_cpup(pp);
571
572	pp = of_get_property(dp, "linux,bootx-linebytes", &len);
573	if (pp == NULL)
574		pp = of_get_property(dp, "linebytes", &len);
575	if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
576		pitch = be32_to_cpup(pp);
577	else
578		pitch = width * ((depth + 7) / 8);
579
580	rsize = (unsigned long)pitch * (unsigned long)height;
581
582	/* Ok, now we try to figure out the address of the framebuffer.
583	 *
584	 * Unfortunately, Open Firmware doesn't provide a standard way to do
585	 * so. All we can do is a dodgy heuristic that happens to work in
586	 * practice. On most machines, the "address" property contains what
587	 * we need, though not on Matrox cards found in IBM machines. What I've
588	 * found that appears to give good results is to go through the PCI
589	 * ranges and pick one that is both big enough and if possible encloses
590	 * the "address" property. If none match, we pick the biggest
591	 */
592	up = of_get_property(dp, "linux,bootx-addr", &len);
593	if (up == NULL)
594		up = of_get_property(dp, "address", &len);
595	if (up && len == sizeof(u32))
596		addr_prop = *up;
597
598	/* Hack for when BootX is passing us */
599	if (no_real_node)
600		goto skip_addr;
601
602	for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
603		     != NULL; i++) {
604		int match_addrp = 0;
605
606		if (!(flags & IORESOURCE_MEM))
607			continue;
608		if (asize < rsize)
609			continue;
610		rstart = of_translate_address(dp, addrp);
611		if (rstart == OF_BAD_ADDR)
612			continue;
613		if (addr_prop && (rstart <= addr_prop) &&
614		    ((rstart + asize) >= (addr_prop + rsize)))
615			match_addrp = 1;
616		if (match_addrp) {
617			address = addr_prop;
618			break;
619		}
620		if (rsize > max_size) {
621			max_size = rsize;
622			address = OF_BAD_ADDR;
623 		}
624
625		if (address == OF_BAD_ADDR)
626			address = rstart;
627	}
628 skip_addr:
629	if (address == OF_BAD_ADDR && addr_prop)
630		address = (u64)addr_prop;
631	if (address != OF_BAD_ADDR) {
632		/* kludge for valkyrie */
633		if (strcmp(dp->name, "valkyrie") == 0)
634			address += 0x1000;
635		offb_init_fb(no_real_node ? "bootx" : dp->name,
636			     no_real_node ? "display" : dp->full_name,
637			     width, height, depth, pitch, address,
638			     foreign_endian, no_real_node ? NULL : dp);
639	}
640}
641
642static int __init offb_init(void)
643{
644	struct device_node *dp = NULL, *boot_disp = NULL;
645
646	if (fb_get_options("offb", NULL))
647		return -ENODEV;
648
649	/* Check if we have a MacOS display without a node spec */
650	if (of_get_property(of_chosen, "linux,bootx-noscreen", NULL) != NULL) {
651		/* The old code tried to work out which node was the MacOS
652		 * display based on the address. I'm dropping that since the
653		 * lack of a node spec only happens with old BootX versions
654		 * (users can update) and with this code, they'll still get
655		 * a display (just not the palette hacks).
656		 */
657		offb_init_nodriver(of_chosen, 1);
658	}
659
660	for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
661		if (of_get_property(dp, "linux,opened", NULL) &&
662		    of_get_property(dp, "linux,boot-display", NULL)) {
663			boot_disp = dp;
664			offb_init_nodriver(dp, 0);
665		}
666	}
667	for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
668		if (of_get_property(dp, "linux,opened", NULL) &&
669		    dp != boot_disp)
670			offb_init_nodriver(dp, 0);
671	}
672
673	return 0;
674}
675
676
677module_init(offb_init);
678MODULE_LICENSE("GPL");
679