1/* 2 * SPI bus via the Blackfin SPORT peripheral 3 * 4 * Enter bugs at http://blackfin.uclinux.org/ 5 * 6 * Copyright 2009-2011 Analog Devices Inc. 7 * 8 * Licensed under the GPL-2 or later. 9 */ 10 11#include <linux/module.h> 12#include <linux/delay.h> 13#include <linux/device.h> 14#include <linux/gpio.h> 15#include <linux/io.h> 16#include <linux/ioport.h> 17#include <linux/irq.h> 18#include <linux/errno.h> 19#include <linux/interrupt.h> 20#include <linux/platform_device.h> 21#include <linux/spi/spi.h> 22#include <linux/workqueue.h> 23 24#include <asm/portmux.h> 25#include <asm/bfin5xx_spi.h> 26#include <asm/blackfin.h> 27#include <asm/bfin_sport.h> 28#include <asm/cacheflush.h> 29 30#define DRV_NAME "bfin-sport-spi" 31#define DRV_DESC "SPI bus via the Blackfin SPORT" 32 33MODULE_AUTHOR("Cliff Cai"); 34MODULE_DESCRIPTION(DRV_DESC); 35MODULE_LICENSE("GPL"); 36MODULE_ALIAS("platform:bfin-sport-spi"); 37 38enum bfin_sport_spi_state { 39 START_STATE, 40 RUNNING_STATE, 41 DONE_STATE, 42 ERROR_STATE, 43}; 44 45struct bfin_sport_spi_master_data; 46 47struct bfin_sport_transfer_ops { 48 void (*write) (struct bfin_sport_spi_master_data *); 49 void (*read) (struct bfin_sport_spi_master_data *); 50 void (*duplex) (struct bfin_sport_spi_master_data *); 51}; 52 53struct bfin_sport_spi_master_data { 54 /* Driver model hookup */ 55 struct device *dev; 56 57 /* SPI framework hookup */ 58 struct spi_master *master; 59 60 /* Regs base of SPI controller */ 61 struct sport_register __iomem *regs; 62 int err_irq; 63 64 /* Pin request list */ 65 u16 *pin_req; 66 67 /* Driver message queue */ 68 struct workqueue_struct *workqueue; 69 struct work_struct pump_messages; 70 spinlock_t lock; 71 struct list_head queue; 72 int busy; 73 bool run; 74 75 /* Message Transfer pump */ 76 struct tasklet_struct pump_transfers; 77 78 /* Current message transfer state info */ 79 enum bfin_sport_spi_state state; 80 struct spi_message *cur_msg; 81 struct spi_transfer *cur_transfer; 82 struct bfin_sport_spi_slave_data *cur_chip; 83 union { 84 void *tx; 85 u8 *tx8; 86 u16 *tx16; 87 }; 88 void *tx_end; 89 union { 90 void *rx; 91 u8 *rx8; 92 u16 *rx16; 93 }; 94 void *rx_end; 95 96 int cs_change; 97 struct bfin_sport_transfer_ops *ops; 98}; 99 100struct bfin_sport_spi_slave_data { 101 u16 ctl_reg; 102 u16 baud; 103 u16 cs_chg_udelay; /* Some devices require > 255usec delay */ 104 u32 cs_gpio; 105 u16 idle_tx_val; 106 struct bfin_sport_transfer_ops *ops; 107}; 108 109static void 110bfin_sport_spi_enable(struct bfin_sport_spi_master_data *drv_data) 111{ 112 bfin_write_or(&drv_data->regs->tcr1, TSPEN); 113 bfin_write_or(&drv_data->regs->rcr1, TSPEN); 114 SSYNC(); 115} 116 117static void 118bfin_sport_spi_disable(struct bfin_sport_spi_master_data *drv_data) 119{ 120 bfin_write_and(&drv_data->regs->tcr1, ~TSPEN); 121 bfin_write_and(&drv_data->regs->rcr1, ~TSPEN); 122 SSYNC(); 123} 124 125/* Caculate the SPI_BAUD register value based on input HZ */ 126static u16 127bfin_sport_hz_to_spi_baud(u32 speed_hz) 128{ 129 u_long clk, sclk = get_sclk(); 130 int div = (sclk / (2 * speed_hz)) - 1; 131 132 if (div < 0) 133 div = 0; 134 135 clk = sclk / (2 * (div + 1)); 136 137 if (clk > speed_hz) 138 div++; 139 140 return div; 141} 142 143/* Chip select operation functions for cs_change flag */ 144static void 145bfin_sport_spi_cs_active(struct bfin_sport_spi_slave_data *chip) 146{ 147 gpio_direction_output(chip->cs_gpio, 0); 148} 149 150static void 151bfin_sport_spi_cs_deactive(struct bfin_sport_spi_slave_data *chip) 152{ 153 gpio_direction_output(chip->cs_gpio, 1); 154 /* Move delay here for consistency */ 155 if (chip->cs_chg_udelay) 156 udelay(chip->cs_chg_udelay); 157} 158 159static void 160bfin_sport_spi_stat_poll_complete(struct bfin_sport_spi_master_data *drv_data) 161{ 162 unsigned long timeout = jiffies + HZ; 163 while (!(bfin_read(&drv_data->regs->stat) & RXNE)) { 164 if (!time_before(jiffies, timeout)) 165 break; 166 } 167} 168 169static void 170bfin_sport_spi_u8_writer(struct bfin_sport_spi_master_data *drv_data) 171{ 172 u16 dummy; 173 174 while (drv_data->tx < drv_data->tx_end) { 175 bfin_write(&drv_data->regs->tx16, *drv_data->tx8++); 176 bfin_sport_spi_stat_poll_complete(drv_data); 177 dummy = bfin_read(&drv_data->regs->rx16); 178 } 179} 180 181static void 182bfin_sport_spi_u8_reader(struct bfin_sport_spi_master_data *drv_data) 183{ 184 u16 tx_val = drv_data->cur_chip->idle_tx_val; 185 186 while (drv_data->rx < drv_data->rx_end) { 187 bfin_write(&drv_data->regs->tx16, tx_val); 188 bfin_sport_spi_stat_poll_complete(drv_data); 189 *drv_data->rx8++ = bfin_read(&drv_data->regs->rx16); 190 } 191} 192 193static void 194bfin_sport_spi_u8_duplex(struct bfin_sport_spi_master_data *drv_data) 195{ 196 while (drv_data->rx < drv_data->rx_end) { 197 bfin_write(&drv_data->regs->tx16, *drv_data->tx8++); 198 bfin_sport_spi_stat_poll_complete(drv_data); 199 *drv_data->rx8++ = bfin_read(&drv_data->regs->rx16); 200 } 201} 202 203static struct bfin_sport_transfer_ops bfin_sport_transfer_ops_u8 = { 204 .write = bfin_sport_spi_u8_writer, 205 .read = bfin_sport_spi_u8_reader, 206 .duplex = bfin_sport_spi_u8_duplex, 207}; 208 209static void 210bfin_sport_spi_u16_writer(struct bfin_sport_spi_master_data *drv_data) 211{ 212 u16 dummy; 213 214 while (drv_data->tx < drv_data->tx_end) { 215 bfin_write(&drv_data->regs->tx16, *drv_data->tx16++); 216 bfin_sport_spi_stat_poll_complete(drv_data); 217 dummy = bfin_read(&drv_data->regs->rx16); 218 } 219} 220 221static void 222bfin_sport_spi_u16_reader(struct bfin_sport_spi_master_data *drv_data) 223{ 224 u16 tx_val = drv_data->cur_chip->idle_tx_val; 225 226 while (drv_data->rx < drv_data->rx_end) { 227 bfin_write(&drv_data->regs->tx16, tx_val); 228 bfin_sport_spi_stat_poll_complete(drv_data); 229 *drv_data->rx16++ = bfin_read(&drv_data->regs->rx16); 230 } 231} 232 233static void 234bfin_sport_spi_u16_duplex(struct bfin_sport_spi_master_data *drv_data) 235{ 236 while (drv_data->rx < drv_data->rx_end) { 237 bfin_write(&drv_data->regs->tx16, *drv_data->tx16++); 238 bfin_sport_spi_stat_poll_complete(drv_data); 239 *drv_data->rx16++ = bfin_read(&drv_data->regs->rx16); 240 } 241} 242 243static struct bfin_sport_transfer_ops bfin_sport_transfer_ops_u16 = { 244 .write = bfin_sport_spi_u16_writer, 245 .read = bfin_sport_spi_u16_reader, 246 .duplex = bfin_sport_spi_u16_duplex, 247}; 248 249/* stop controller and re-config current chip */ 250static void 251bfin_sport_spi_restore_state(struct bfin_sport_spi_master_data *drv_data) 252{ 253 struct bfin_sport_spi_slave_data *chip = drv_data->cur_chip; 254 255 bfin_sport_spi_disable(drv_data); 256 dev_dbg(drv_data->dev, "restoring spi ctl state\n"); 257 258 bfin_write(&drv_data->regs->tcr1, chip->ctl_reg); 259 bfin_write(&drv_data->regs->tclkdiv, chip->baud); 260 SSYNC(); 261 262 bfin_write(&drv_data->regs->rcr1, chip->ctl_reg & ~(ITCLK | ITFS)); 263 SSYNC(); 264 265 bfin_sport_spi_cs_active(chip); 266} 267 268/* test if there is more transfer to be done */ 269static enum bfin_sport_spi_state 270bfin_sport_spi_next_transfer(struct bfin_sport_spi_master_data *drv_data) 271{ 272 struct spi_message *msg = drv_data->cur_msg; 273 struct spi_transfer *trans = drv_data->cur_transfer; 274 275 /* Move to next transfer */ 276 if (trans->transfer_list.next != &msg->transfers) { 277 drv_data->cur_transfer = 278 list_entry(trans->transfer_list.next, 279 struct spi_transfer, transfer_list); 280 return RUNNING_STATE; 281 } 282 283 return DONE_STATE; 284} 285 286/* 287 * caller already set message->status; 288 * dma and pio irqs are blocked give finished message back 289 */ 290static void 291bfin_sport_spi_giveback(struct bfin_sport_spi_master_data *drv_data) 292{ 293 struct bfin_sport_spi_slave_data *chip = drv_data->cur_chip; 294 unsigned long flags; 295 struct spi_message *msg; 296 297 spin_lock_irqsave(&drv_data->lock, flags); 298 msg = drv_data->cur_msg; 299 drv_data->state = START_STATE; 300 drv_data->cur_msg = NULL; 301 drv_data->cur_transfer = NULL; 302 drv_data->cur_chip = NULL; 303 queue_work(drv_data->workqueue, &drv_data->pump_messages); 304 spin_unlock_irqrestore(&drv_data->lock, flags); 305 306 if (!drv_data->cs_change) 307 bfin_sport_spi_cs_deactive(chip); 308 309 if (msg->complete) 310 msg->complete(msg->context); 311} 312 313static irqreturn_t 314sport_err_handler(int irq, void *dev_id) 315{ 316 struct bfin_sport_spi_master_data *drv_data = dev_id; 317 u16 status; 318 319 dev_dbg(drv_data->dev, "%s enter\n", __func__); 320 status = bfin_read(&drv_data->regs->stat) & (TOVF | TUVF | ROVF | RUVF); 321 322 if (status) { 323 bfin_write(&drv_data->regs->stat, status); 324 SSYNC(); 325 326 bfin_sport_spi_disable(drv_data); 327 dev_err(drv_data->dev, "status error:%s%s%s%s\n", 328 status & TOVF ? " TOVF" : "", 329 status & TUVF ? " TUVF" : "", 330 status & ROVF ? " ROVF" : "", 331 status & RUVF ? " RUVF" : ""); 332 } 333 334 return IRQ_HANDLED; 335} 336 337static void 338bfin_sport_spi_pump_transfers(unsigned long data) 339{ 340 struct bfin_sport_spi_master_data *drv_data = (void *)data; 341 struct spi_message *message = NULL; 342 struct spi_transfer *transfer = NULL; 343 struct spi_transfer *previous = NULL; 344 struct bfin_sport_spi_slave_data *chip = NULL; 345 unsigned int bits_per_word; 346 u32 tranf_success = 1; 347 u32 transfer_speed; 348 u8 full_duplex = 0; 349 350 /* Get current state information */ 351 message = drv_data->cur_msg; 352 transfer = drv_data->cur_transfer; 353 chip = drv_data->cur_chip; 354 355 transfer_speed = bfin_sport_hz_to_spi_baud(transfer->speed_hz); 356 bfin_write(&drv_data->regs->tclkdiv, transfer_speed); 357 SSYNC(); 358 359 /* 360 * if msg is error or done, report it back using complete() callback 361 */ 362 363 /* Handle for abort */ 364 if (drv_data->state == ERROR_STATE) { 365 dev_dbg(drv_data->dev, "transfer: we've hit an error\n"); 366 message->status = -EIO; 367 bfin_sport_spi_giveback(drv_data); 368 return; 369 } 370 371 /* Handle end of message */ 372 if (drv_data->state == DONE_STATE) { 373 dev_dbg(drv_data->dev, "transfer: all done!\n"); 374 message->status = 0; 375 bfin_sport_spi_giveback(drv_data); 376 return; 377 } 378 379 /* Delay if requested at end of transfer */ 380 if (drv_data->state == RUNNING_STATE) { 381 dev_dbg(drv_data->dev, "transfer: still running ...\n"); 382 previous = list_entry(transfer->transfer_list.prev, 383 struct spi_transfer, transfer_list); 384 if (previous->delay_usecs) 385 udelay(previous->delay_usecs); 386 } 387 388 if (transfer->len == 0) { 389 /* Move to next transfer of this msg */ 390 drv_data->state = bfin_sport_spi_next_transfer(drv_data); 391 /* Schedule next transfer tasklet */ 392 tasklet_schedule(&drv_data->pump_transfers); 393 } 394 395 if (transfer->tx_buf != NULL) { 396 drv_data->tx = (void *)transfer->tx_buf; 397 drv_data->tx_end = drv_data->tx + transfer->len; 398 dev_dbg(drv_data->dev, "tx_buf is %p, tx_end is %p\n", 399 transfer->tx_buf, drv_data->tx_end); 400 } else 401 drv_data->tx = NULL; 402 403 if (transfer->rx_buf != NULL) { 404 full_duplex = transfer->tx_buf != NULL; 405 drv_data->rx = transfer->rx_buf; 406 drv_data->rx_end = drv_data->rx + transfer->len; 407 dev_dbg(drv_data->dev, "rx_buf is %p, rx_end is %p\n", 408 transfer->rx_buf, drv_data->rx_end); 409 } else 410 drv_data->rx = NULL; 411 412 drv_data->cs_change = transfer->cs_change; 413 414 /* Bits per word setup */ 415 bits_per_word = transfer->bits_per_word; 416 if (bits_per_word == 16) 417 drv_data->ops = &bfin_sport_transfer_ops_u16; 418 else 419 drv_data->ops = &bfin_sport_transfer_ops_u8; 420 bfin_write(&drv_data->regs->tcr2, bits_per_word - 1); 421 bfin_write(&drv_data->regs->tfsdiv, bits_per_word - 1); 422 bfin_write(&drv_data->regs->rcr2, bits_per_word - 1); 423 424 drv_data->state = RUNNING_STATE; 425 426 if (drv_data->cs_change) 427 bfin_sport_spi_cs_active(chip); 428 429 dev_dbg(drv_data->dev, 430 "now pumping a transfer: width is %d, len is %d\n", 431 bits_per_word, transfer->len); 432 433 /* PIO mode write then read */ 434 dev_dbg(drv_data->dev, "doing IO transfer\n"); 435 436 bfin_sport_spi_enable(drv_data); 437 if (full_duplex) { 438 /* full duplex mode */ 439 BUG_ON((drv_data->tx_end - drv_data->tx) != 440 (drv_data->rx_end - drv_data->rx)); 441 drv_data->ops->duplex(drv_data); 442 443 if (drv_data->tx != drv_data->tx_end) 444 tranf_success = 0; 445 } else if (drv_data->tx != NULL) { 446 /* write only half duplex */ 447 448 drv_data->ops->write(drv_data); 449 450 if (drv_data->tx != drv_data->tx_end) 451 tranf_success = 0; 452 } else if (drv_data->rx != NULL) { 453 /* read only half duplex */ 454 455 drv_data->ops->read(drv_data); 456 if (drv_data->rx != drv_data->rx_end) 457 tranf_success = 0; 458 } 459 bfin_sport_spi_disable(drv_data); 460 461 if (!tranf_success) { 462 dev_dbg(drv_data->dev, "IO write error!\n"); 463 drv_data->state = ERROR_STATE; 464 } else { 465 /* Update total byte transferred */ 466 message->actual_length += transfer->len; 467 /* Move to next transfer of this msg */ 468 drv_data->state = bfin_sport_spi_next_transfer(drv_data); 469 if (drv_data->cs_change) 470 bfin_sport_spi_cs_deactive(chip); 471 } 472 473 /* Schedule next transfer tasklet */ 474 tasklet_schedule(&drv_data->pump_transfers); 475} 476 477/* pop a msg from queue and kick off real transfer */ 478static void 479bfin_sport_spi_pump_messages(struct work_struct *work) 480{ 481 struct bfin_sport_spi_master_data *drv_data; 482 unsigned long flags; 483 struct spi_message *next_msg; 484 485 drv_data = container_of(work, struct bfin_sport_spi_master_data, pump_messages); 486 487 /* Lock queue and check for queue work */ 488 spin_lock_irqsave(&drv_data->lock, flags); 489 if (list_empty(&drv_data->queue) || !drv_data->run) { 490 /* pumper kicked off but no work to do */ 491 drv_data->busy = 0; 492 spin_unlock_irqrestore(&drv_data->lock, flags); 493 return; 494 } 495 496 /* Make sure we are not already running a message */ 497 if (drv_data->cur_msg) { 498 spin_unlock_irqrestore(&drv_data->lock, flags); 499 return; 500 } 501 502 /* Extract head of queue */ 503 next_msg = list_entry(drv_data->queue.next, 504 struct spi_message, queue); 505 506 drv_data->cur_msg = next_msg; 507 508 /* Setup the SSP using the per chip configuration */ 509 drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); 510 511 list_del_init(&drv_data->cur_msg->queue); 512 513 /* Initialize message state */ 514 drv_data->cur_msg->state = START_STATE; 515 drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, 516 struct spi_transfer, transfer_list); 517 bfin_sport_spi_restore_state(drv_data); 518 dev_dbg(drv_data->dev, "got a message to pump, " 519 "state is set to: baud %d, cs_gpio %i, ctl 0x%x\n", 520 drv_data->cur_chip->baud, drv_data->cur_chip->cs_gpio, 521 drv_data->cur_chip->ctl_reg); 522 523 dev_dbg(drv_data->dev, 524 "the first transfer len is %d\n", 525 drv_data->cur_transfer->len); 526 527 /* Mark as busy and launch transfers */ 528 tasklet_schedule(&drv_data->pump_transfers); 529 530 drv_data->busy = 1; 531 spin_unlock_irqrestore(&drv_data->lock, flags); 532} 533 534/* 535 * got a msg to transfer, queue it in drv_data->queue. 536 * And kick off message pumper 537 */ 538static int 539bfin_sport_spi_transfer(struct spi_device *spi, struct spi_message *msg) 540{ 541 struct bfin_sport_spi_master_data *drv_data = spi_master_get_devdata(spi->master); 542 unsigned long flags; 543 544 spin_lock_irqsave(&drv_data->lock, flags); 545 546 if (!drv_data->run) { 547 spin_unlock_irqrestore(&drv_data->lock, flags); 548 return -ESHUTDOWN; 549 } 550 551 msg->actual_length = 0; 552 msg->status = -EINPROGRESS; 553 msg->state = START_STATE; 554 555 dev_dbg(&spi->dev, "adding an msg in transfer()\n"); 556 list_add_tail(&msg->queue, &drv_data->queue); 557 558 if (drv_data->run && !drv_data->busy) 559 queue_work(drv_data->workqueue, &drv_data->pump_messages); 560 561 spin_unlock_irqrestore(&drv_data->lock, flags); 562 563 return 0; 564} 565 566/* Called every time common spi devices change state */ 567static int 568bfin_sport_spi_setup(struct spi_device *spi) 569{ 570 struct bfin_sport_spi_slave_data *chip, *first = NULL; 571 int ret; 572 573 /* Only alloc (or use chip_info) on first setup */ 574 chip = spi_get_ctldata(spi); 575 if (chip == NULL) { 576 struct bfin5xx_spi_chip *chip_info; 577 578 chip = first = kzalloc(sizeof(*chip), GFP_KERNEL); 579 if (!chip) 580 return -ENOMEM; 581 582 /* platform chip_info isn't required */ 583 chip_info = spi->controller_data; 584 if (chip_info) { 585 /* 586 * DITFS and TDTYPE are only thing we don't set, but 587 * they probably shouldn't be changed by people. 588 */ 589 if (chip_info->ctl_reg || chip_info->enable_dma) { 590 ret = -EINVAL; 591 dev_err(&spi->dev, "don't set ctl_reg/enable_dma fields\n"); 592 goto error; 593 } 594 chip->cs_chg_udelay = chip_info->cs_chg_udelay; 595 chip->idle_tx_val = chip_info->idle_tx_val; 596 } 597 } 598 599 /* translate common spi framework into our register 600 * following configure contents are same for tx and rx. 601 */ 602 603 if (spi->mode & SPI_CPHA) 604 chip->ctl_reg &= ~TCKFE; 605 else 606 chip->ctl_reg |= TCKFE; 607 608 if (spi->mode & SPI_LSB_FIRST) 609 chip->ctl_reg |= TLSBIT; 610 else 611 chip->ctl_reg &= ~TLSBIT; 612 613 /* Sport in master mode */ 614 chip->ctl_reg |= ITCLK | ITFS | TFSR | LATFS | LTFS; 615 616 chip->baud = bfin_sport_hz_to_spi_baud(spi->max_speed_hz); 617 618 chip->cs_gpio = spi->chip_select; 619 ret = gpio_request(chip->cs_gpio, spi->modalias); 620 if (ret) 621 goto error; 622 623 dev_dbg(&spi->dev, "setup spi chip %s, width is %d\n", 624 spi->modalias, spi->bits_per_word); 625 dev_dbg(&spi->dev, "ctl_reg is 0x%x, GPIO is %i\n", 626 chip->ctl_reg, spi->chip_select); 627 628 spi_set_ctldata(spi, chip); 629 630 bfin_sport_spi_cs_deactive(chip); 631 632 return ret; 633 634 error: 635 kfree(first); 636 return ret; 637} 638 639/* 640 * callback for spi framework. 641 * clean driver specific data 642 */ 643static void 644bfin_sport_spi_cleanup(struct spi_device *spi) 645{ 646 struct bfin_sport_spi_slave_data *chip = spi_get_ctldata(spi); 647 648 if (!chip) 649 return; 650 651 gpio_free(chip->cs_gpio); 652 653 kfree(chip); 654} 655 656static int 657bfin_sport_spi_init_queue(struct bfin_sport_spi_master_data *drv_data) 658{ 659 INIT_LIST_HEAD(&drv_data->queue); 660 spin_lock_init(&drv_data->lock); 661 662 drv_data->run = false; 663 drv_data->busy = 0; 664 665 /* init transfer tasklet */ 666 tasklet_init(&drv_data->pump_transfers, 667 bfin_sport_spi_pump_transfers, (unsigned long)drv_data); 668 669 /* init messages workqueue */ 670 INIT_WORK(&drv_data->pump_messages, bfin_sport_spi_pump_messages); 671 drv_data->workqueue = 672 create_singlethread_workqueue(dev_name(drv_data->master->dev.parent)); 673 if (drv_data->workqueue == NULL) 674 return -EBUSY; 675 676 return 0; 677} 678 679static int 680bfin_sport_spi_start_queue(struct bfin_sport_spi_master_data *drv_data) 681{ 682 unsigned long flags; 683 684 spin_lock_irqsave(&drv_data->lock, flags); 685 686 if (drv_data->run || drv_data->busy) { 687 spin_unlock_irqrestore(&drv_data->lock, flags); 688 return -EBUSY; 689 } 690 691 drv_data->run = true; 692 drv_data->cur_msg = NULL; 693 drv_data->cur_transfer = NULL; 694 drv_data->cur_chip = NULL; 695 spin_unlock_irqrestore(&drv_data->lock, flags); 696 697 queue_work(drv_data->workqueue, &drv_data->pump_messages); 698 699 return 0; 700} 701 702static inline int 703bfin_sport_spi_stop_queue(struct bfin_sport_spi_master_data *drv_data) 704{ 705 unsigned long flags; 706 unsigned limit = 500; 707 int status = 0; 708 709 spin_lock_irqsave(&drv_data->lock, flags); 710 711 /* 712 * This is a bit lame, but is optimized for the common execution path. 713 * A wait_queue on the drv_data->busy could be used, but then the common 714 * execution path (pump_messages) would be required to call wake_up or 715 * friends on every SPI message. Do this instead 716 */ 717 drv_data->run = false; 718 while (!list_empty(&drv_data->queue) && drv_data->busy && limit--) { 719 spin_unlock_irqrestore(&drv_data->lock, flags); 720 msleep(10); 721 spin_lock_irqsave(&drv_data->lock, flags); 722 } 723 724 if (!list_empty(&drv_data->queue) || drv_data->busy) 725 status = -EBUSY; 726 727 spin_unlock_irqrestore(&drv_data->lock, flags); 728 729 return status; 730} 731 732static inline int 733bfin_sport_spi_destroy_queue(struct bfin_sport_spi_master_data *drv_data) 734{ 735 int status; 736 737 status = bfin_sport_spi_stop_queue(drv_data); 738 if (status) 739 return status; 740 741 destroy_workqueue(drv_data->workqueue); 742 743 return 0; 744} 745 746static int bfin_sport_spi_probe(struct platform_device *pdev) 747{ 748 struct device *dev = &pdev->dev; 749 struct bfin5xx_spi_master *platform_info; 750 struct spi_master *master; 751 struct resource *res, *ires; 752 struct bfin_sport_spi_master_data *drv_data; 753 int status; 754 755 platform_info = dev_get_platdata(dev); 756 757 /* Allocate master with space for drv_data */ 758 master = spi_alloc_master(dev, sizeof(*master) + 16); 759 if (!master) { 760 dev_err(dev, "cannot alloc spi_master\n"); 761 return -ENOMEM; 762 } 763 764 drv_data = spi_master_get_devdata(master); 765 drv_data->master = master; 766 drv_data->dev = dev; 767 drv_data->pin_req = platform_info->pin_req; 768 769 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; 770 master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); 771 master->bus_num = pdev->id; 772 master->num_chipselect = platform_info->num_chipselect; 773 master->cleanup = bfin_sport_spi_cleanup; 774 master->setup = bfin_sport_spi_setup; 775 master->transfer = bfin_sport_spi_transfer; 776 777 /* Find and map our resources */ 778 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 779 if (res == NULL) { 780 dev_err(dev, "cannot get IORESOURCE_MEM\n"); 781 status = -ENOENT; 782 goto out_error_get_res; 783 } 784 785 drv_data->regs = ioremap(res->start, resource_size(res)); 786 if (drv_data->regs == NULL) { 787 dev_err(dev, "cannot map registers\n"); 788 status = -ENXIO; 789 goto out_error_ioremap; 790 } 791 792 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 793 if (!ires) { 794 dev_err(dev, "cannot get IORESOURCE_IRQ\n"); 795 status = -ENODEV; 796 goto out_error_get_ires; 797 } 798 drv_data->err_irq = ires->start; 799 800 /* Initial and start queue */ 801 status = bfin_sport_spi_init_queue(drv_data); 802 if (status) { 803 dev_err(dev, "problem initializing queue\n"); 804 goto out_error_queue_alloc; 805 } 806 807 status = bfin_sport_spi_start_queue(drv_data); 808 if (status) { 809 dev_err(dev, "problem starting queue\n"); 810 goto out_error_queue_alloc; 811 } 812 813 status = request_irq(drv_data->err_irq, sport_err_handler, 814 0, "sport_spi_err", drv_data); 815 if (status) { 816 dev_err(dev, "unable to request sport err irq\n"); 817 goto out_error_irq; 818 } 819 820 status = peripheral_request_list(drv_data->pin_req, DRV_NAME); 821 if (status) { 822 dev_err(dev, "requesting peripherals failed\n"); 823 goto out_error_peripheral; 824 } 825 826 /* Register with the SPI framework */ 827 platform_set_drvdata(pdev, drv_data); 828 status = spi_register_master(master); 829 if (status) { 830 dev_err(dev, "problem registering spi master\n"); 831 goto out_error_master; 832 } 833 834 dev_info(dev, "%s, regs_base@%p\n", DRV_DESC, drv_data->regs); 835 return 0; 836 837 out_error_master: 838 peripheral_free_list(drv_data->pin_req); 839 out_error_peripheral: 840 free_irq(drv_data->err_irq, drv_data); 841 out_error_irq: 842 out_error_queue_alloc: 843 bfin_sport_spi_destroy_queue(drv_data); 844 out_error_get_ires: 845 iounmap(drv_data->regs); 846 out_error_ioremap: 847 out_error_get_res: 848 spi_master_put(master); 849 850 return status; 851} 852 853/* stop hardware and remove the driver */ 854static int bfin_sport_spi_remove(struct platform_device *pdev) 855{ 856 struct bfin_sport_spi_master_data *drv_data = platform_get_drvdata(pdev); 857 int status = 0; 858 859 if (!drv_data) 860 return 0; 861 862 /* Remove the queue */ 863 status = bfin_sport_spi_destroy_queue(drv_data); 864 if (status) 865 return status; 866 867 /* Disable the SSP at the peripheral and SOC level */ 868 bfin_sport_spi_disable(drv_data); 869 870 /* Disconnect from the SPI framework */ 871 spi_unregister_master(drv_data->master); 872 873 peripheral_free_list(drv_data->pin_req); 874 875 return 0; 876} 877 878#ifdef CONFIG_PM_SLEEP 879static int bfin_sport_spi_suspend(struct device *dev) 880{ 881 struct bfin_sport_spi_master_data *drv_data = dev_get_drvdata(dev); 882 int status; 883 884 status = bfin_sport_spi_stop_queue(drv_data); 885 if (status) 886 return status; 887 888 /* stop hardware */ 889 bfin_sport_spi_disable(drv_data); 890 891 return status; 892} 893 894static int bfin_sport_spi_resume(struct device *dev) 895{ 896 struct bfin_sport_spi_master_data *drv_data = dev_get_drvdata(dev); 897 int status; 898 899 /* Enable the SPI interface */ 900 bfin_sport_spi_enable(drv_data); 901 902 /* Start the queue running */ 903 status = bfin_sport_spi_start_queue(drv_data); 904 if (status) 905 dev_err(drv_data->dev, "problem resuming queue\n"); 906 907 return status; 908} 909 910static SIMPLE_DEV_PM_OPS(bfin_sport_spi_pm_ops, bfin_sport_spi_suspend, 911 bfin_sport_spi_resume); 912 913#define BFIN_SPORT_SPI_PM_OPS (&bfin_sport_spi_pm_ops) 914#else 915#define BFIN_SPORT_SPI_PM_OPS NULL 916#endif 917 918static struct platform_driver bfin_sport_spi_driver = { 919 .driver = { 920 .name = DRV_NAME, 921 .pm = BFIN_SPORT_SPI_PM_OPS, 922 }, 923 .probe = bfin_sport_spi_probe, 924 .remove = bfin_sport_spi_remove, 925}; 926module_platform_driver(bfin_sport_spi_driver); 927