1/* 2******************************************************************************* 3** O.S : Linux 4** FILE NAME : arcmsr_hba.c 5** BY : Nick Cheng, C.L. Huang 6** Description: SCSI RAID Device Driver for Areca RAID Controller 7******************************************************************************* 8** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved 9** 10** Web site: www.areca.com.tw 11** E-mail: support@areca.com.tw 12** 13** This program is free software; you can redistribute it and/or modify 14** it under the terms of the GNU General Public License version 2 as 15** published by the Free Software Foundation. 16** This program is distributed in the hope that it will be useful, 17** but WITHOUT ANY WARRANTY; without even the implied warranty of 18** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19** GNU General Public License for more details. 20******************************************************************************* 21** Redistribution and use in source and binary forms, with or without 22** modification, are permitted provided that the following conditions 23** are met: 24** 1. Redistributions of source code must retain the above copyright 25** notice, this list of conditions and the following disclaimer. 26** 2. Redistributions in binary form must reproduce the above copyright 27** notice, this list of conditions and the following disclaimer in the 28** documentation and/or other materials provided with the distribution. 29** 3. The name of the author may not be used to endorse or promote products 30** derived from this software without specific prior written permission. 31** 32** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 33** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 34** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 35** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 36** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 37** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 38** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 39** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 40** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 41** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42******************************************************************************* 43** For history of changes, see Documentation/scsi/ChangeLog.arcmsr 44** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt 45******************************************************************************* 46*/ 47#include <linux/module.h> 48#include <linux/reboot.h> 49#include <linux/spinlock.h> 50#include <linux/pci_ids.h> 51#include <linux/interrupt.h> 52#include <linux/moduleparam.h> 53#include <linux/errno.h> 54#include <linux/types.h> 55#include <linux/delay.h> 56#include <linux/dma-mapping.h> 57#include <linux/timer.h> 58#include <linux/slab.h> 59#include <linux/pci.h> 60#include <linux/aer.h> 61#include <linux/circ_buf.h> 62#include <asm/dma.h> 63#include <asm/io.h> 64#include <asm/uaccess.h> 65#include <scsi/scsi_host.h> 66#include <scsi/scsi.h> 67#include <scsi/scsi_cmnd.h> 68#include <scsi/scsi_tcq.h> 69#include <scsi/scsi_device.h> 70#include <scsi/scsi_transport.h> 71#include <scsi/scsicam.h> 72#include "arcmsr.h" 73MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>"); 74MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver"); 75MODULE_LICENSE("Dual BSD/GPL"); 76MODULE_VERSION(ARCMSR_DRIVER_VERSION); 77 78#define ARCMSR_SLEEPTIME 10 79#define ARCMSR_RETRYCOUNT 12 80 81static wait_queue_head_t wait_q; 82static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 83 struct scsi_cmnd *cmd); 84static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 85static int arcmsr_abort(struct scsi_cmnd *); 86static int arcmsr_bus_reset(struct scsi_cmnd *); 87static int arcmsr_bios_param(struct scsi_device *sdev, 88 struct block_device *bdev, sector_t capacity, int *info); 89static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 90static int arcmsr_probe(struct pci_dev *pdev, 91 const struct pci_device_id *id); 92static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state); 93static int arcmsr_resume(struct pci_dev *pdev); 94static void arcmsr_remove(struct pci_dev *pdev); 95static void arcmsr_shutdown(struct pci_dev *pdev); 96static void arcmsr_iop_init(struct AdapterControlBlock *acb); 97static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); 98static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); 99static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 100 u32 intmask_org); 101static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 102static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb); 103static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb); 104static void arcmsr_request_device_map(unsigned long pacb); 105static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb); 106static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb); 107static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb); 108static void arcmsr_message_isr_bh_fn(struct work_struct *work); 109static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); 110static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 111static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB); 112static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb); 113static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); 114static const char *arcmsr_info(struct Scsi_Host *); 115static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); 116static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *); 117static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth) 118{ 119 if (queue_depth > ARCMSR_MAX_CMD_PERLUN) 120 queue_depth = ARCMSR_MAX_CMD_PERLUN; 121 return scsi_change_queue_depth(sdev, queue_depth); 122} 123 124static struct scsi_host_template arcmsr_scsi_host_template = { 125 .module = THIS_MODULE, 126 .name = "Areca SAS/SATA RAID driver", 127 .info = arcmsr_info, 128 .queuecommand = arcmsr_queue_command, 129 .eh_abort_handler = arcmsr_abort, 130 .eh_bus_reset_handler = arcmsr_bus_reset, 131 .bios_param = arcmsr_bios_param, 132 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 133 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD, 134 .this_id = ARCMSR_SCSI_INITIATOR_ID, 135 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, 136 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, 137 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 138 .use_clustering = ENABLE_CLUSTERING, 139 .shost_attrs = arcmsr_host_attrs, 140 .no_write_same = 1, 141}; 142 143static struct pci_device_id arcmsr_device_id_table[] = { 144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110), 145 .driver_data = ACB_ADAPTER_TYPE_A}, 146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120), 147 .driver_data = ACB_ADAPTER_TYPE_A}, 148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130), 149 .driver_data = ACB_ADAPTER_TYPE_A}, 150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160), 151 .driver_data = ACB_ADAPTER_TYPE_A}, 152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170), 153 .driver_data = ACB_ADAPTER_TYPE_A}, 154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200), 155 .driver_data = ACB_ADAPTER_TYPE_B}, 156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201), 157 .driver_data = ACB_ADAPTER_TYPE_B}, 158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202), 159 .driver_data = ACB_ADAPTER_TYPE_B}, 160 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210), 161 .driver_data = ACB_ADAPTER_TYPE_A}, 162 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214), 163 .driver_data = ACB_ADAPTER_TYPE_D}, 164 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220), 165 .driver_data = ACB_ADAPTER_TYPE_A}, 166 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230), 167 .driver_data = ACB_ADAPTER_TYPE_A}, 168 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260), 169 .driver_data = ACB_ADAPTER_TYPE_A}, 170 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270), 171 .driver_data = ACB_ADAPTER_TYPE_A}, 172 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280), 173 .driver_data = ACB_ADAPTER_TYPE_A}, 174 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380), 175 .driver_data = ACB_ADAPTER_TYPE_A}, 176 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381), 177 .driver_data = ACB_ADAPTER_TYPE_A}, 178 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680), 179 .driver_data = ACB_ADAPTER_TYPE_A}, 180 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681), 181 .driver_data = ACB_ADAPTER_TYPE_A}, 182 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880), 183 .driver_data = ACB_ADAPTER_TYPE_C}, 184 {0, 0}, /* Terminating entry */ 185}; 186MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 187 188static struct pci_driver arcmsr_pci_driver = { 189 .name = "arcmsr", 190 .id_table = arcmsr_device_id_table, 191 .probe = arcmsr_probe, 192 .remove = arcmsr_remove, 193 .suspend = arcmsr_suspend, 194 .resume = arcmsr_resume, 195 .shutdown = arcmsr_shutdown, 196}; 197/* 198**************************************************************************** 199**************************************************************************** 200*/ 201 202static void arcmsr_free_mu(struct AdapterControlBlock *acb) 203{ 204 switch (acb->adapter_type) { 205 case ACB_ADAPTER_TYPE_B: 206 case ACB_ADAPTER_TYPE_D: { 207 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize, 208 acb->dma_coherent2, acb->dma_coherent_handle2); 209 break; 210 } 211 } 212} 213 214static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) 215{ 216 struct pci_dev *pdev = acb->pdev; 217 switch (acb->adapter_type){ 218 case ACB_ADAPTER_TYPE_A:{ 219 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); 220 if (!acb->pmuA) { 221 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 222 return false; 223 } 224 break; 225 } 226 case ACB_ADAPTER_TYPE_B:{ 227 void __iomem *mem_base0, *mem_base1; 228 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 229 if (!mem_base0) { 230 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 231 return false; 232 } 233 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); 234 if (!mem_base1) { 235 iounmap(mem_base0); 236 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 237 return false; 238 } 239 acb->mem_base0 = mem_base0; 240 acb->mem_base1 = mem_base1; 241 break; 242 } 243 case ACB_ADAPTER_TYPE_C:{ 244 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); 245 if (!acb->pmuC) { 246 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 247 return false; 248 } 249 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 250 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ 251 return true; 252 } 253 break; 254 } 255 case ACB_ADAPTER_TYPE_D: { 256 void __iomem *mem_base0; 257 unsigned long addr, range, flags; 258 259 addr = (unsigned long)pci_resource_start(pdev, 0); 260 range = pci_resource_len(pdev, 0); 261 flags = pci_resource_flags(pdev, 0); 262 mem_base0 = ioremap(addr, range); 263 if (!mem_base0) { 264 pr_notice("arcmsr%d: memory mapping region fail\n", 265 acb->host->host_no); 266 return false; 267 } 268 acb->mem_base0 = mem_base0; 269 break; 270 } 271 } 272 return true; 273} 274 275static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) 276{ 277 switch (acb->adapter_type) { 278 case ACB_ADAPTER_TYPE_A:{ 279 iounmap(acb->pmuA); 280 } 281 break; 282 case ACB_ADAPTER_TYPE_B:{ 283 iounmap(acb->mem_base0); 284 iounmap(acb->mem_base1); 285 } 286 287 break; 288 case ACB_ADAPTER_TYPE_C:{ 289 iounmap(acb->pmuC); 290 } 291 break; 292 case ACB_ADAPTER_TYPE_D: 293 iounmap(acb->mem_base0); 294 break; 295 } 296} 297 298static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 299{ 300 irqreturn_t handle_state; 301 struct AdapterControlBlock *acb = dev_id; 302 303 handle_state = arcmsr_interrupt(acb); 304 return handle_state; 305} 306 307static int arcmsr_bios_param(struct scsi_device *sdev, 308 struct block_device *bdev, sector_t capacity, int *geom) 309{ 310 int ret, heads, sectors, cylinders, total_capacity; 311 unsigned char *buffer;/* return copy of block device's partition table */ 312 313 buffer = scsi_bios_ptable(bdev); 314 if (buffer) { 315 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); 316 kfree(buffer); 317 if (ret != -1) 318 return ret; 319 } 320 total_capacity = capacity; 321 heads = 64; 322 sectors = 32; 323 cylinders = total_capacity / (heads * sectors); 324 if (cylinders > 1024) { 325 heads = 255; 326 sectors = 63; 327 cylinders = total_capacity / (heads * sectors); 328 } 329 geom[0] = heads; 330 geom[1] = sectors; 331 geom[2] = cylinders; 332 return 0; 333} 334 335static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb) 336{ 337 struct MessageUnit_A __iomem *reg = acb->pmuA; 338 int i; 339 340 for (i = 0; i < 2000; i++) { 341 if (readl(®->outbound_intstatus) & 342 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 343 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, 344 ®->outbound_intstatus); 345 return true; 346 } 347 msleep(10); 348 } /* max 20 seconds */ 349 350 return false; 351} 352 353static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb) 354{ 355 struct MessageUnit_B *reg = acb->pmuB; 356 int i; 357 358 for (i = 0; i < 2000; i++) { 359 if (readl(reg->iop2drv_doorbell) 360 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 361 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, 362 reg->iop2drv_doorbell); 363 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, 364 reg->drv2iop_doorbell); 365 return true; 366 } 367 msleep(10); 368 } /* max 20 seconds */ 369 370 return false; 371} 372 373static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB) 374{ 375 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 376 int i; 377 378 for (i = 0; i < 2000; i++) { 379 if (readl(&phbcmu->outbound_doorbell) 380 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 381 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, 382 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/ 383 return true; 384 } 385 msleep(10); 386 } /* max 20 seconds */ 387 388 return false; 389} 390 391static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB) 392{ 393 struct MessageUnit_D *reg = pACB->pmuD; 394 int i; 395 396 for (i = 0; i < 2000; i++) { 397 if (readl(reg->outbound_doorbell) 398 & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) { 399 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, 400 reg->outbound_doorbell); 401 return true; 402 } 403 msleep(10); 404 } /* max 20 seconds */ 405 return false; 406} 407 408static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb) 409{ 410 struct MessageUnit_A __iomem *reg = acb->pmuA; 411 int retry_count = 30; 412 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 413 do { 414 if (arcmsr_hbaA_wait_msgint_ready(acb)) 415 break; 416 else { 417 retry_count--; 418 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 419 timeout, retry count down = %d \n", acb->host->host_no, retry_count); 420 } 421 } while (retry_count != 0); 422} 423 424static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb) 425{ 426 struct MessageUnit_B *reg = acb->pmuB; 427 int retry_count = 30; 428 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); 429 do { 430 if (arcmsr_hbaB_wait_msgint_ready(acb)) 431 break; 432 else { 433 retry_count--; 434 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 435 timeout,retry count down = %d \n", acb->host->host_no, retry_count); 436 } 437 } while (retry_count != 0); 438} 439 440static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB) 441{ 442 struct MessageUnit_C __iomem *reg = pACB->pmuC; 443 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 444 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 445 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 446 do { 447 if (arcmsr_hbaC_wait_msgint_ready(pACB)) { 448 break; 449 } else { 450 retry_count--; 451 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 452 timeout,retry count down = %d \n", pACB->host->host_no, retry_count); 453 } 454 } while (retry_count != 0); 455 return; 456} 457 458static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB) 459{ 460 int retry_count = 15; 461 struct MessageUnit_D *reg = pACB->pmuD; 462 463 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0); 464 do { 465 if (arcmsr_hbaD_wait_msgint_ready(pACB)) 466 break; 467 468 retry_count--; 469 pr_notice("arcmsr%d: wait 'flush adapter " 470 "cache' timeout, retry count down = %d\n", 471 pACB->host->host_no, retry_count); 472 } while (retry_count != 0); 473} 474 475static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 476{ 477 switch (acb->adapter_type) { 478 479 case ACB_ADAPTER_TYPE_A: { 480 arcmsr_hbaA_flush_cache(acb); 481 } 482 break; 483 484 case ACB_ADAPTER_TYPE_B: { 485 arcmsr_hbaB_flush_cache(acb); 486 } 487 break; 488 case ACB_ADAPTER_TYPE_C: { 489 arcmsr_hbaC_flush_cache(acb); 490 } 491 break; 492 case ACB_ADAPTER_TYPE_D: 493 arcmsr_hbaD_flush_cache(acb); 494 break; 495 } 496} 497 498static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 499{ 500 struct pci_dev *pdev = acb->pdev; 501 void *dma_coherent; 502 dma_addr_t dma_coherent_handle; 503 struct CommandControlBlock *ccb_tmp; 504 int i = 0, j = 0; 505 dma_addr_t cdb_phyaddr; 506 unsigned long roundup_ccbsize; 507 unsigned long max_xfer_len; 508 unsigned long max_sg_entrys; 509 uint32_t firm_config_version; 510 511 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 512 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 513 acb->devstate[i][j] = ARECA_RAID_GONE; 514 515 max_xfer_len = ARCMSR_MAX_XFER_LEN; 516 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; 517 firm_config_version = acb->firm_cfg_version; 518 if((firm_config_version & 0xFF) >= 3){ 519 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ 520 max_sg_entrys = (max_xfer_len/4096); 521 } 522 acb->host->max_sectors = max_xfer_len/512; 523 acb->host->sg_tablesize = max_sg_entrys; 524 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32); 525 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM; 526 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); 527 if(!dma_coherent){ 528 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no); 529 return -ENOMEM; 530 } 531 acb->dma_coherent = dma_coherent; 532 acb->dma_coherent_handle = dma_coherent_handle; 533 memset(dma_coherent, 0, acb->uncache_size); 534 ccb_tmp = dma_coherent; 535 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; 536 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ 537 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); 538 switch (acb->adapter_type) { 539 case ACB_ADAPTER_TYPE_A: 540 case ACB_ADAPTER_TYPE_B: 541 ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5; 542 break; 543 case ACB_ADAPTER_TYPE_C: 544 case ACB_ADAPTER_TYPE_D: 545 ccb_tmp->cdb_phyaddr = cdb_phyaddr; 546 break; 547 } 548 acb->pccb_pool[i] = ccb_tmp; 549 ccb_tmp->acb = acb; 550 INIT_LIST_HEAD(&ccb_tmp->list); 551 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 552 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); 553 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; 554 } 555 return 0; 556} 557 558static void arcmsr_message_isr_bh_fn(struct work_struct *work) 559{ 560 struct AdapterControlBlock *acb = container_of(work, 561 struct AdapterControlBlock, arcmsr_do_message_isr_bh); 562 char *acb_dev_map = (char *)acb->device_map; 563 uint32_t __iomem *signature = NULL; 564 char __iomem *devicemap = NULL; 565 int target, lun; 566 struct scsi_device *psdev; 567 char diff, temp; 568 569 switch (acb->adapter_type) { 570 case ACB_ADAPTER_TYPE_A: { 571 struct MessageUnit_A __iomem *reg = acb->pmuA; 572 573 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]); 574 devicemap = (char __iomem *)(®->message_rwbuffer[21]); 575 break; 576 } 577 case ACB_ADAPTER_TYPE_B: { 578 struct MessageUnit_B *reg = acb->pmuB; 579 580 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]); 581 devicemap = (char __iomem *)(®->message_rwbuffer[21]); 582 break; 583 } 584 case ACB_ADAPTER_TYPE_C: { 585 struct MessageUnit_C __iomem *reg = acb->pmuC; 586 587 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 588 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 589 break; 590 } 591 case ACB_ADAPTER_TYPE_D: { 592 struct MessageUnit_D *reg = acb->pmuD; 593 594 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 595 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 596 break; 597 } 598 } 599 atomic_inc(&acb->rq_map_token); 600 if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG) 601 return; 602 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; 603 target++) { 604 temp = readb(devicemap); 605 diff = (*acb_dev_map) ^ temp; 606 if (diff != 0) { 607 *acb_dev_map = temp; 608 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; 609 lun++) { 610 if ((diff & 0x01) == 1 && 611 (temp & 0x01) == 1) { 612 scsi_add_device(acb->host, 613 0, target, lun); 614 } else if ((diff & 0x01) == 1 615 && (temp & 0x01) == 0) { 616 psdev = scsi_device_lookup(acb->host, 617 0, target, lun); 618 if (psdev != NULL) { 619 scsi_remove_device(psdev); 620 scsi_device_put(psdev); 621 } 622 } 623 temp >>= 1; 624 diff >>= 1; 625 } 626 } 627 devicemap++; 628 acb_dev_map++; 629 } 630} 631 632static int 633arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb) 634{ 635 int i, j, r; 636 struct msix_entry entries[ARCMST_NUM_MSIX_VECTORS]; 637 638 for (i = 0; i < ARCMST_NUM_MSIX_VECTORS; i++) 639 entries[i].entry = i; 640 r = pci_enable_msix_range(pdev, entries, 1, ARCMST_NUM_MSIX_VECTORS); 641 if (r < 0) 642 goto msi_int; 643 acb->msix_vector_count = r; 644 for (i = 0; i < r; i++) { 645 if (request_irq(entries[i].vector, 646 arcmsr_do_interrupt, 0, "arcmsr", acb)) { 647 pr_warn("arcmsr%d: request_irq =%d failed!\n", 648 acb->host->host_no, entries[i].vector); 649 for (j = 0 ; j < i ; j++) 650 free_irq(entries[j].vector, acb); 651 pci_disable_msix(pdev); 652 goto msi_int; 653 } 654 acb->entries[i] = entries[i]; 655 } 656 acb->acb_flags |= ACB_F_MSIX_ENABLED; 657 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no); 658 return SUCCESS; 659msi_int: 660 if (pci_enable_msi_exact(pdev, 1) < 0) 661 goto legacy_int; 662 if (request_irq(pdev->irq, arcmsr_do_interrupt, 663 IRQF_SHARED, "arcmsr", acb)) { 664 pr_warn("arcmsr%d: request_irq =%d failed!\n", 665 acb->host->host_no, pdev->irq); 666 pci_disable_msi(pdev); 667 goto legacy_int; 668 } 669 acb->acb_flags |= ACB_F_MSI_ENABLED; 670 pr_info("arcmsr%d: msi enabled\n", acb->host->host_no); 671 return SUCCESS; 672legacy_int: 673 if (request_irq(pdev->irq, arcmsr_do_interrupt, 674 IRQF_SHARED, "arcmsr", acb)) { 675 pr_warn("arcmsr%d: request_irq = %d failed!\n", 676 acb->host->host_no, pdev->irq); 677 return FAILED; 678 } 679 return SUCCESS; 680} 681 682static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) 683{ 684 struct Scsi_Host *host; 685 struct AdapterControlBlock *acb; 686 uint8_t bus,dev_fun; 687 int error; 688 error = pci_enable_device(pdev); 689 if(error){ 690 return -ENODEV; 691 } 692 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); 693 if(!host){ 694 goto pci_disable_dev; 695 } 696 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 697 if(error){ 698 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 699 if(error){ 700 printk(KERN_WARNING 701 "scsi%d: No suitable DMA mask available\n", 702 host->host_no); 703 goto scsi_host_release; 704 } 705 } 706 init_waitqueue_head(&wait_q); 707 bus = pdev->bus->number; 708 dev_fun = pdev->devfn; 709 acb = (struct AdapterControlBlock *) host->hostdata; 710 memset(acb,0,sizeof(struct AdapterControlBlock)); 711 acb->pdev = pdev; 712 acb->host = host; 713 host->max_lun = ARCMSR_MAX_TARGETLUN; 714 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ 715 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ 716 host->can_queue = ARCMSR_MAX_OUTSTANDING_CMD; 717 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 718 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 719 host->unique_id = (bus << 8) | dev_fun; 720 pci_set_drvdata(pdev, host); 721 pci_set_master(pdev); 722 error = pci_request_regions(pdev, "arcmsr"); 723 if(error){ 724 goto scsi_host_release; 725 } 726 spin_lock_init(&acb->eh_lock); 727 spin_lock_init(&acb->ccblist_lock); 728 spin_lock_init(&acb->postq_lock); 729 spin_lock_init(&acb->doneq_lock); 730 spin_lock_init(&acb->rqbuffer_lock); 731 spin_lock_init(&acb->wqbuffer_lock); 732 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 733 ACB_F_MESSAGE_RQBUFFER_CLEARED | 734 ACB_F_MESSAGE_WQBUFFER_READED); 735 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 736 INIT_LIST_HEAD(&acb->ccb_free_list); 737 acb->adapter_type = id->driver_data; 738 error = arcmsr_remap_pciregion(acb); 739 if(!error){ 740 goto pci_release_regs; 741 } 742 error = arcmsr_get_firmware_spec(acb); 743 if(!error){ 744 goto unmap_pci_region; 745 } 746 error = arcmsr_alloc_ccb_pool(acb); 747 if(error){ 748 goto free_hbb_mu; 749 } 750 error = scsi_add_host(host, &pdev->dev); 751 if(error){ 752 goto free_ccb_pool; 753 } 754 if (arcmsr_request_irq(pdev, acb) == FAILED) 755 goto scsi_host_remove; 756 arcmsr_iop_init(acb); 757 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 758 atomic_set(&acb->rq_map_token, 16); 759 atomic_set(&acb->ante_token_value, 16); 760 acb->fw_flag = FW_NORMAL; 761 init_timer(&acb->eternal_timer); 762 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 763 acb->eternal_timer.data = (unsigned long) acb; 764 acb->eternal_timer.function = &arcmsr_request_device_map; 765 add_timer(&acb->eternal_timer); 766 if(arcmsr_alloc_sysfs_attr(acb)) 767 goto out_free_sysfs; 768 scsi_scan_host(host); 769 return 0; 770out_free_sysfs: 771 del_timer_sync(&acb->eternal_timer); 772 flush_work(&acb->arcmsr_do_message_isr_bh); 773 arcmsr_stop_adapter_bgrb(acb); 774 arcmsr_flush_adapter_cache(acb); 775 arcmsr_free_irq(pdev, acb); 776scsi_host_remove: 777 scsi_remove_host(host); 778free_ccb_pool: 779 arcmsr_free_ccb_pool(acb); 780free_hbb_mu: 781 arcmsr_free_mu(acb); 782unmap_pci_region: 783 arcmsr_unmap_pciregion(acb); 784pci_release_regs: 785 pci_release_regions(pdev); 786scsi_host_release: 787 scsi_host_put(host); 788pci_disable_dev: 789 pci_disable_device(pdev); 790 return -ENODEV; 791} 792 793static void arcmsr_free_irq(struct pci_dev *pdev, 794 struct AdapterControlBlock *acb) 795{ 796 int i; 797 798 if (acb->acb_flags & ACB_F_MSI_ENABLED) { 799 free_irq(pdev->irq, acb); 800 pci_disable_msi(pdev); 801 } else if (acb->acb_flags & ACB_F_MSIX_ENABLED) { 802 for (i = 0; i < acb->msix_vector_count; i++) 803 free_irq(acb->entries[i].vector, acb); 804 pci_disable_msix(pdev); 805 } else 806 free_irq(pdev->irq, acb); 807} 808 809static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state) 810{ 811 uint32_t intmask_org; 812 struct Scsi_Host *host = pci_get_drvdata(pdev); 813 struct AdapterControlBlock *acb = 814 (struct AdapterControlBlock *)host->hostdata; 815 816 intmask_org = arcmsr_disable_outbound_ints(acb); 817 arcmsr_free_irq(pdev, acb); 818 del_timer_sync(&acb->eternal_timer); 819 flush_work(&acb->arcmsr_do_message_isr_bh); 820 arcmsr_stop_adapter_bgrb(acb); 821 arcmsr_flush_adapter_cache(acb); 822 pci_set_drvdata(pdev, host); 823 pci_save_state(pdev); 824 pci_disable_device(pdev); 825 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 826 return 0; 827} 828 829static int arcmsr_resume(struct pci_dev *pdev) 830{ 831 int error; 832 struct Scsi_Host *host = pci_get_drvdata(pdev); 833 struct AdapterControlBlock *acb = 834 (struct AdapterControlBlock *)host->hostdata; 835 836 pci_set_power_state(pdev, PCI_D0); 837 pci_enable_wake(pdev, PCI_D0, 0); 838 pci_restore_state(pdev); 839 if (pci_enable_device(pdev)) { 840 pr_warn("%s: pci_enable_device error\n", __func__); 841 return -ENODEV; 842 } 843 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 844 if (error) { 845 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 846 if (error) { 847 pr_warn("scsi%d: No suitable DMA mask available\n", 848 host->host_no); 849 goto controller_unregister; 850 } 851 } 852 pci_set_master(pdev); 853 if (arcmsr_request_irq(pdev, acb) == FAILED) 854 goto controller_stop; 855 arcmsr_iop_init(acb); 856 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 857 atomic_set(&acb->rq_map_token, 16); 858 atomic_set(&acb->ante_token_value, 16); 859 acb->fw_flag = FW_NORMAL; 860 init_timer(&acb->eternal_timer); 861 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 862 acb->eternal_timer.data = (unsigned long) acb; 863 acb->eternal_timer.function = &arcmsr_request_device_map; 864 add_timer(&acb->eternal_timer); 865 return 0; 866controller_stop: 867 arcmsr_stop_adapter_bgrb(acb); 868 arcmsr_flush_adapter_cache(acb); 869controller_unregister: 870 scsi_remove_host(host); 871 arcmsr_free_ccb_pool(acb); 872 arcmsr_unmap_pciregion(acb); 873 pci_release_regions(pdev); 874 scsi_host_put(host); 875 pci_disable_device(pdev); 876 return -ENODEV; 877} 878 879static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb) 880{ 881 struct MessageUnit_A __iomem *reg = acb->pmuA; 882 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 883 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 884 printk(KERN_NOTICE 885 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 886 , acb->host->host_no); 887 return false; 888 } 889 return true; 890} 891 892static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb) 893{ 894 struct MessageUnit_B *reg = acb->pmuB; 895 896 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); 897 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 898 printk(KERN_NOTICE 899 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 900 , acb->host->host_no); 901 return false; 902 } 903 return true; 904} 905static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB) 906{ 907 struct MessageUnit_C __iomem *reg = pACB->pmuC; 908 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 909 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 910 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 911 printk(KERN_NOTICE 912 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 913 , pACB->host->host_no); 914 return false; 915 } 916 return true; 917} 918 919static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB) 920{ 921 struct MessageUnit_D *reg = pACB->pmuD; 922 923 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0); 924 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) { 925 pr_notice("arcmsr%d: wait 'abort all outstanding " 926 "command' timeout\n", pACB->host->host_no); 927 return false; 928 } 929 return true; 930} 931 932static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 933{ 934 uint8_t rtnval = 0; 935 switch (acb->adapter_type) { 936 case ACB_ADAPTER_TYPE_A: { 937 rtnval = arcmsr_hbaA_abort_allcmd(acb); 938 } 939 break; 940 941 case ACB_ADAPTER_TYPE_B: { 942 rtnval = arcmsr_hbaB_abort_allcmd(acb); 943 } 944 break; 945 946 case ACB_ADAPTER_TYPE_C: { 947 rtnval = arcmsr_hbaC_abort_allcmd(acb); 948 } 949 break; 950 951 case ACB_ADAPTER_TYPE_D: 952 rtnval = arcmsr_hbaD_abort_allcmd(acb); 953 break; 954 } 955 return rtnval; 956} 957 958static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 959{ 960 struct scsi_cmnd *pcmd = ccb->pcmd; 961 962 scsi_dma_unmap(pcmd); 963} 964 965static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) 966{ 967 struct AdapterControlBlock *acb = ccb->acb; 968 struct scsi_cmnd *pcmd = ccb->pcmd; 969 unsigned long flags; 970 atomic_dec(&acb->ccboutstandingcount); 971 arcmsr_pci_unmap_dma(ccb); 972 ccb->startdone = ARCMSR_CCB_DONE; 973 spin_lock_irqsave(&acb->ccblist_lock, flags); 974 list_add_tail(&ccb->list, &acb->ccb_free_list); 975 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 976 pcmd->scsi_done(pcmd); 977} 978 979static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 980{ 981 982 struct scsi_cmnd *pcmd = ccb->pcmd; 983 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; 984 pcmd->result = DID_OK << 16; 985 if (sensebuffer) { 986 int sense_data_length = 987 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE 988 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; 989 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); 990 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); 991 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 992 sensebuffer->Valid = 1; 993 } 994} 995 996static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) 997{ 998 u32 orig_mask = 0; 999 switch (acb->adapter_type) { 1000 case ACB_ADAPTER_TYPE_A : { 1001 struct MessageUnit_A __iomem *reg = acb->pmuA; 1002 orig_mask = readl(®->outbound_intmask); 1003 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ 1004 ®->outbound_intmask); 1005 } 1006 break; 1007 case ACB_ADAPTER_TYPE_B : { 1008 struct MessageUnit_B *reg = acb->pmuB; 1009 orig_mask = readl(reg->iop2drv_doorbell_mask); 1010 writel(0, reg->iop2drv_doorbell_mask); 1011 } 1012 break; 1013 case ACB_ADAPTER_TYPE_C:{ 1014 struct MessageUnit_C __iomem *reg = acb->pmuC; 1015 /* disable all outbound interrupt */ 1016 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ 1017 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 1018 } 1019 break; 1020 case ACB_ADAPTER_TYPE_D: { 1021 struct MessageUnit_D *reg = acb->pmuD; 1022 /* disable all outbound interrupt */ 1023 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable); 1024 } 1025 break; 1026 } 1027 return orig_mask; 1028} 1029 1030static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, 1031 struct CommandControlBlock *ccb, bool error) 1032{ 1033 uint8_t id, lun; 1034 id = ccb->pcmd->device->id; 1035 lun = ccb->pcmd->device->lun; 1036 if (!error) { 1037 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 1038 acb->devstate[id][lun] = ARECA_RAID_GOOD; 1039 ccb->pcmd->result = DID_OK << 16; 1040 arcmsr_ccb_complete(ccb); 1041 }else{ 1042 switch (ccb->arcmsr_cdb.DeviceStatus) { 1043 case ARCMSR_DEV_SELECT_TIMEOUT: { 1044 acb->devstate[id][lun] = ARECA_RAID_GONE; 1045 ccb->pcmd->result = DID_NO_CONNECT << 16; 1046 arcmsr_ccb_complete(ccb); 1047 } 1048 break; 1049 1050 case ARCMSR_DEV_ABORTED: 1051 1052 case ARCMSR_DEV_INIT_FAIL: { 1053 acb->devstate[id][lun] = ARECA_RAID_GONE; 1054 ccb->pcmd->result = DID_BAD_TARGET << 16; 1055 arcmsr_ccb_complete(ccb); 1056 } 1057 break; 1058 1059 case ARCMSR_DEV_CHECK_CONDITION: { 1060 acb->devstate[id][lun] = ARECA_RAID_GOOD; 1061 arcmsr_report_sense_info(ccb); 1062 arcmsr_ccb_complete(ccb); 1063 } 1064 break; 1065 1066 default: 1067 printk(KERN_NOTICE 1068 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ 1069 but got unknown DeviceStatus = 0x%x \n" 1070 , acb->host->host_no 1071 , id 1072 , lun 1073 , ccb->arcmsr_cdb.DeviceStatus); 1074 acb->devstate[id][lun] = ARECA_RAID_GONE; 1075 ccb->pcmd->result = DID_NO_CONNECT << 16; 1076 arcmsr_ccb_complete(ccb); 1077 break; 1078 } 1079 } 1080} 1081 1082static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) 1083{ 1084 int id, lun; 1085 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 1086 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 1087 struct scsi_cmnd *abortcmd = pCCB->pcmd; 1088 if (abortcmd) { 1089 id = abortcmd->device->id; 1090 lun = abortcmd->device->lun; 1091 abortcmd->result |= DID_ABORT << 16; 1092 arcmsr_ccb_complete(pCCB); 1093 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", 1094 acb->host->host_no, pCCB); 1095 } 1096 return; 1097 } 1098 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ 1099 done acb = '0x%p'" 1100 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" 1101 " ccboutstandingcount = %d \n" 1102 , acb->host->host_no 1103 , acb 1104 , pCCB 1105 , pCCB->acb 1106 , pCCB->startdone 1107 , atomic_read(&acb->ccboutstandingcount)); 1108 return; 1109 } 1110 arcmsr_report_ccb_state(acb, pCCB, error); 1111} 1112 1113static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) 1114{ 1115 int i = 0; 1116 uint32_t flag_ccb, ccb_cdb_phy; 1117 struct ARCMSR_CDB *pARCMSR_CDB; 1118 bool error; 1119 struct CommandControlBlock *pCCB; 1120 switch (acb->adapter_type) { 1121 1122 case ACB_ADAPTER_TYPE_A: { 1123 struct MessageUnit_A __iomem *reg = acb->pmuA; 1124 uint32_t outbound_intstatus; 1125 outbound_intstatus = readl(®->outbound_intstatus) & 1126 acb->outbound_int_enable; 1127 /*clear and abort all outbound posted Q*/ 1128 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 1129 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) 1130 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1131 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1132 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1133 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1134 arcmsr_drain_donequeue(acb, pCCB, error); 1135 } 1136 } 1137 break; 1138 1139 case ACB_ADAPTER_TYPE_B: { 1140 struct MessageUnit_B *reg = acb->pmuB; 1141 /*clear all outbound posted Q*/ 1142 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */ 1143 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 1144 flag_ccb = reg->done_qbuffer[i]; 1145 if (flag_ccb != 0) { 1146 reg->done_qbuffer[i] = 0; 1147 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1148 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1149 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1150 arcmsr_drain_donequeue(acb, pCCB, error); 1151 } 1152 reg->post_qbuffer[i] = 0; 1153 } 1154 reg->doneq_index = 0; 1155 reg->postq_index = 0; 1156 } 1157 break; 1158 case ACB_ADAPTER_TYPE_C: { 1159 struct MessageUnit_C __iomem *reg = acb->pmuC; 1160 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1161 /*need to do*/ 1162 flag_ccb = readl(®->outbound_queueport_low); 1163 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 1164 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 1165 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1166 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1167 arcmsr_drain_donequeue(acb, pCCB, error); 1168 } 1169 } 1170 break; 1171 case ACB_ADAPTER_TYPE_D: { 1172 struct MessageUnit_D *pmu = acb->pmuD; 1173 uint32_t outbound_write_pointer; 1174 uint32_t doneq_index, index_stripped, addressLow, residual, toggle; 1175 unsigned long flags; 1176 1177 residual = atomic_read(&acb->ccboutstandingcount); 1178 for (i = 0; i < residual; i++) { 1179 spin_lock_irqsave(&acb->doneq_lock, flags); 1180 outbound_write_pointer = 1181 pmu->done_qbuffer[0].addressLow + 1; 1182 doneq_index = pmu->doneq_index; 1183 if ((doneq_index & 0xFFF) != 1184 (outbound_write_pointer & 0xFFF)) { 1185 toggle = doneq_index & 0x4000; 1186 index_stripped = (doneq_index & 0xFFF) + 1; 1187 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 1188 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 1189 ((toggle ^ 0x4000) + 1); 1190 doneq_index = pmu->doneq_index; 1191 spin_unlock_irqrestore(&acb->doneq_lock, flags); 1192 addressLow = pmu->done_qbuffer[doneq_index & 1193 0xFFF].addressLow; 1194 ccb_cdb_phy = (addressLow & 0xFFFFFFF0); 1195 pARCMSR_CDB = (struct ARCMSR_CDB *) 1196 (acb->vir2phy_offset + ccb_cdb_phy); 1197 pCCB = container_of(pARCMSR_CDB, 1198 struct CommandControlBlock, arcmsr_cdb); 1199 error = (addressLow & 1200 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? 1201 true : false; 1202 arcmsr_drain_donequeue(acb, pCCB, error); 1203 writel(doneq_index, 1204 pmu->outboundlist_read_pointer); 1205 } else { 1206 spin_unlock_irqrestore(&acb->doneq_lock, flags); 1207 mdelay(10); 1208 } 1209 } 1210 pmu->postq_index = 0; 1211 pmu->doneq_index = 0x40FF; 1212 } 1213 break; 1214 } 1215} 1216 1217static void arcmsr_remove(struct pci_dev *pdev) 1218{ 1219 struct Scsi_Host *host = pci_get_drvdata(pdev); 1220 struct AdapterControlBlock *acb = 1221 (struct AdapterControlBlock *) host->hostdata; 1222 int poll_count = 0; 1223 arcmsr_free_sysfs_attr(acb); 1224 scsi_remove_host(host); 1225 flush_work(&acb->arcmsr_do_message_isr_bh); 1226 del_timer_sync(&acb->eternal_timer); 1227 arcmsr_disable_outbound_ints(acb); 1228 arcmsr_stop_adapter_bgrb(acb); 1229 arcmsr_flush_adapter_cache(acb); 1230 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 1231 acb->acb_flags &= ~ACB_F_IOP_INITED; 1232 1233 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ 1234 if (!atomic_read(&acb->ccboutstandingcount)) 1235 break; 1236 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 1237 msleep(25); 1238 } 1239 1240 if (atomic_read(&acb->ccboutstandingcount)) { 1241 int i; 1242 1243 arcmsr_abort_allcmd(acb); 1244 arcmsr_done4abort_postqueue(acb); 1245 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 1246 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 1247 if (ccb->startdone == ARCMSR_CCB_START) { 1248 ccb->startdone = ARCMSR_CCB_ABORTED; 1249 ccb->pcmd->result = DID_ABORT << 16; 1250 arcmsr_ccb_complete(ccb); 1251 } 1252 } 1253 } 1254 arcmsr_free_irq(pdev, acb); 1255 arcmsr_free_ccb_pool(acb); 1256 arcmsr_free_mu(acb); 1257 arcmsr_unmap_pciregion(acb); 1258 pci_release_regions(pdev); 1259 scsi_host_put(host); 1260 pci_disable_device(pdev); 1261} 1262 1263static void arcmsr_shutdown(struct pci_dev *pdev) 1264{ 1265 struct Scsi_Host *host = pci_get_drvdata(pdev); 1266 struct AdapterControlBlock *acb = 1267 (struct AdapterControlBlock *)host->hostdata; 1268 del_timer_sync(&acb->eternal_timer); 1269 arcmsr_disable_outbound_ints(acb); 1270 arcmsr_free_irq(pdev, acb); 1271 flush_work(&acb->arcmsr_do_message_isr_bh); 1272 arcmsr_stop_adapter_bgrb(acb); 1273 arcmsr_flush_adapter_cache(acb); 1274} 1275 1276static int arcmsr_module_init(void) 1277{ 1278 int error = 0; 1279 error = pci_register_driver(&arcmsr_pci_driver); 1280 return error; 1281} 1282 1283static void arcmsr_module_exit(void) 1284{ 1285 pci_unregister_driver(&arcmsr_pci_driver); 1286} 1287module_init(arcmsr_module_init); 1288module_exit(arcmsr_module_exit); 1289 1290static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 1291 u32 intmask_org) 1292{ 1293 u32 mask; 1294 switch (acb->adapter_type) { 1295 1296 case ACB_ADAPTER_TYPE_A: { 1297 struct MessageUnit_A __iomem *reg = acb->pmuA; 1298 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | 1299 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| 1300 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1301 writel(mask, ®->outbound_intmask); 1302 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1303 } 1304 break; 1305 1306 case ACB_ADAPTER_TYPE_B: { 1307 struct MessageUnit_B *reg = acb->pmuB; 1308 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | 1309 ARCMSR_IOP2DRV_DATA_READ_OK | 1310 ARCMSR_IOP2DRV_CDB_DONE | 1311 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 1312 writel(mask, reg->iop2drv_doorbell_mask); 1313 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 1314 } 1315 break; 1316 case ACB_ADAPTER_TYPE_C: { 1317 struct MessageUnit_C __iomem *reg = acb->pmuC; 1318 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); 1319 writel(intmask_org & mask, ®->host_int_mask); 1320 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 1321 } 1322 break; 1323 case ACB_ADAPTER_TYPE_D: { 1324 struct MessageUnit_D *reg = acb->pmuD; 1325 1326 mask = ARCMSR_ARC1214_ALL_INT_ENABLE; 1327 writel(intmask_org | mask, reg->pcief0_int_enable); 1328 break; 1329 } 1330 } 1331} 1332 1333static int arcmsr_build_ccb(struct AdapterControlBlock *acb, 1334 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) 1335{ 1336 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1337 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 1338 __le32 address_lo, address_hi; 1339 int arccdbsize = 0x30; 1340 __le32 length = 0; 1341 int i; 1342 struct scatterlist *sg; 1343 int nseg; 1344 ccb->pcmd = pcmd; 1345 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 1346 arcmsr_cdb->TargetID = pcmd->device->id; 1347 arcmsr_cdb->LUN = pcmd->device->lun; 1348 arcmsr_cdb->Function = 1; 1349 arcmsr_cdb->msgContext = 0; 1350 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 1351 1352 nseg = scsi_dma_map(pcmd); 1353 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0)) 1354 return FAILED; 1355 scsi_for_each_sg(pcmd, sg, nseg, i) { 1356 /* Get the physical address of the current data pointer */ 1357 length = cpu_to_le32(sg_dma_len(sg)); 1358 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); 1359 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); 1360 if (address_hi == 0) { 1361 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; 1362 1363 pdma_sg->address = address_lo; 1364 pdma_sg->length = length; 1365 psge += sizeof (struct SG32ENTRY); 1366 arccdbsize += sizeof (struct SG32ENTRY); 1367 } else { 1368 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; 1369 1370 pdma_sg->addresshigh = address_hi; 1371 pdma_sg->address = address_lo; 1372 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); 1373 psge += sizeof (struct SG64ENTRY); 1374 arccdbsize += sizeof (struct SG64ENTRY); 1375 } 1376 } 1377 arcmsr_cdb->sgcount = (uint8_t)nseg; 1378 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 1379 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); 1380 if ( arccdbsize > 256) 1381 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 1382 if (pcmd->sc_data_direction == DMA_TO_DEVICE) 1383 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 1384 ccb->arc_cdb_size = arccdbsize; 1385 return SUCCESS; 1386} 1387 1388static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 1389{ 1390 uint32_t cdb_phyaddr = ccb->cdb_phyaddr; 1391 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1392 atomic_inc(&acb->ccboutstandingcount); 1393 ccb->startdone = ARCMSR_CCB_START; 1394 switch (acb->adapter_type) { 1395 case ACB_ADAPTER_TYPE_A: { 1396 struct MessageUnit_A __iomem *reg = acb->pmuA; 1397 1398 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 1399 writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1400 ®->inbound_queueport); 1401 else 1402 writel(cdb_phyaddr, ®->inbound_queueport); 1403 break; 1404 } 1405 1406 case ACB_ADAPTER_TYPE_B: { 1407 struct MessageUnit_B *reg = acb->pmuB; 1408 uint32_t ending_index, index = reg->postq_index; 1409 1410 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1411 reg->post_qbuffer[ending_index] = 0; 1412 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1413 reg->post_qbuffer[index] = 1414 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE; 1415 } else { 1416 reg->post_qbuffer[index] = cdb_phyaddr; 1417 } 1418 index++; 1419 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1420 reg->postq_index = index; 1421 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); 1422 } 1423 break; 1424 case ACB_ADAPTER_TYPE_C: { 1425 struct MessageUnit_C __iomem *phbcmu = acb->pmuC; 1426 uint32_t ccb_post_stamp, arc_cdb_size; 1427 1428 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size; 1429 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1); 1430 if (acb->cdb_phyaddr_hi32) { 1431 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); 1432 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1433 } else { 1434 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1435 } 1436 } 1437 break; 1438 case ACB_ADAPTER_TYPE_D: { 1439 struct MessageUnit_D *pmu = acb->pmuD; 1440 u16 index_stripped; 1441 u16 postq_index, toggle; 1442 unsigned long flags; 1443 struct InBound_SRB *pinbound_srb; 1444 1445 spin_lock_irqsave(&acb->postq_lock, flags); 1446 postq_index = pmu->postq_index; 1447 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]); 1448 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr); 1449 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr); 1450 pinbound_srb->length = ccb->arc_cdb_size >> 2; 1451 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr); 1452 toggle = postq_index & 0x4000; 1453 index_stripped = postq_index + 1; 1454 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1); 1455 pmu->postq_index = index_stripped ? (index_stripped | toggle) : 1456 (toggle ^ 0x4000); 1457 writel(postq_index, pmu->inboundlist_write_pointer); 1458 spin_unlock_irqrestore(&acb->postq_lock, flags); 1459 break; 1460 } 1461 } 1462} 1463 1464static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb) 1465{ 1466 struct MessageUnit_A __iomem *reg = acb->pmuA; 1467 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1468 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1469 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 1470 printk(KERN_NOTICE 1471 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1472 , acb->host->host_no); 1473 } 1474} 1475 1476static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb) 1477{ 1478 struct MessageUnit_B *reg = acb->pmuB; 1479 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1480 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); 1481 1482 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 1483 printk(KERN_NOTICE 1484 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1485 , acb->host->host_no); 1486 } 1487} 1488 1489static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB) 1490{ 1491 struct MessageUnit_C __iomem *reg = pACB->pmuC; 1492 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1493 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1494 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1495 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 1496 printk(KERN_NOTICE 1497 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1498 , pACB->host->host_no); 1499 } 1500 return; 1501} 1502 1503static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB) 1504{ 1505 struct MessageUnit_D *reg = pACB->pmuD; 1506 1507 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1508 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0); 1509 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) 1510 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' " 1511 "timeout\n", pACB->host->host_no); 1512} 1513 1514static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1515{ 1516 switch (acb->adapter_type) { 1517 case ACB_ADAPTER_TYPE_A: { 1518 arcmsr_hbaA_stop_bgrb(acb); 1519 } 1520 break; 1521 1522 case ACB_ADAPTER_TYPE_B: { 1523 arcmsr_hbaB_stop_bgrb(acb); 1524 } 1525 break; 1526 case ACB_ADAPTER_TYPE_C: { 1527 arcmsr_hbaC_stop_bgrb(acb); 1528 } 1529 break; 1530 case ACB_ADAPTER_TYPE_D: 1531 arcmsr_hbaD_stop_bgrb(acb); 1532 break; 1533 } 1534} 1535 1536static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) 1537{ 1538 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); 1539} 1540 1541static void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1542{ 1543 switch (acb->adapter_type) { 1544 case ACB_ADAPTER_TYPE_A: { 1545 struct MessageUnit_A __iomem *reg = acb->pmuA; 1546 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 1547 } 1548 break; 1549 1550 case ACB_ADAPTER_TYPE_B: { 1551 struct MessageUnit_B *reg = acb->pmuB; 1552 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 1553 } 1554 break; 1555 case ACB_ADAPTER_TYPE_C: { 1556 struct MessageUnit_C __iomem *reg = acb->pmuC; 1557 1558 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 1559 } 1560 break; 1561 case ACB_ADAPTER_TYPE_D: { 1562 struct MessageUnit_D *reg = acb->pmuD; 1563 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 1564 reg->inbound_doorbell); 1565 } 1566 break; 1567 } 1568} 1569 1570static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1571{ 1572 switch (acb->adapter_type) { 1573 case ACB_ADAPTER_TYPE_A: { 1574 struct MessageUnit_A __iomem *reg = acb->pmuA; 1575 /* 1576 ** push inbound doorbell tell iop, driver data write ok 1577 ** and wait reply on next hwinterrupt for next Qbuffer post 1578 */ 1579 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); 1580 } 1581 break; 1582 1583 case ACB_ADAPTER_TYPE_B: { 1584 struct MessageUnit_B *reg = acb->pmuB; 1585 /* 1586 ** push inbound doorbell tell iop, driver data write ok 1587 ** and wait reply on next hwinterrupt for next Qbuffer post 1588 */ 1589 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); 1590 } 1591 break; 1592 case ACB_ADAPTER_TYPE_C: { 1593 struct MessageUnit_C __iomem *reg = acb->pmuC; 1594 /* 1595 ** push inbound doorbell tell iop, driver data write ok 1596 ** and wait reply on next hwinterrupt for next Qbuffer post 1597 */ 1598 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); 1599 } 1600 break; 1601 case ACB_ADAPTER_TYPE_D: { 1602 struct MessageUnit_D *reg = acb->pmuD; 1603 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY, 1604 reg->inbound_doorbell); 1605 } 1606 break; 1607 } 1608} 1609 1610struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) 1611{ 1612 struct QBUFFER __iomem *qbuffer = NULL; 1613 switch (acb->adapter_type) { 1614 1615 case ACB_ADAPTER_TYPE_A: { 1616 struct MessageUnit_A __iomem *reg = acb->pmuA; 1617 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; 1618 } 1619 break; 1620 1621 case ACB_ADAPTER_TYPE_B: { 1622 struct MessageUnit_B *reg = acb->pmuB; 1623 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1624 } 1625 break; 1626 case ACB_ADAPTER_TYPE_C: { 1627 struct MessageUnit_C __iomem *phbcmu = acb->pmuC; 1628 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; 1629 } 1630 break; 1631 case ACB_ADAPTER_TYPE_D: { 1632 struct MessageUnit_D *reg = acb->pmuD; 1633 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1634 } 1635 break; 1636 } 1637 return qbuffer; 1638} 1639 1640static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) 1641{ 1642 struct QBUFFER __iomem *pqbuffer = NULL; 1643 switch (acb->adapter_type) { 1644 1645 case ACB_ADAPTER_TYPE_A: { 1646 struct MessageUnit_A __iomem *reg = acb->pmuA; 1647 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; 1648 } 1649 break; 1650 1651 case ACB_ADAPTER_TYPE_B: { 1652 struct MessageUnit_B *reg = acb->pmuB; 1653 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1654 } 1655 break; 1656 case ACB_ADAPTER_TYPE_C: { 1657 struct MessageUnit_C __iomem *reg = acb->pmuC; 1658 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; 1659 } 1660 break; 1661 case ACB_ADAPTER_TYPE_D: { 1662 struct MessageUnit_D *reg = acb->pmuD; 1663 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1664 } 1665 break; 1666 } 1667 return pqbuffer; 1668} 1669 1670static uint32_t 1671arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb, 1672 struct QBUFFER __iomem *prbuffer) 1673{ 1674 uint8_t *pQbuffer; 1675 uint8_t *buf1 = NULL; 1676 uint32_t __iomem *iop_data; 1677 uint32_t iop_len, data_len, *buf2 = NULL; 1678 1679 iop_data = (uint32_t __iomem *)prbuffer->data; 1680 iop_len = readl(&prbuffer->data_len); 1681 if (iop_len > 0) { 1682 buf1 = kmalloc(128, GFP_ATOMIC); 1683 buf2 = (uint32_t *)buf1; 1684 if (buf1 == NULL) 1685 return 0; 1686 data_len = iop_len; 1687 while (data_len >= 4) { 1688 *buf2++ = readl(iop_data); 1689 iop_data++; 1690 data_len -= 4; 1691 } 1692 if (data_len) 1693 *buf2 = readl(iop_data); 1694 buf2 = (uint32_t *)buf1; 1695 } 1696 while (iop_len > 0) { 1697 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex]; 1698 *pQbuffer = *buf1; 1699 acb->rqbuf_putIndex++; 1700 /* if last, index number set it to 0 */ 1701 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 1702 buf1++; 1703 iop_len--; 1704 } 1705 kfree(buf2); 1706 /* let IOP know data has been read */ 1707 arcmsr_iop_message_read(acb); 1708 return 1; 1709} 1710 1711uint32_t 1712arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb, 1713 struct QBUFFER __iomem *prbuffer) { 1714 1715 uint8_t *pQbuffer; 1716 uint8_t __iomem *iop_data; 1717 uint32_t iop_len; 1718 1719 if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) 1720 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer); 1721 iop_data = (uint8_t __iomem *)prbuffer->data; 1722 iop_len = readl(&prbuffer->data_len); 1723 while (iop_len > 0) { 1724 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex]; 1725 *pQbuffer = readb(iop_data); 1726 acb->rqbuf_putIndex++; 1727 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 1728 iop_data++; 1729 iop_len--; 1730 } 1731 arcmsr_iop_message_read(acb); 1732 return 1; 1733} 1734 1735static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) 1736{ 1737 unsigned long flags; 1738 struct QBUFFER __iomem *prbuffer; 1739 int32_t buf_empty_len; 1740 1741 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 1742 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1743 buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) & 1744 (ARCMSR_MAX_QBUFFER - 1); 1745 if (buf_empty_len >= readl(&prbuffer->data_len)) { 1746 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) 1747 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1748 } else 1749 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1750 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 1751} 1752 1753static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb) 1754{ 1755 uint8_t *pQbuffer; 1756 struct QBUFFER __iomem *pwbuffer; 1757 uint8_t *buf1 = NULL; 1758 uint32_t __iomem *iop_data; 1759 uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data; 1760 1761 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1762 buf1 = kmalloc(128, GFP_ATOMIC); 1763 buf2 = (uint32_t *)buf1; 1764 if (buf1 == NULL) 1765 return; 1766 1767 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1768 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1769 iop_data = (uint32_t __iomem *)pwbuffer->data; 1770 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1771 && (allxfer_len < 124)) { 1772 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex]; 1773 *buf1 = *pQbuffer; 1774 acb->wqbuf_getIndex++; 1775 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER; 1776 buf1++; 1777 allxfer_len++; 1778 } 1779 data_len = allxfer_len; 1780 buf1 = (uint8_t *)buf2; 1781 while (data_len >= 4) { 1782 data = *buf2++; 1783 writel(data, iop_data); 1784 iop_data++; 1785 data_len -= 4; 1786 } 1787 if (data_len) { 1788 data = *buf2; 1789 writel(data, iop_data); 1790 } 1791 writel(allxfer_len, &pwbuffer->data_len); 1792 kfree(buf1); 1793 arcmsr_iop_message_wrote(acb); 1794 } 1795} 1796 1797void 1798arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb) 1799{ 1800 uint8_t *pQbuffer; 1801 struct QBUFFER __iomem *pwbuffer; 1802 uint8_t __iomem *iop_data; 1803 int32_t allxfer_len = 0; 1804 1805 if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) { 1806 arcmsr_write_ioctldata2iop_in_DWORD(acb); 1807 return; 1808 } 1809 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1810 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1811 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1812 iop_data = (uint8_t __iomem *)pwbuffer->data; 1813 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1814 && (allxfer_len < 124)) { 1815 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex]; 1816 writeb(*pQbuffer, iop_data); 1817 acb->wqbuf_getIndex++; 1818 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER; 1819 iop_data++; 1820 allxfer_len++; 1821 } 1822 writel(allxfer_len, &pwbuffer->data_len); 1823 arcmsr_iop_message_wrote(acb); 1824 } 1825} 1826 1827static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) 1828{ 1829 unsigned long flags; 1830 1831 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 1832 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 1833 if (acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1834 arcmsr_write_ioctldata2iop(acb); 1835 if (acb->wqbuf_getIndex == acb->wqbuf_putIndex) 1836 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 1837 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 1838} 1839 1840static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb) 1841{ 1842 uint32_t outbound_doorbell; 1843 struct MessageUnit_A __iomem *reg = acb->pmuA; 1844 outbound_doorbell = readl(®->outbound_doorbell); 1845 do { 1846 writel(outbound_doorbell, ®->outbound_doorbell); 1847 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) 1848 arcmsr_iop2drv_data_wrote_handle(acb); 1849 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) 1850 arcmsr_iop2drv_data_read_handle(acb); 1851 outbound_doorbell = readl(®->outbound_doorbell); 1852 } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 1853 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)); 1854} 1855static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB) 1856{ 1857 uint32_t outbound_doorbell; 1858 struct MessageUnit_C __iomem *reg = pACB->pmuC; 1859 /* 1860 ******************************************************************* 1861 ** Maybe here we need to check wrqbuffer_lock is lock or not 1862 ** DOORBELL: din! don! 1863 ** check if there are any mail need to pack from firmware 1864 ******************************************************************* 1865 */ 1866 outbound_doorbell = readl(®->outbound_doorbell); 1867 do { 1868 writel(outbound_doorbell, ®->outbound_doorbell_clear); 1869 readl(®->outbound_doorbell_clear); 1870 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) 1871 arcmsr_iop2drv_data_wrote_handle(pACB); 1872 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) 1873 arcmsr_iop2drv_data_read_handle(pACB); 1874 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) 1875 arcmsr_hbaC_message_isr(pACB); 1876 outbound_doorbell = readl(®->outbound_doorbell); 1877 } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK 1878 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK 1879 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)); 1880} 1881 1882static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB) 1883{ 1884 uint32_t outbound_doorbell; 1885 struct MessageUnit_D *pmu = pACB->pmuD; 1886 1887 outbound_doorbell = readl(pmu->outbound_doorbell); 1888 do { 1889 writel(outbound_doorbell, pmu->outbound_doorbell); 1890 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) 1891 arcmsr_hbaD_message_isr(pACB); 1892 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) 1893 arcmsr_iop2drv_data_wrote_handle(pACB); 1894 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK) 1895 arcmsr_iop2drv_data_read_handle(pACB); 1896 outbound_doorbell = readl(pmu->outbound_doorbell); 1897 } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK 1898 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK 1899 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)); 1900} 1901 1902static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb) 1903{ 1904 uint32_t flag_ccb; 1905 struct MessageUnit_A __iomem *reg = acb->pmuA; 1906 struct ARCMSR_CDB *pARCMSR_CDB; 1907 struct CommandControlBlock *pCCB; 1908 bool error; 1909 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { 1910 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1911 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1912 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1913 arcmsr_drain_donequeue(acb, pCCB, error); 1914 } 1915} 1916static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb) 1917{ 1918 uint32_t index; 1919 uint32_t flag_ccb; 1920 struct MessageUnit_B *reg = acb->pmuB; 1921 struct ARCMSR_CDB *pARCMSR_CDB; 1922 struct CommandControlBlock *pCCB; 1923 bool error; 1924 index = reg->doneq_index; 1925 while ((flag_ccb = reg->done_qbuffer[index]) != 0) { 1926 reg->done_qbuffer[index] = 0; 1927 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1928 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1929 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1930 arcmsr_drain_donequeue(acb, pCCB, error); 1931 index++; 1932 index %= ARCMSR_MAX_HBB_POSTQUEUE; 1933 reg->doneq_index = index; 1934 } 1935} 1936 1937static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb) 1938{ 1939 struct MessageUnit_C __iomem *phbcmu; 1940 struct ARCMSR_CDB *arcmsr_cdb; 1941 struct CommandControlBlock *ccb; 1942 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; 1943 int error; 1944 1945 phbcmu = acb->pmuC; 1946 /* areca cdb command done */ 1947 /* Use correct offset and size for syncing */ 1948 1949 while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) != 1950 0xFFFFFFFF) { 1951 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 1952 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset 1953 + ccb_cdb_phy); 1954 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, 1955 arcmsr_cdb); 1956 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 1957 ? true : false; 1958 /* check if command done with no error */ 1959 arcmsr_drain_donequeue(acb, ccb, error); 1960 throttling++; 1961 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { 1962 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, 1963 &phbcmu->inbound_doorbell); 1964 throttling = 0; 1965 } 1966 } 1967} 1968 1969static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb) 1970{ 1971 u32 outbound_write_pointer, doneq_index, index_stripped, toggle; 1972 uint32_t addressLow, ccb_cdb_phy; 1973 int error; 1974 struct MessageUnit_D *pmu; 1975 struct ARCMSR_CDB *arcmsr_cdb; 1976 struct CommandControlBlock *ccb; 1977 unsigned long flags; 1978 1979 spin_lock_irqsave(&acb->doneq_lock, flags); 1980 pmu = acb->pmuD; 1981 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1; 1982 doneq_index = pmu->doneq_index; 1983 if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) { 1984 do { 1985 toggle = doneq_index & 0x4000; 1986 index_stripped = (doneq_index & 0xFFF) + 1; 1987 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 1988 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 1989 ((toggle ^ 0x4000) + 1); 1990 doneq_index = pmu->doneq_index; 1991 addressLow = pmu->done_qbuffer[doneq_index & 1992 0xFFF].addressLow; 1993 ccb_cdb_phy = (addressLow & 0xFFFFFFF0); 1994 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset 1995 + ccb_cdb_phy); 1996 ccb = container_of(arcmsr_cdb, 1997 struct CommandControlBlock, arcmsr_cdb); 1998 error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 1999 ? true : false; 2000 arcmsr_drain_donequeue(acb, ccb, error); 2001 writel(doneq_index, pmu->outboundlist_read_pointer); 2002 } while ((doneq_index & 0xFFF) != 2003 (outbound_write_pointer & 0xFFF)); 2004 } 2005 writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR, 2006 pmu->outboundlist_interrupt_cause); 2007 readl(pmu->outboundlist_interrupt_cause); 2008 spin_unlock_irqrestore(&acb->doneq_lock, flags); 2009} 2010 2011/* 2012********************************************************************************** 2013** Handle a message interrupt 2014** 2015** The only message interrupt we expect is in response to a query for the current adapter config. 2016** We want this in order to compare the drivemap so that we can detect newly-attached drives. 2017********************************************************************************** 2018*/ 2019static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb) 2020{ 2021 struct MessageUnit_A __iomem *reg = acb->pmuA; 2022 /*clear interrupt and message state*/ 2023 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); 2024 schedule_work(&acb->arcmsr_do_message_isr_bh); 2025} 2026static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb) 2027{ 2028 struct MessageUnit_B *reg = acb->pmuB; 2029 2030 /*clear interrupt and message state*/ 2031 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2032 schedule_work(&acb->arcmsr_do_message_isr_bh); 2033} 2034/* 2035********************************************************************************** 2036** Handle a message interrupt 2037** 2038** The only message interrupt we expect is in response to a query for the 2039** current adapter config. 2040** We want this in order to compare the drivemap so that we can detect newly-attached drives. 2041********************************************************************************** 2042*/ 2043static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb) 2044{ 2045 struct MessageUnit_C __iomem *reg = acb->pmuC; 2046 /*clear interrupt and message state*/ 2047 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); 2048 schedule_work(&acb->arcmsr_do_message_isr_bh); 2049} 2050 2051static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb) 2052{ 2053 struct MessageUnit_D *reg = acb->pmuD; 2054 2055 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell); 2056 readl(reg->outbound_doorbell); 2057 schedule_work(&acb->arcmsr_do_message_isr_bh); 2058} 2059 2060static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb) 2061{ 2062 uint32_t outbound_intstatus; 2063 struct MessageUnit_A __iomem *reg = acb->pmuA; 2064 outbound_intstatus = readl(®->outbound_intstatus) & 2065 acb->outbound_int_enable; 2066 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) 2067 return IRQ_NONE; 2068 do { 2069 writel(outbound_intstatus, ®->outbound_intstatus); 2070 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) 2071 arcmsr_hbaA_doorbell_isr(acb); 2072 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) 2073 arcmsr_hbaA_postqueue_isr(acb); 2074 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) 2075 arcmsr_hbaA_message_isr(acb); 2076 outbound_intstatus = readl(®->outbound_intstatus) & 2077 acb->outbound_int_enable; 2078 } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT 2079 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT 2080 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT)); 2081 return IRQ_HANDLED; 2082} 2083 2084static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb) 2085{ 2086 uint32_t outbound_doorbell; 2087 struct MessageUnit_B *reg = acb->pmuB; 2088 outbound_doorbell = readl(reg->iop2drv_doorbell) & 2089 acb->outbound_int_enable; 2090 if (!outbound_doorbell) 2091 return IRQ_NONE; 2092 do { 2093 writel(~outbound_doorbell, reg->iop2drv_doorbell); 2094 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 2095 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) 2096 arcmsr_iop2drv_data_wrote_handle(acb); 2097 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) 2098 arcmsr_iop2drv_data_read_handle(acb); 2099 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) 2100 arcmsr_hbaB_postqueue_isr(acb); 2101 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) 2102 arcmsr_hbaB_message_isr(acb); 2103 outbound_doorbell = readl(reg->iop2drv_doorbell) & 2104 acb->outbound_int_enable; 2105 } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK 2106 | ARCMSR_IOP2DRV_DATA_READ_OK 2107 | ARCMSR_IOP2DRV_CDB_DONE 2108 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)); 2109 return IRQ_HANDLED; 2110} 2111 2112static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB) 2113{ 2114 uint32_t host_interrupt_status; 2115 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 2116 /* 2117 ********************************************* 2118 ** check outbound intstatus 2119 ********************************************* 2120 */ 2121 host_interrupt_status = readl(&phbcmu->host_int_status) & 2122 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | 2123 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR); 2124 if (!host_interrupt_status) 2125 return IRQ_NONE; 2126 do { 2127 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) 2128 arcmsr_hbaC_doorbell_isr(pACB); 2129 /* MU post queue interrupts*/ 2130 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) 2131 arcmsr_hbaC_postqueue_isr(pACB); 2132 host_interrupt_status = readl(&phbcmu->host_int_status); 2133 } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | 2134 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)); 2135 return IRQ_HANDLED; 2136} 2137 2138static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB) 2139{ 2140 u32 host_interrupt_status; 2141 struct MessageUnit_D *pmu = pACB->pmuD; 2142 2143 host_interrupt_status = readl(pmu->host_int_status) & 2144 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR | 2145 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR); 2146 if (!host_interrupt_status) 2147 return IRQ_NONE; 2148 do { 2149 /* MU post queue interrupts*/ 2150 if (host_interrupt_status & 2151 ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR) 2152 arcmsr_hbaD_postqueue_isr(pACB); 2153 if (host_interrupt_status & 2154 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR) 2155 arcmsr_hbaD_doorbell_isr(pACB); 2156 host_interrupt_status = readl(pmu->host_int_status); 2157 } while (host_interrupt_status & 2158 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR | 2159 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)); 2160 return IRQ_HANDLED; 2161} 2162 2163static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) 2164{ 2165 switch (acb->adapter_type) { 2166 case ACB_ADAPTER_TYPE_A: 2167 return arcmsr_hbaA_handle_isr(acb); 2168 break; 2169 case ACB_ADAPTER_TYPE_B: 2170 return arcmsr_hbaB_handle_isr(acb); 2171 break; 2172 case ACB_ADAPTER_TYPE_C: 2173 return arcmsr_hbaC_handle_isr(acb); 2174 case ACB_ADAPTER_TYPE_D: 2175 return arcmsr_hbaD_handle_isr(acb); 2176 default: 2177 return IRQ_NONE; 2178 } 2179} 2180 2181static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 2182{ 2183 if (acb) { 2184 /* stop adapter background rebuild */ 2185 if (acb->acb_flags & ACB_F_MSG_START_BGRB) { 2186 uint32_t intmask_org; 2187 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 2188 intmask_org = arcmsr_disable_outbound_ints(acb); 2189 arcmsr_stop_adapter_bgrb(acb); 2190 arcmsr_flush_adapter_cache(acb); 2191 arcmsr_enable_outbound_ints(acb, intmask_org); 2192 } 2193 } 2194} 2195 2196 2197void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb) 2198{ 2199 uint32_t i; 2200 2201 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2202 for (i = 0; i < 15; i++) { 2203 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2204 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 2205 acb->rqbuf_getIndex = 0; 2206 acb->rqbuf_putIndex = 0; 2207 arcmsr_iop_message_read(acb); 2208 mdelay(30); 2209 } else if (acb->rqbuf_getIndex != 2210 acb->rqbuf_putIndex) { 2211 acb->rqbuf_getIndex = 0; 2212 acb->rqbuf_putIndex = 0; 2213 mdelay(30); 2214 } else 2215 break; 2216 } 2217 } 2218} 2219 2220static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 2221 struct scsi_cmnd *cmd) 2222{ 2223 char *buffer; 2224 unsigned short use_sg; 2225 int retvalue = 0, transfer_len = 0; 2226 unsigned long flags; 2227 struct CMD_MESSAGE_FIELD *pcmdmessagefld; 2228 uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 | 2229 (uint32_t)cmd->cmnd[6] << 16 | 2230 (uint32_t)cmd->cmnd[7] << 8 | 2231 (uint32_t)cmd->cmnd[8]; 2232 struct scatterlist *sg; 2233 2234 use_sg = scsi_sg_count(cmd); 2235 sg = scsi_sglist(cmd); 2236 buffer = kmap_atomic(sg_page(sg)) + sg->offset; 2237 if (use_sg > 1) { 2238 retvalue = ARCMSR_MESSAGE_FAIL; 2239 goto message_out; 2240 } 2241 transfer_len += sg->length; 2242 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 2243 retvalue = ARCMSR_MESSAGE_FAIL; 2244 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__); 2245 goto message_out; 2246 } 2247 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer; 2248 switch (controlcode) { 2249 case ARCMSR_MESSAGE_READ_RQBUFFER: { 2250 unsigned char *ver_addr; 2251 uint8_t *ptmpQbuffer; 2252 uint32_t allxfer_len = 0; 2253 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC); 2254 if (!ver_addr) { 2255 retvalue = ARCMSR_MESSAGE_FAIL; 2256 pr_info("%s: memory not enough!\n", __func__); 2257 goto message_out; 2258 } 2259 ptmpQbuffer = ver_addr; 2260 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2261 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) { 2262 unsigned int tail = acb->rqbuf_getIndex; 2263 unsigned int head = acb->rqbuf_putIndex; 2264 unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER); 2265 2266 allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER); 2267 if (allxfer_len > ARCMSR_API_DATA_BUFLEN) 2268 allxfer_len = ARCMSR_API_DATA_BUFLEN; 2269 2270 if (allxfer_len <= cnt_to_end) 2271 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len); 2272 else { 2273 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end); 2274 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end); 2275 } 2276 acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER; 2277 } 2278 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, 2279 allxfer_len); 2280 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2281 struct QBUFFER __iomem *prbuffer; 2282 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 2283 prbuffer = arcmsr_get_iop_rqbuffer(acb); 2284 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) 2285 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 2286 } 2287 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2288 kfree(ver_addr); 2289 pcmdmessagefld->cmdmessage.Length = allxfer_len; 2290 if (acb->fw_flag == FW_DEADLOCK) 2291 pcmdmessagefld->cmdmessage.ReturnCode = 2292 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2293 else 2294 pcmdmessagefld->cmdmessage.ReturnCode = 2295 ARCMSR_MESSAGE_RETURNCODE_OK; 2296 break; 2297 } 2298 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 2299 unsigned char *ver_addr; 2300 int32_t user_len, cnt2end; 2301 uint8_t *pQbuffer, *ptmpuserbuffer; 2302 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC); 2303 if (!ver_addr) { 2304 retvalue = ARCMSR_MESSAGE_FAIL; 2305 goto message_out; 2306 } 2307 ptmpuserbuffer = ver_addr; 2308 user_len = pcmdmessagefld->cmdmessage.Length; 2309 memcpy(ptmpuserbuffer, 2310 pcmdmessagefld->messagedatabuffer, user_len); 2311 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2312 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) { 2313 struct SENSE_DATA *sensebuffer = 2314 (struct SENSE_DATA *)cmd->sense_buffer; 2315 arcmsr_write_ioctldata2iop(acb); 2316 /* has error report sensedata */ 2317 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 2318 sensebuffer->SenseKey = ILLEGAL_REQUEST; 2319 sensebuffer->AdditionalSenseLength = 0x0A; 2320 sensebuffer->AdditionalSenseCode = 0x20; 2321 sensebuffer->Valid = 1; 2322 retvalue = ARCMSR_MESSAGE_FAIL; 2323 } else { 2324 pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex]; 2325 cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex; 2326 if (user_len > cnt2end) { 2327 memcpy(pQbuffer, ptmpuserbuffer, cnt2end); 2328 ptmpuserbuffer += cnt2end; 2329 user_len -= cnt2end; 2330 acb->wqbuf_putIndex = 0; 2331 pQbuffer = acb->wqbuffer; 2332 } 2333 memcpy(pQbuffer, ptmpuserbuffer, user_len); 2334 acb->wqbuf_putIndex += user_len; 2335 acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 2336 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 2337 acb->acb_flags &= 2338 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 2339 arcmsr_write_ioctldata2iop(acb); 2340 } 2341 } 2342 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2343 kfree(ver_addr); 2344 if (acb->fw_flag == FW_DEADLOCK) 2345 pcmdmessagefld->cmdmessage.ReturnCode = 2346 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2347 else 2348 pcmdmessagefld->cmdmessage.ReturnCode = 2349 ARCMSR_MESSAGE_RETURNCODE_OK; 2350 break; 2351 } 2352 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 2353 uint8_t *pQbuffer = acb->rqbuffer; 2354 2355 arcmsr_clear_iop2drv_rqueue_buffer(acb); 2356 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2357 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 2358 acb->rqbuf_getIndex = 0; 2359 acb->rqbuf_putIndex = 0; 2360 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 2361 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2362 if (acb->fw_flag == FW_DEADLOCK) 2363 pcmdmessagefld->cmdmessage.ReturnCode = 2364 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2365 else 2366 pcmdmessagefld->cmdmessage.ReturnCode = 2367 ARCMSR_MESSAGE_RETURNCODE_OK; 2368 break; 2369 } 2370 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 2371 uint8_t *pQbuffer = acb->wqbuffer; 2372 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2373 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 2374 ACB_F_MESSAGE_WQBUFFER_READED); 2375 acb->wqbuf_getIndex = 0; 2376 acb->wqbuf_putIndex = 0; 2377 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 2378 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2379 if (acb->fw_flag == FW_DEADLOCK) 2380 pcmdmessagefld->cmdmessage.ReturnCode = 2381 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2382 else 2383 pcmdmessagefld->cmdmessage.ReturnCode = 2384 ARCMSR_MESSAGE_RETURNCODE_OK; 2385 break; 2386 } 2387 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 2388 uint8_t *pQbuffer; 2389 arcmsr_clear_iop2drv_rqueue_buffer(acb); 2390 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2391 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 2392 acb->rqbuf_getIndex = 0; 2393 acb->rqbuf_putIndex = 0; 2394 pQbuffer = acb->rqbuffer; 2395 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 2396 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2397 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2398 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 2399 ACB_F_MESSAGE_WQBUFFER_READED); 2400 acb->wqbuf_getIndex = 0; 2401 acb->wqbuf_putIndex = 0; 2402 pQbuffer = acb->wqbuffer; 2403 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 2404 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2405 if (acb->fw_flag == FW_DEADLOCK) 2406 pcmdmessagefld->cmdmessage.ReturnCode = 2407 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2408 else 2409 pcmdmessagefld->cmdmessage.ReturnCode = 2410 ARCMSR_MESSAGE_RETURNCODE_OK; 2411 break; 2412 } 2413 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 2414 if (acb->fw_flag == FW_DEADLOCK) 2415 pcmdmessagefld->cmdmessage.ReturnCode = 2416 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2417 else 2418 pcmdmessagefld->cmdmessage.ReturnCode = 2419 ARCMSR_MESSAGE_RETURNCODE_3F; 2420 break; 2421 } 2422 case ARCMSR_MESSAGE_SAY_HELLO: { 2423 int8_t *hello_string = "Hello! I am ARCMSR"; 2424 if (acb->fw_flag == FW_DEADLOCK) 2425 pcmdmessagefld->cmdmessage.ReturnCode = 2426 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2427 else 2428 pcmdmessagefld->cmdmessage.ReturnCode = 2429 ARCMSR_MESSAGE_RETURNCODE_OK; 2430 memcpy(pcmdmessagefld->messagedatabuffer, 2431 hello_string, (int16_t)strlen(hello_string)); 2432 break; 2433 } 2434 case ARCMSR_MESSAGE_SAY_GOODBYE: { 2435 if (acb->fw_flag == FW_DEADLOCK) 2436 pcmdmessagefld->cmdmessage.ReturnCode = 2437 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2438 else 2439 pcmdmessagefld->cmdmessage.ReturnCode = 2440 ARCMSR_MESSAGE_RETURNCODE_OK; 2441 arcmsr_iop_parking(acb); 2442 break; 2443 } 2444 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: { 2445 if (acb->fw_flag == FW_DEADLOCK) 2446 pcmdmessagefld->cmdmessage.ReturnCode = 2447 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2448 else 2449 pcmdmessagefld->cmdmessage.ReturnCode = 2450 ARCMSR_MESSAGE_RETURNCODE_OK; 2451 arcmsr_flush_adapter_cache(acb); 2452 break; 2453 } 2454 default: 2455 retvalue = ARCMSR_MESSAGE_FAIL; 2456 pr_info("%s: unknown controlcode!\n", __func__); 2457 } 2458message_out: 2459 if (use_sg) { 2460 struct scatterlist *sg = scsi_sglist(cmd); 2461 kunmap_atomic(buffer - sg->offset); 2462 } 2463 return retvalue; 2464} 2465 2466static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) 2467{ 2468 struct list_head *head = &acb->ccb_free_list; 2469 struct CommandControlBlock *ccb = NULL; 2470 unsigned long flags; 2471 spin_lock_irqsave(&acb->ccblist_lock, flags); 2472 if (!list_empty(head)) { 2473 ccb = list_entry(head->next, struct CommandControlBlock, list); 2474 list_del_init(&ccb->list); 2475 }else{ 2476 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2477 return NULL; 2478 } 2479 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2480 return ccb; 2481} 2482 2483static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 2484 struct scsi_cmnd *cmd) 2485{ 2486 switch (cmd->cmnd[0]) { 2487 case INQUIRY: { 2488 unsigned char inqdata[36]; 2489 char *buffer; 2490 struct scatterlist *sg; 2491 2492 if (cmd->device->lun) { 2493 cmd->result = (DID_TIME_OUT << 16); 2494 cmd->scsi_done(cmd); 2495 return; 2496 } 2497 inqdata[0] = TYPE_PROCESSOR; 2498 /* Periph Qualifier & Periph Dev Type */ 2499 inqdata[1] = 0; 2500 /* rem media bit & Dev Type Modifier */ 2501 inqdata[2] = 0; 2502 /* ISO, ECMA, & ANSI versions */ 2503 inqdata[4] = 31; 2504 /* length of additional data */ 2505 strncpy(&inqdata[8], "Areca ", 8); 2506 /* Vendor Identification */ 2507 strncpy(&inqdata[16], "RAID controller ", 16); 2508 /* Product Identification */ 2509 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 2510 2511 sg = scsi_sglist(cmd); 2512 buffer = kmap_atomic(sg_page(sg)) + sg->offset; 2513 2514 memcpy(buffer, inqdata, sizeof(inqdata)); 2515 sg = scsi_sglist(cmd); 2516 kunmap_atomic(buffer - sg->offset); 2517 2518 cmd->scsi_done(cmd); 2519 } 2520 break; 2521 case WRITE_BUFFER: 2522 case READ_BUFFER: { 2523 if (arcmsr_iop_message_xfer(acb, cmd)) 2524 cmd->result = (DID_ERROR << 16); 2525 cmd->scsi_done(cmd); 2526 } 2527 break; 2528 default: 2529 cmd->scsi_done(cmd); 2530 } 2531} 2532 2533static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd, 2534 void (* done)(struct scsi_cmnd *)) 2535{ 2536 struct Scsi_Host *host = cmd->device->host; 2537 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; 2538 struct CommandControlBlock *ccb; 2539 int target = cmd->device->id; 2540 int lun = cmd->device->lun; 2541 uint8_t scsicmd = cmd->cmnd[0]; 2542 cmd->scsi_done = done; 2543 cmd->host_scribble = NULL; 2544 cmd->result = 0; 2545 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){ 2546 if(acb->devstate[target][lun] == ARECA_RAID_GONE) { 2547 cmd->result = (DID_NO_CONNECT << 16); 2548 } 2549 cmd->scsi_done(cmd); 2550 return 0; 2551 } 2552 if (target == 16) { 2553 /* virtual device for iop message transfer */ 2554 arcmsr_handle_virtual_command(acb, cmd); 2555 return 0; 2556 } 2557 ccb = arcmsr_get_freeccb(acb); 2558 if (!ccb) 2559 return SCSI_MLQUEUE_HOST_BUSY; 2560 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) { 2561 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); 2562 cmd->scsi_done(cmd); 2563 return 0; 2564 } 2565 arcmsr_post_ccb(acb, ccb); 2566 return 0; 2567} 2568 2569static DEF_SCSI_QCMD(arcmsr_queue_command) 2570 2571static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb) 2572{ 2573 struct MessageUnit_A __iomem *reg = acb->pmuA; 2574 char *acb_firm_model = acb->firm_model; 2575 char *acb_firm_version = acb->firm_version; 2576 char *acb_device_map = acb->device_map; 2577 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); 2578 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); 2579 char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); 2580 int count; 2581 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2582 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 2583 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2584 miscellaneous data' timeout \n", acb->host->host_no); 2585 return false; 2586 } 2587 count = 8; 2588 while (count){ 2589 *acb_firm_model = readb(iop_firm_model); 2590 acb_firm_model++; 2591 iop_firm_model++; 2592 count--; 2593 } 2594 2595 count = 16; 2596 while (count){ 2597 *acb_firm_version = readb(iop_firm_version); 2598 acb_firm_version++; 2599 iop_firm_version++; 2600 count--; 2601 } 2602 2603 count=16; 2604 while(count){ 2605 *acb_device_map = readb(iop_device_map); 2606 acb_device_map++; 2607 iop_device_map++; 2608 count--; 2609 } 2610 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2611 acb->host->host_no, 2612 acb->firm_model, 2613 acb->firm_version); 2614 acb->signature = readl(®->message_rwbuffer[0]); 2615 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2616 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2617 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2618 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2619 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2620 return true; 2621} 2622static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb) 2623{ 2624 struct MessageUnit_B *reg = acb->pmuB; 2625 struct pci_dev *pdev = acb->pdev; 2626 void *dma_coherent; 2627 dma_addr_t dma_coherent_handle; 2628 char *acb_firm_model = acb->firm_model; 2629 char *acb_firm_version = acb->firm_version; 2630 char *acb_device_map = acb->device_map; 2631 char __iomem *iop_firm_model; 2632 /*firm_model,15,60-67*/ 2633 char __iomem *iop_firm_version; 2634 /*firm_version,17,68-83*/ 2635 char __iomem *iop_device_map; 2636 /*firm_version,21,84-99*/ 2637 int count; 2638 2639 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32); 2640 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->roundup_ccbsize, 2641 &dma_coherent_handle, GFP_KERNEL); 2642 if (!dma_coherent){ 2643 printk(KERN_NOTICE 2644 "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", 2645 acb->host->host_no); 2646 return false; 2647 } 2648 acb->dma_coherent_handle2 = dma_coherent_handle; 2649 acb->dma_coherent2 = dma_coherent; 2650 reg = (struct MessageUnit_B *)dma_coherent; 2651 acb->pmuB = reg; 2652 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL); 2653 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK); 2654 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL); 2655 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK); 2656 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER); 2657 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER); 2658 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER); 2659 iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ 2660 iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ 2661 iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ 2662 2663 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2664 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 2665 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2666 miscellaneous data' timeout \n", acb->host->host_no); 2667 return false; 2668 } 2669 count = 8; 2670 while (count){ 2671 *acb_firm_model = readb(iop_firm_model); 2672 acb_firm_model++; 2673 iop_firm_model++; 2674 count--; 2675 } 2676 count = 16; 2677 while (count){ 2678 *acb_firm_version = readb(iop_firm_version); 2679 acb_firm_version++; 2680 iop_firm_version++; 2681 count--; 2682 } 2683 2684 count = 16; 2685 while(count){ 2686 *acb_device_map = readb(iop_device_map); 2687 acb_device_map++; 2688 iop_device_map++; 2689 count--; 2690 } 2691 2692 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2693 acb->host->host_no, 2694 acb->firm_model, 2695 acb->firm_version); 2696 2697 acb->signature = readl(®->message_rwbuffer[1]); 2698 /*firm_signature,1,00-03*/ 2699 acb->firm_request_len = readl(®->message_rwbuffer[2]); 2700 /*firm_request_len,1,04-07*/ 2701 acb->firm_numbers_queue = readl(®->message_rwbuffer[3]); 2702 /*firm_numbers_queue,2,08-11*/ 2703 acb->firm_sdram_size = readl(®->message_rwbuffer[4]); 2704 /*firm_sdram_size,3,12-15*/ 2705 acb->firm_hd_channels = readl(®->message_rwbuffer[5]); 2706 /*firm_ide_channels,4,16-19*/ 2707 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2708 /*firm_ide_channels,4,16-19*/ 2709 return true; 2710} 2711 2712static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB) 2713{ 2714 uint32_t intmask_org, Index, firmware_state = 0; 2715 struct MessageUnit_C __iomem *reg = pACB->pmuC; 2716 char *acb_firm_model = pACB->firm_model; 2717 char *acb_firm_version = pACB->firm_version; 2718 char __iomem *iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ 2719 char __iomem *iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ 2720 int count; 2721 /* disable all outbound interrupt */ 2722 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ 2723 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 2724 /* wait firmware ready */ 2725 do { 2726 firmware_state = readl(®->outbound_msgaddr1); 2727 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2728 /* post "get config" instruction */ 2729 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2730 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2731 /* wait message ready */ 2732 for (Index = 0; Index < 2000; Index++) { 2733 if (readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 2734 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ 2735 break; 2736 } 2737 udelay(10); 2738 } /*max 1 seconds*/ 2739 if (Index >= 2000) { 2740 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2741 miscellaneous data' timeout \n", pACB->host->host_no); 2742 return false; 2743 } 2744 count = 8; 2745 while (count) { 2746 *acb_firm_model = readb(iop_firm_model); 2747 acb_firm_model++; 2748 iop_firm_model++; 2749 count--; 2750 } 2751 count = 16; 2752 while (count) { 2753 *acb_firm_version = readb(iop_firm_version); 2754 acb_firm_version++; 2755 iop_firm_version++; 2756 count--; 2757 } 2758 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2759 pACB->host->host_no, 2760 pACB->firm_model, 2761 pACB->firm_version); 2762 pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ 2763 pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ 2764 pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ 2765 pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ 2766 pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2767 /*all interrupt service will be enable at arcmsr_iop_init*/ 2768 return true; 2769} 2770 2771static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb) 2772{ 2773 char *acb_firm_model = acb->firm_model; 2774 char *acb_firm_version = acb->firm_version; 2775 char *acb_device_map = acb->device_map; 2776 char __iomem *iop_firm_model; 2777 char __iomem *iop_firm_version; 2778 char __iomem *iop_device_map; 2779 u32 count; 2780 struct MessageUnit_D *reg; 2781 void *dma_coherent2; 2782 dma_addr_t dma_coherent_handle2; 2783 struct pci_dev *pdev = acb->pdev; 2784 2785 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32); 2786 dma_coherent2 = dma_alloc_coherent(&pdev->dev, acb->roundup_ccbsize, 2787 &dma_coherent_handle2, GFP_KERNEL); 2788 if (!dma_coherent2) { 2789 pr_notice("DMA allocation failed...\n"); 2790 return false; 2791 } 2792 memset(dma_coherent2, 0, acb->roundup_ccbsize); 2793 acb->dma_coherent_handle2 = dma_coherent_handle2; 2794 acb->dma_coherent2 = dma_coherent2; 2795 reg = (struct MessageUnit_D *)dma_coherent2; 2796 acb->pmuD = reg; 2797 reg->chip_id = acb->mem_base0 + ARCMSR_ARC1214_CHIP_ID; 2798 reg->cpu_mem_config = acb->mem_base0 + 2799 ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION; 2800 reg->i2o_host_interrupt_mask = acb->mem_base0 + 2801 ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK; 2802 reg->sample_at_reset = acb->mem_base0 + ARCMSR_ARC1214_SAMPLE_RESET; 2803 reg->reset_request = acb->mem_base0 + ARCMSR_ARC1214_RESET_REQUEST; 2804 reg->host_int_status = acb->mem_base0 + 2805 ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS; 2806 reg->pcief0_int_enable = acb->mem_base0 + 2807 ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE; 2808 reg->inbound_msgaddr0 = acb->mem_base0 + 2809 ARCMSR_ARC1214_INBOUND_MESSAGE0; 2810 reg->inbound_msgaddr1 = acb->mem_base0 + 2811 ARCMSR_ARC1214_INBOUND_MESSAGE1; 2812 reg->outbound_msgaddr0 = acb->mem_base0 + 2813 ARCMSR_ARC1214_OUTBOUND_MESSAGE0; 2814 reg->outbound_msgaddr1 = acb->mem_base0 + 2815 ARCMSR_ARC1214_OUTBOUND_MESSAGE1; 2816 reg->inbound_doorbell = acb->mem_base0 + 2817 ARCMSR_ARC1214_INBOUND_DOORBELL; 2818 reg->outbound_doorbell = acb->mem_base0 + 2819 ARCMSR_ARC1214_OUTBOUND_DOORBELL; 2820 reg->outbound_doorbell_enable = acb->mem_base0 + 2821 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE; 2822 reg->inboundlist_base_low = acb->mem_base0 + 2823 ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW; 2824 reg->inboundlist_base_high = acb->mem_base0 + 2825 ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH; 2826 reg->inboundlist_write_pointer = acb->mem_base0 + 2827 ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER; 2828 reg->outboundlist_base_low = acb->mem_base0 + 2829 ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW; 2830 reg->outboundlist_base_high = acb->mem_base0 + 2831 ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH; 2832 reg->outboundlist_copy_pointer = acb->mem_base0 + 2833 ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER; 2834 reg->outboundlist_read_pointer = acb->mem_base0 + 2835 ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER; 2836 reg->outboundlist_interrupt_cause = acb->mem_base0 + 2837 ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE; 2838 reg->outboundlist_interrupt_enable = acb->mem_base0 + 2839 ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE; 2840 reg->message_wbuffer = acb->mem_base0 + ARCMSR_ARC1214_MESSAGE_WBUFFER; 2841 reg->message_rbuffer = acb->mem_base0 + ARCMSR_ARC1214_MESSAGE_RBUFFER; 2842 reg->msgcode_rwbuffer = acb->mem_base0 + 2843 ARCMSR_ARC1214_MESSAGE_RWBUFFER; 2844 iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]); 2845 iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]); 2846 iop_device_map = (char __iomem *)(®->msgcode_rwbuffer[21]); 2847 if (readl(acb->pmuD->outbound_doorbell) & 2848 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) { 2849 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, 2850 acb->pmuD->outbound_doorbell);/*clear interrupt*/ 2851 } 2852 /* post "get config" instruction */ 2853 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0); 2854 /* wait message ready */ 2855 if (!arcmsr_hbaD_wait_msgint_ready(acb)) { 2856 pr_notice("arcmsr%d: wait get adapter firmware " 2857 "miscellaneous data timeout\n", acb->host->host_no); 2858 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize, 2859 acb->dma_coherent2, acb->dma_coherent_handle2); 2860 return false; 2861 } 2862 count = 8; 2863 while (count) { 2864 *acb_firm_model = readb(iop_firm_model); 2865 acb_firm_model++; 2866 iop_firm_model++; 2867 count--; 2868 } 2869 count = 16; 2870 while (count) { 2871 *acb_firm_version = readb(iop_firm_version); 2872 acb_firm_version++; 2873 iop_firm_version++; 2874 count--; 2875 } 2876 count = 16; 2877 while (count) { 2878 *acb_device_map = readb(iop_device_map); 2879 acb_device_map++; 2880 iop_device_map++; 2881 count--; 2882 } 2883 acb->signature = readl(®->msgcode_rwbuffer[1]); 2884 /*firm_signature,1,00-03*/ 2885 acb->firm_request_len = readl(®->msgcode_rwbuffer[2]); 2886 /*firm_request_len,1,04-07*/ 2887 acb->firm_numbers_queue = readl(®->msgcode_rwbuffer[3]); 2888 /*firm_numbers_queue,2,08-11*/ 2889 acb->firm_sdram_size = readl(®->msgcode_rwbuffer[4]); 2890 /*firm_sdram_size,3,12-15*/ 2891 acb->firm_hd_channels = readl(®->msgcode_rwbuffer[5]); 2892 /*firm_hd_channels,4,16-19*/ 2893 acb->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); 2894 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2895 acb->host->host_no, 2896 acb->firm_model, 2897 acb->firm_version); 2898 return true; 2899} 2900 2901static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 2902{ 2903 bool rtn = false; 2904 2905 switch (acb->adapter_type) { 2906 case ACB_ADAPTER_TYPE_A: 2907 rtn = arcmsr_hbaA_get_config(acb); 2908 break; 2909 case ACB_ADAPTER_TYPE_B: 2910 rtn = arcmsr_hbaB_get_config(acb); 2911 break; 2912 case ACB_ADAPTER_TYPE_C: 2913 rtn = arcmsr_hbaC_get_config(acb); 2914 break; 2915 case ACB_ADAPTER_TYPE_D: 2916 rtn = arcmsr_hbaD_get_config(acb); 2917 break; 2918 default: 2919 break; 2920 } 2921 if (acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD) 2922 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD; 2923 else 2924 acb->maxOutstanding = acb->firm_numbers_queue - 1; 2925 acb->host->can_queue = acb->maxOutstanding; 2926 return rtn; 2927} 2928 2929static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb, 2930 struct CommandControlBlock *poll_ccb) 2931{ 2932 struct MessageUnit_A __iomem *reg = acb->pmuA; 2933 struct CommandControlBlock *ccb; 2934 struct ARCMSR_CDB *arcmsr_cdb; 2935 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 2936 int rtn; 2937 bool error; 2938 polling_hba_ccb_retry: 2939 poll_count++; 2940 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; 2941 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 2942 while (1) { 2943 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { 2944 if (poll_ccb_done){ 2945 rtn = SUCCESS; 2946 break; 2947 }else { 2948 msleep(25); 2949 if (poll_count > 100){ 2950 rtn = FAILED; 2951 break; 2952 } 2953 goto polling_hba_ccb_retry; 2954 } 2955 } 2956 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2957 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2958 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0; 2959 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2960 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2961 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2962 " poll command abort successfully \n" 2963 , acb->host->host_no 2964 , ccb->pcmd->device->id 2965 , (u32)ccb->pcmd->device->lun 2966 , ccb); 2967 ccb->pcmd->result = DID_ABORT << 16; 2968 arcmsr_ccb_complete(ccb); 2969 continue; 2970 } 2971 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2972 " command done ccb = '0x%p'" 2973 "ccboutstandingcount = %d \n" 2974 , acb->host->host_no 2975 , ccb 2976 , atomic_read(&acb->ccboutstandingcount)); 2977 continue; 2978 } 2979 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2980 arcmsr_report_ccb_state(acb, ccb, error); 2981 } 2982 return rtn; 2983} 2984 2985static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb, 2986 struct CommandControlBlock *poll_ccb) 2987{ 2988 struct MessageUnit_B *reg = acb->pmuB; 2989 struct ARCMSR_CDB *arcmsr_cdb; 2990 struct CommandControlBlock *ccb; 2991 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 2992 int index, rtn; 2993 bool error; 2994 polling_hbb_ccb_retry: 2995 2996 poll_count++; 2997 /* clear doorbell interrupt */ 2998 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2999 while(1){ 3000 index = reg->doneq_index; 3001 flag_ccb = reg->done_qbuffer[index]; 3002 if (flag_ccb == 0) { 3003 if (poll_ccb_done){ 3004 rtn = SUCCESS; 3005 break; 3006 }else { 3007 msleep(25); 3008 if (poll_count > 100){ 3009 rtn = FAILED; 3010 break; 3011 } 3012 goto polling_hbb_ccb_retry; 3013 } 3014 } 3015 reg->done_qbuffer[index] = 0; 3016 index++; 3017 /*if last index number set it to 0 */ 3018 index %= ARCMSR_MAX_HBB_POSTQUEUE; 3019 reg->doneq_index = index; 3020 /* check if command done with no error*/ 3021 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 3022 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 3023 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0; 3024 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 3025 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 3026 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 3027 " poll command abort successfully \n" 3028 ,acb->host->host_no 3029 ,ccb->pcmd->device->id 3030 ,(u32)ccb->pcmd->device->lun 3031 ,ccb); 3032 ccb->pcmd->result = DID_ABORT << 16; 3033 arcmsr_ccb_complete(ccb); 3034 continue; 3035 } 3036 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 3037 " command done ccb = '0x%p'" 3038 "ccboutstandingcount = %d \n" 3039 , acb->host->host_no 3040 , ccb 3041 , atomic_read(&acb->ccboutstandingcount)); 3042 continue; 3043 } 3044 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 3045 arcmsr_report_ccb_state(acb, ccb, error); 3046 } 3047 return rtn; 3048} 3049 3050static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb, 3051 struct CommandControlBlock *poll_ccb) 3052{ 3053 struct MessageUnit_C __iomem *reg = acb->pmuC; 3054 uint32_t flag_ccb, ccb_cdb_phy; 3055 struct ARCMSR_CDB *arcmsr_cdb; 3056 bool error; 3057 struct CommandControlBlock *pCCB; 3058 uint32_t poll_ccb_done = 0, poll_count = 0; 3059 int rtn; 3060polling_hbc_ccb_retry: 3061 poll_count++; 3062 while (1) { 3063 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) { 3064 if (poll_ccb_done) { 3065 rtn = SUCCESS; 3066 break; 3067 } else { 3068 msleep(25); 3069 if (poll_count > 100) { 3070 rtn = FAILED; 3071 break; 3072 } 3073 goto polling_hbc_ccb_retry; 3074 } 3075 } 3076 flag_ccb = readl(®->outbound_queueport_low); 3077 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 3078 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 3079 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 3080 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0; 3081 /* check ifcommand done with no error*/ 3082 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 3083 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 3084 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 3085 " poll command abort successfully \n" 3086 , acb->host->host_no 3087 , pCCB->pcmd->device->id 3088 , (u32)pCCB->pcmd->device->lun 3089 , pCCB); 3090 pCCB->pcmd->result = DID_ABORT << 16; 3091 arcmsr_ccb_complete(pCCB); 3092 continue; 3093 } 3094 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 3095 " command done ccb = '0x%p'" 3096 "ccboutstandingcount = %d \n" 3097 , acb->host->host_no 3098 , pCCB 3099 , atomic_read(&acb->ccboutstandingcount)); 3100 continue; 3101 } 3102 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 3103 arcmsr_report_ccb_state(acb, pCCB, error); 3104 } 3105 return rtn; 3106} 3107 3108static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb, 3109 struct CommandControlBlock *poll_ccb) 3110{ 3111 bool error; 3112 uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy; 3113 int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle; 3114 unsigned long flags; 3115 struct ARCMSR_CDB *arcmsr_cdb; 3116 struct CommandControlBlock *pCCB; 3117 struct MessageUnit_D *pmu = acb->pmuD; 3118 3119polling_hbaD_ccb_retry: 3120 poll_count++; 3121 while (1) { 3122 spin_lock_irqsave(&acb->doneq_lock, flags); 3123 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1; 3124 doneq_index = pmu->doneq_index; 3125 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) { 3126 spin_unlock_irqrestore(&acb->doneq_lock, flags); 3127 if (poll_ccb_done) { 3128 rtn = SUCCESS; 3129 break; 3130 } else { 3131 msleep(25); 3132 if (poll_count > 40) { 3133 rtn = FAILED; 3134 break; 3135 } 3136 goto polling_hbaD_ccb_retry; 3137 } 3138 } 3139 toggle = doneq_index & 0x4000; 3140 index_stripped = (doneq_index & 0xFFF) + 1; 3141 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 3142 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 3143 ((toggle ^ 0x4000) + 1); 3144 doneq_index = pmu->doneq_index; 3145 spin_unlock_irqrestore(&acb->doneq_lock, flags); 3146 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow; 3147 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 3148 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + 3149 ccb_cdb_phy); 3150 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, 3151 arcmsr_cdb); 3152 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0; 3153 if ((pCCB->acb != acb) || 3154 (pCCB->startdone != ARCMSR_CCB_START)) { 3155 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 3156 pr_notice("arcmsr%d: scsi id = %d " 3157 "lun = %d ccb = '0x%p' poll command " 3158 "abort successfully\n" 3159 , acb->host->host_no 3160 , pCCB->pcmd->device->id 3161 , (u32)pCCB->pcmd->device->lun 3162 , pCCB); 3163 pCCB->pcmd->result = DID_ABORT << 16; 3164 arcmsr_ccb_complete(pCCB); 3165 continue; 3166 } 3167 pr_notice("arcmsr%d: polling an illegal " 3168 "ccb command done ccb = '0x%p' " 3169 "ccboutstandingcount = %d\n" 3170 , acb->host->host_no 3171 , pCCB 3172 , atomic_read(&acb->ccboutstandingcount)); 3173 continue; 3174 } 3175 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 3176 ? true : false; 3177 arcmsr_report_ccb_state(acb, pCCB, error); 3178 } 3179 return rtn; 3180} 3181 3182static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 3183 struct CommandControlBlock *poll_ccb) 3184{ 3185 int rtn = 0; 3186 switch (acb->adapter_type) { 3187 3188 case ACB_ADAPTER_TYPE_A: { 3189 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb); 3190 } 3191 break; 3192 3193 case ACB_ADAPTER_TYPE_B: { 3194 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb); 3195 } 3196 break; 3197 case ACB_ADAPTER_TYPE_C: { 3198 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb); 3199 } 3200 break; 3201 case ACB_ADAPTER_TYPE_D: 3202 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb); 3203 break; 3204 } 3205 return rtn; 3206} 3207 3208static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 3209{ 3210 uint32_t cdb_phyaddr, cdb_phyaddr_hi32; 3211 dma_addr_t dma_coherent_handle; 3212 3213 /* 3214 ******************************************************************** 3215 ** here we need to tell iop 331 our freeccb.HighPart 3216 ** if freeccb.HighPart is not zero 3217 ******************************************************************** 3218 */ 3219 switch (acb->adapter_type) { 3220 case ACB_ADAPTER_TYPE_B: 3221 case ACB_ADAPTER_TYPE_D: 3222 dma_coherent_handle = acb->dma_coherent_handle2; 3223 break; 3224 default: 3225 dma_coherent_handle = acb->dma_coherent_handle; 3226 break; 3227 } 3228 cdb_phyaddr = lower_32_bits(dma_coherent_handle); 3229 cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle); 3230 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; 3231 /* 3232 *********************************************************************** 3233 ** if adapter type B, set window of "post command Q" 3234 *********************************************************************** 3235 */ 3236 switch (acb->adapter_type) { 3237 3238 case ACB_ADAPTER_TYPE_A: { 3239 if (cdb_phyaddr_hi32 != 0) { 3240 struct MessageUnit_A __iomem *reg = acb->pmuA; 3241 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 3242 ®->message_rwbuffer[0]); 3243 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); 3244 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 3245 ®->inbound_msgaddr0); 3246 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 3247 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ 3248 part physical address timeout\n", 3249 acb->host->host_no); 3250 return 1; 3251 } 3252 } 3253 } 3254 break; 3255 3256 case ACB_ADAPTER_TYPE_B: { 3257 uint32_t __iomem *rwbuffer; 3258 3259 struct MessageUnit_B *reg = acb->pmuB; 3260 reg->postq_index = 0; 3261 reg->doneq_index = 0; 3262 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); 3263 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3264 printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \ 3265 acb->host->host_no); 3266 return 1; 3267 } 3268 rwbuffer = reg->message_rwbuffer; 3269 /* driver "set config" signature */ 3270 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 3271 /* normal should be zero */ 3272 writel(cdb_phyaddr_hi32, rwbuffer++); 3273 /* postQ size (256 + 8)*4 */ 3274 writel(cdb_phyaddr, rwbuffer++); 3275 /* doneQ size (256 + 8)*4 */ 3276 writel(cdb_phyaddr + 1056, rwbuffer++); 3277 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 3278 writel(1056, rwbuffer); 3279 3280 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); 3281 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3282 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 3283 timeout \n",acb->host->host_no); 3284 return 1; 3285 } 3286 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 3287 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3288 pr_err("arcmsr%d: can't set driver mode.\n", 3289 acb->host->host_no); 3290 return 1; 3291 } 3292 } 3293 break; 3294 case ACB_ADAPTER_TYPE_C: { 3295 if (cdb_phyaddr_hi32 != 0) { 3296 struct MessageUnit_C __iomem *reg = acb->pmuC; 3297 3298 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n", 3299 acb->adapter_index, cdb_phyaddr_hi32); 3300 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); 3301 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); 3302 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); 3303 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 3304 if (!arcmsr_hbaC_wait_msgint_ready(acb)) { 3305 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 3306 timeout \n", acb->host->host_no); 3307 return 1; 3308 } 3309 } 3310 } 3311 break; 3312 case ACB_ADAPTER_TYPE_D: { 3313 uint32_t __iomem *rwbuffer; 3314 struct MessageUnit_D *reg = acb->pmuD; 3315 reg->postq_index = 0; 3316 reg->doneq_index = 0; 3317 rwbuffer = reg->msgcode_rwbuffer; 3318 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 3319 writel(cdb_phyaddr_hi32, rwbuffer++); 3320 writel(cdb_phyaddr, rwbuffer++); 3321 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE * 3322 sizeof(struct InBound_SRB)), rwbuffer++); 3323 writel(0x100, rwbuffer); 3324 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0); 3325 if (!arcmsr_hbaD_wait_msgint_ready(acb)) { 3326 pr_notice("arcmsr%d: 'set command Q window' timeout\n", 3327 acb->host->host_no); 3328 return 1; 3329 } 3330 } 3331 break; 3332 } 3333 return 0; 3334} 3335 3336static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) 3337{ 3338 uint32_t firmware_state = 0; 3339 switch (acb->adapter_type) { 3340 3341 case ACB_ADAPTER_TYPE_A: { 3342 struct MessageUnit_A __iomem *reg = acb->pmuA; 3343 do { 3344 firmware_state = readl(®->outbound_msgaddr1); 3345 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); 3346 } 3347 break; 3348 3349 case ACB_ADAPTER_TYPE_B: { 3350 struct MessageUnit_B *reg = acb->pmuB; 3351 do { 3352 firmware_state = readl(reg->iop2drv_doorbell); 3353 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 3354 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 3355 } 3356 break; 3357 case ACB_ADAPTER_TYPE_C: { 3358 struct MessageUnit_C __iomem *reg = acb->pmuC; 3359 do { 3360 firmware_state = readl(®->outbound_msgaddr1); 3361 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 3362 } 3363 break; 3364 case ACB_ADAPTER_TYPE_D: { 3365 struct MessageUnit_D *reg = acb->pmuD; 3366 do { 3367 firmware_state = readl(reg->outbound_msgaddr1); 3368 } while ((firmware_state & 3369 ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0); 3370 } 3371 break; 3372 } 3373} 3374 3375static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb) 3376{ 3377 struct MessageUnit_A __iomem *reg = acb->pmuA; 3378 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 3379 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3380 return; 3381 } else { 3382 acb->fw_flag = FW_NORMAL; 3383 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ 3384 atomic_set(&acb->rq_map_token, 16); 3385 } 3386 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3387 if (atomic_dec_and_test(&acb->rq_map_token)) { 3388 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3389 return; 3390 } 3391 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 3392 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3393 } 3394 return; 3395} 3396 3397static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb) 3398{ 3399 struct MessageUnit_B *reg = acb->pmuB; 3400 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 3401 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3402 return; 3403 } else { 3404 acb->fw_flag = FW_NORMAL; 3405 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 3406 atomic_set(&acb->rq_map_token, 16); 3407 } 3408 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3409 if (atomic_dec_and_test(&acb->rq_map_token)) { 3410 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3411 return; 3412 } 3413 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 3414 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3415 } 3416 return; 3417} 3418 3419static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb) 3420{ 3421 struct MessageUnit_C __iomem *reg = acb->pmuC; 3422 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { 3423 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3424 return; 3425 } else { 3426 acb->fw_flag = FW_NORMAL; 3427 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 3428 atomic_set(&acb->rq_map_token, 16); 3429 } 3430 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3431 if (atomic_dec_and_test(&acb->rq_map_token)) { 3432 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3433 return; 3434 } 3435 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 3436 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 3437 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3438 } 3439 return; 3440} 3441 3442static void arcmsr_hbaD_request_device_map(struct AdapterControlBlock *acb) 3443{ 3444 struct MessageUnit_D *reg = acb->pmuD; 3445 3446 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || 3447 ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || 3448 ((acb->acb_flags & ACB_F_ABORT) != 0)) { 3449 mod_timer(&acb->eternal_timer, 3450 jiffies + msecs_to_jiffies(6 * HZ)); 3451 } else { 3452 acb->fw_flag = FW_NORMAL; 3453 if (atomic_read(&acb->ante_token_value) == 3454 atomic_read(&acb->rq_map_token)) { 3455 atomic_set(&acb->rq_map_token, 16); 3456 } 3457 atomic_set(&acb->ante_token_value, 3458 atomic_read(&acb->rq_map_token)); 3459 if (atomic_dec_and_test(&acb->rq_map_token)) { 3460 mod_timer(&acb->eternal_timer, jiffies + 3461 msecs_to_jiffies(6 * HZ)); 3462 return; 3463 } 3464 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, 3465 reg->inbound_msgaddr0); 3466 mod_timer(&acb->eternal_timer, jiffies + 3467 msecs_to_jiffies(6 * HZ)); 3468 } 3469} 3470 3471static void arcmsr_request_device_map(unsigned long pacb) 3472{ 3473 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; 3474 switch (acb->adapter_type) { 3475 case ACB_ADAPTER_TYPE_A: { 3476 arcmsr_hbaA_request_device_map(acb); 3477 } 3478 break; 3479 case ACB_ADAPTER_TYPE_B: { 3480 arcmsr_hbaB_request_device_map(acb); 3481 } 3482 break; 3483 case ACB_ADAPTER_TYPE_C: { 3484 arcmsr_hbaC_request_device_map(acb); 3485 } 3486 break; 3487 case ACB_ADAPTER_TYPE_D: 3488 arcmsr_hbaD_request_device_map(acb); 3489 break; 3490 } 3491} 3492 3493static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb) 3494{ 3495 struct MessageUnit_A __iomem *reg = acb->pmuA; 3496 acb->acb_flags |= ACB_F_MSG_START_BGRB; 3497 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); 3498 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 3499 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3500 rebulid' timeout \n", acb->host->host_no); 3501 } 3502} 3503 3504static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb) 3505{ 3506 struct MessageUnit_B *reg = acb->pmuB; 3507 acb->acb_flags |= ACB_F_MSG_START_BGRB; 3508 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); 3509 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3510 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3511 rebulid' timeout \n",acb->host->host_no); 3512 } 3513} 3514 3515static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB) 3516{ 3517 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 3518 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 3519 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); 3520 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); 3521 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 3522 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3523 rebulid' timeout \n", pACB->host->host_no); 3524 } 3525 return; 3526} 3527 3528static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB) 3529{ 3530 struct MessageUnit_D *pmu = pACB->pmuD; 3531 3532 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 3533 writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0); 3534 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) { 3535 pr_notice("arcmsr%d: wait 'start adapter " 3536 "background rebulid' timeout\n", pACB->host->host_no); 3537 } 3538} 3539 3540static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 3541{ 3542 switch (acb->adapter_type) { 3543 case ACB_ADAPTER_TYPE_A: 3544 arcmsr_hbaA_start_bgrb(acb); 3545 break; 3546 case ACB_ADAPTER_TYPE_B: 3547 arcmsr_hbaB_start_bgrb(acb); 3548 break; 3549 case ACB_ADAPTER_TYPE_C: 3550 arcmsr_hbaC_start_bgrb(acb); 3551 break; 3552 case ACB_ADAPTER_TYPE_D: 3553 arcmsr_hbaD_start_bgrb(acb); 3554 break; 3555 } 3556} 3557 3558static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) 3559{ 3560 switch (acb->adapter_type) { 3561 case ACB_ADAPTER_TYPE_A: { 3562 struct MessageUnit_A __iomem *reg = acb->pmuA; 3563 uint32_t outbound_doorbell; 3564 /* empty doorbell Qbuffer if door bell ringed */ 3565 outbound_doorbell = readl(®->outbound_doorbell); 3566 /*clear doorbell interrupt */ 3567 writel(outbound_doorbell, ®->outbound_doorbell); 3568 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 3569 } 3570 break; 3571 3572 case ACB_ADAPTER_TYPE_B: { 3573 struct MessageUnit_B *reg = acb->pmuB; 3574 /*clear interrupt and message state*/ 3575 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 3576 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 3577 /* let IOP know data has been read */ 3578 } 3579 break; 3580 case ACB_ADAPTER_TYPE_C: { 3581 struct MessageUnit_C __iomem *reg = acb->pmuC; 3582 uint32_t outbound_doorbell, i; 3583 /* empty doorbell Qbuffer if door bell ringed */ 3584 outbound_doorbell = readl(®->outbound_doorbell); 3585 writel(outbound_doorbell, ®->outbound_doorbell_clear); 3586 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 3587 for (i = 0; i < 200; i++) { 3588 msleep(20); 3589 outbound_doorbell = readl(®->outbound_doorbell); 3590 if (outbound_doorbell & 3591 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { 3592 writel(outbound_doorbell, 3593 ®->outbound_doorbell_clear); 3594 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, 3595 ®->inbound_doorbell); 3596 } else 3597 break; 3598 } 3599 } 3600 break; 3601 case ACB_ADAPTER_TYPE_D: { 3602 struct MessageUnit_D *reg = acb->pmuD; 3603 uint32_t outbound_doorbell, i; 3604 /* empty doorbell Qbuffer if door bell ringed */ 3605 outbound_doorbell = readl(reg->outbound_doorbell); 3606 writel(outbound_doorbell, reg->outbound_doorbell); 3607 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 3608 reg->inbound_doorbell); 3609 for (i = 0; i < 200; i++) { 3610 msleep(20); 3611 outbound_doorbell = readl(reg->outbound_doorbell); 3612 if (outbound_doorbell & 3613 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) { 3614 writel(outbound_doorbell, 3615 reg->outbound_doorbell); 3616 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 3617 reg->inbound_doorbell); 3618 } else 3619 break; 3620 } 3621 } 3622 break; 3623 } 3624} 3625 3626static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 3627{ 3628 switch (acb->adapter_type) { 3629 case ACB_ADAPTER_TYPE_A: 3630 return; 3631 case ACB_ADAPTER_TYPE_B: 3632 { 3633 struct MessageUnit_B *reg = acb->pmuB; 3634 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); 3635 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3636 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 3637 return; 3638 } 3639 } 3640 break; 3641 case ACB_ADAPTER_TYPE_C: 3642 return; 3643 } 3644 return; 3645} 3646 3647static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) 3648{ 3649 uint8_t value[64]; 3650 int i, count = 0; 3651 struct MessageUnit_A __iomem *pmuA = acb->pmuA; 3652 struct MessageUnit_C __iomem *pmuC = acb->pmuC; 3653 struct MessageUnit_D *pmuD = acb->pmuD; 3654 3655 /* backup pci config data */ 3656 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); 3657 for (i = 0; i < 64; i++) { 3658 pci_read_config_byte(acb->pdev, i, &value[i]); 3659 } 3660 /* hardware reset signal */ 3661 if ((acb->dev_id == 0x1680)) { 3662 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); 3663 } else if ((acb->dev_id == 0x1880)) { 3664 do { 3665 count++; 3666 writel(0xF, &pmuC->write_sequence); 3667 writel(0x4, &pmuC->write_sequence); 3668 writel(0xB, &pmuC->write_sequence); 3669 writel(0x2, &pmuC->write_sequence); 3670 writel(0x7, &pmuC->write_sequence); 3671 writel(0xD, &pmuC->write_sequence); 3672 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); 3673 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); 3674 } else if ((acb->dev_id == 0x1214)) { 3675 writel(0x20, pmuD->reset_request); 3676 } else { 3677 pci_write_config_byte(acb->pdev, 0x84, 0x20); 3678 } 3679 msleep(2000); 3680 /* write back pci config data */ 3681 for (i = 0; i < 64; i++) { 3682 pci_write_config_byte(acb->pdev, i, value[i]); 3683 } 3684 msleep(1000); 3685 return; 3686} 3687static void arcmsr_iop_init(struct AdapterControlBlock *acb) 3688{ 3689 uint32_t intmask_org; 3690 /* disable all outbound interrupt */ 3691 intmask_org = arcmsr_disable_outbound_ints(acb); 3692 arcmsr_wait_firmware_ready(acb); 3693 arcmsr_iop_confirm(acb); 3694 /*start background rebuild*/ 3695 arcmsr_start_adapter_bgrb(acb); 3696 /* empty doorbell Qbuffer if door bell ringed */ 3697 arcmsr_clear_doorbell_queue_buffer(acb); 3698 arcmsr_enable_eoi_mode(acb); 3699 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3700 arcmsr_enable_outbound_ints(acb, intmask_org); 3701 acb->acb_flags |= ACB_F_IOP_INITED; 3702} 3703 3704static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) 3705{ 3706 struct CommandControlBlock *ccb; 3707 uint32_t intmask_org; 3708 uint8_t rtnval = 0x00; 3709 int i = 0; 3710 unsigned long flags; 3711 3712 if (atomic_read(&acb->ccboutstandingcount) != 0) { 3713 /* disable all outbound interrupt */ 3714 intmask_org = arcmsr_disable_outbound_ints(acb); 3715 /* talk to iop 331 outstanding command aborted */ 3716 rtnval = arcmsr_abort_allcmd(acb); 3717 /* clear all outbound posted Q */ 3718 arcmsr_done4abort_postqueue(acb); 3719 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3720 ccb = acb->pccb_pool[i]; 3721 if (ccb->startdone == ARCMSR_CCB_START) { 3722 scsi_dma_unmap(ccb->pcmd); 3723 ccb->startdone = ARCMSR_CCB_DONE; 3724 ccb->ccb_flags = 0; 3725 spin_lock_irqsave(&acb->ccblist_lock, flags); 3726 list_add_tail(&ccb->list, &acb->ccb_free_list); 3727 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 3728 } 3729 } 3730 atomic_set(&acb->ccboutstandingcount, 0); 3731 /* enable all outbound interrupt */ 3732 arcmsr_enable_outbound_ints(acb, intmask_org); 3733 return rtnval; 3734 } 3735 return rtnval; 3736} 3737 3738static int arcmsr_bus_reset(struct scsi_cmnd *cmd) 3739{ 3740 struct AdapterControlBlock *acb; 3741 uint32_t intmask_org, outbound_doorbell; 3742 int retry_count = 0; 3743 int rtn = FAILED; 3744 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata; 3745 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts); 3746 acb->num_resets++; 3747 3748 switch(acb->adapter_type){ 3749 case ACB_ADAPTER_TYPE_A:{ 3750 if (acb->acb_flags & ACB_F_BUS_RESET){ 3751 long timeout; 3752 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3753 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3754 if (timeout) { 3755 return SUCCESS; 3756 } 3757 } 3758 acb->acb_flags |= ACB_F_BUS_RESET; 3759 if (!arcmsr_iop_reset(acb)) { 3760 struct MessageUnit_A __iomem *reg; 3761 reg = acb->pmuA; 3762 arcmsr_hardware_reset(acb); 3763 acb->acb_flags &= ~ACB_F_IOP_INITED; 3764sleep_again: 3765 ssleep(ARCMSR_SLEEPTIME); 3766 if ((readl(®->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) { 3767 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 3768 if (retry_count > ARCMSR_RETRYCOUNT) { 3769 acb->fw_flag = FW_DEADLOCK; 3770 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 3771 return FAILED; 3772 } 3773 retry_count++; 3774 goto sleep_again; 3775 } 3776 acb->acb_flags |= ACB_F_IOP_INITED; 3777 /* disable all outbound interrupt */ 3778 intmask_org = arcmsr_disable_outbound_ints(acb); 3779 arcmsr_get_firmware_spec(acb); 3780 arcmsr_start_adapter_bgrb(acb); 3781 /* clear Qbuffer if door bell ringed */ 3782 outbound_doorbell = readl(®->outbound_doorbell); 3783 writel(outbound_doorbell, ®->outbound_doorbell); /*clear interrupt */ 3784 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 3785 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3786 arcmsr_enable_outbound_ints(acb, intmask_org); 3787 atomic_set(&acb->rq_map_token, 16); 3788 atomic_set(&acb->ante_token_value, 16); 3789 acb->fw_flag = FW_NORMAL; 3790 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3791 acb->acb_flags &= ~ACB_F_BUS_RESET; 3792 rtn = SUCCESS; 3793 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3794 } else { 3795 acb->acb_flags &= ~ACB_F_BUS_RESET; 3796 atomic_set(&acb->rq_map_token, 16); 3797 atomic_set(&acb->ante_token_value, 16); 3798 acb->fw_flag = FW_NORMAL; 3799 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3800 rtn = SUCCESS; 3801 } 3802 break; 3803 } 3804 case ACB_ADAPTER_TYPE_B:{ 3805 acb->acb_flags |= ACB_F_BUS_RESET; 3806 if (!arcmsr_iop_reset(acb)) { 3807 acb->acb_flags &= ~ACB_F_BUS_RESET; 3808 rtn = FAILED; 3809 } else { 3810 acb->acb_flags &= ~ACB_F_BUS_RESET; 3811 atomic_set(&acb->rq_map_token, 16); 3812 atomic_set(&acb->ante_token_value, 16); 3813 acb->fw_flag = FW_NORMAL; 3814 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3815 rtn = SUCCESS; 3816 } 3817 break; 3818 } 3819 case ACB_ADAPTER_TYPE_C:{ 3820 if (acb->acb_flags & ACB_F_BUS_RESET) { 3821 long timeout; 3822 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3823 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3824 if (timeout) { 3825 return SUCCESS; 3826 } 3827 } 3828 acb->acb_flags |= ACB_F_BUS_RESET; 3829 if (!arcmsr_iop_reset(acb)) { 3830 struct MessageUnit_C __iomem *reg; 3831 reg = acb->pmuC; 3832 arcmsr_hardware_reset(acb); 3833 acb->acb_flags &= ~ACB_F_IOP_INITED; 3834sleep: 3835 ssleep(ARCMSR_SLEEPTIME); 3836 if ((readl(®->host_diagnostic) & 0x04) != 0) { 3837 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 3838 if (retry_count > ARCMSR_RETRYCOUNT) { 3839 acb->fw_flag = FW_DEADLOCK; 3840 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 3841 return FAILED; 3842 } 3843 retry_count++; 3844 goto sleep; 3845 } 3846 acb->acb_flags |= ACB_F_IOP_INITED; 3847 /* disable all outbound interrupt */ 3848 intmask_org = arcmsr_disable_outbound_ints(acb); 3849 arcmsr_get_firmware_spec(acb); 3850 arcmsr_start_adapter_bgrb(acb); 3851 /* clear Qbuffer if door bell ringed */ 3852 arcmsr_clear_doorbell_queue_buffer(acb); 3853 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3854 arcmsr_enable_outbound_ints(acb, intmask_org); 3855 atomic_set(&acb->rq_map_token, 16); 3856 atomic_set(&acb->ante_token_value, 16); 3857 acb->fw_flag = FW_NORMAL; 3858 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3859 acb->acb_flags &= ~ACB_F_BUS_RESET; 3860 rtn = SUCCESS; 3861 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3862 } else { 3863 acb->acb_flags &= ~ACB_F_BUS_RESET; 3864 atomic_set(&acb->rq_map_token, 16); 3865 atomic_set(&acb->ante_token_value, 16); 3866 acb->fw_flag = FW_NORMAL; 3867 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3868 rtn = SUCCESS; 3869 } 3870 break; 3871 } 3872 case ACB_ADAPTER_TYPE_D: { 3873 if (acb->acb_flags & ACB_F_BUS_RESET) { 3874 long timeout; 3875 pr_notice("arcmsr: there is an bus reset" 3876 " eh proceeding.......\n"); 3877 timeout = wait_event_timeout(wait_q, (acb->acb_flags 3878 & ACB_F_BUS_RESET) == 0, 220 * HZ); 3879 if (timeout) 3880 return SUCCESS; 3881 } 3882 acb->acb_flags |= ACB_F_BUS_RESET; 3883 if (!arcmsr_iop_reset(acb)) { 3884 struct MessageUnit_D *reg; 3885 reg = acb->pmuD; 3886 arcmsr_hardware_reset(acb); 3887 acb->acb_flags &= ~ACB_F_IOP_INITED; 3888 nap: 3889 ssleep(ARCMSR_SLEEPTIME); 3890 if ((readl(reg->sample_at_reset) & 0x80) != 0) { 3891 pr_err("arcmsr%d: waiting for " 3892 "hw bus reset return, retry=%d\n", 3893 acb->host->host_no, retry_count); 3894 if (retry_count > ARCMSR_RETRYCOUNT) { 3895 acb->fw_flag = FW_DEADLOCK; 3896 pr_err("arcmsr%d: waiting for hw bus" 3897 " reset return, " 3898 "RETRY TERMINATED!!\n", 3899 acb->host->host_no); 3900 return FAILED; 3901 } 3902 retry_count++; 3903 goto nap; 3904 } 3905 acb->acb_flags |= ACB_F_IOP_INITED; 3906 /* disable all outbound interrupt */ 3907 intmask_org = arcmsr_disable_outbound_ints(acb); 3908 arcmsr_get_firmware_spec(acb); 3909 arcmsr_start_adapter_bgrb(acb); 3910 arcmsr_clear_doorbell_queue_buffer(acb); 3911 arcmsr_enable_outbound_ints(acb, intmask_org); 3912 atomic_set(&acb->rq_map_token, 16); 3913 atomic_set(&acb->ante_token_value, 16); 3914 acb->fw_flag = FW_NORMAL; 3915 mod_timer(&acb->eternal_timer, 3916 jiffies + msecs_to_jiffies(6 * HZ)); 3917 acb->acb_flags &= ~ACB_F_BUS_RESET; 3918 rtn = SUCCESS; 3919 pr_err("arcmsr: scsi bus reset " 3920 "eh returns with success\n"); 3921 } else { 3922 acb->acb_flags &= ~ACB_F_BUS_RESET; 3923 atomic_set(&acb->rq_map_token, 16); 3924 atomic_set(&acb->ante_token_value, 16); 3925 acb->fw_flag = FW_NORMAL; 3926 mod_timer(&acb->eternal_timer, 3927 jiffies + msecs_to_jiffies(6 * HZ)); 3928 rtn = SUCCESS; 3929 } 3930 break; 3931 } 3932 } 3933 return rtn; 3934} 3935 3936static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 3937 struct CommandControlBlock *ccb) 3938{ 3939 int rtn; 3940 rtn = arcmsr_polling_ccbdone(acb, ccb); 3941 return rtn; 3942} 3943 3944static int arcmsr_abort(struct scsi_cmnd *cmd) 3945{ 3946 struct AdapterControlBlock *acb = 3947 (struct AdapterControlBlock *)cmd->device->host->hostdata; 3948 int i = 0; 3949 int rtn = FAILED; 3950 uint32_t intmask_org; 3951 3952 printk(KERN_NOTICE 3953 "arcmsr%d: abort device command of scsi id = %d lun = %d\n", 3954 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun); 3955 acb->acb_flags |= ACB_F_ABORT; 3956 acb->num_aborts++; 3957 /* 3958 ************************************************ 3959 ** the all interrupt service routine is locked 3960 ** we need to handle it as soon as possible and exit 3961 ************************************************ 3962 */ 3963 if (!atomic_read(&acb->ccboutstandingcount)) { 3964 acb->acb_flags &= ~ACB_F_ABORT; 3965 return rtn; 3966 } 3967 3968 intmask_org = arcmsr_disable_outbound_ints(acb); 3969 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3970 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 3971 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 3972 ccb->startdone = ARCMSR_CCB_ABORTED; 3973 rtn = arcmsr_abort_one_cmd(acb, ccb); 3974 break; 3975 } 3976 } 3977 acb->acb_flags &= ~ACB_F_ABORT; 3978 arcmsr_enable_outbound_ints(acb, intmask_org); 3979 return rtn; 3980} 3981 3982static const char *arcmsr_info(struct Scsi_Host *host) 3983{ 3984 struct AdapterControlBlock *acb = 3985 (struct AdapterControlBlock *) host->hostdata; 3986 static char buf[256]; 3987 char *type; 3988 int raid6 = 1; 3989 switch (acb->pdev->device) { 3990 case PCI_DEVICE_ID_ARECA_1110: 3991 case PCI_DEVICE_ID_ARECA_1200: 3992 case PCI_DEVICE_ID_ARECA_1202: 3993 case PCI_DEVICE_ID_ARECA_1210: 3994 raid6 = 0; 3995 /*FALLTHRU*/ 3996 case PCI_DEVICE_ID_ARECA_1120: 3997 case PCI_DEVICE_ID_ARECA_1130: 3998 case PCI_DEVICE_ID_ARECA_1160: 3999 case PCI_DEVICE_ID_ARECA_1170: 4000 case PCI_DEVICE_ID_ARECA_1201: 4001 case PCI_DEVICE_ID_ARECA_1220: 4002 case PCI_DEVICE_ID_ARECA_1230: 4003 case PCI_DEVICE_ID_ARECA_1260: 4004 case PCI_DEVICE_ID_ARECA_1270: 4005 case PCI_DEVICE_ID_ARECA_1280: 4006 type = "SATA"; 4007 break; 4008 case PCI_DEVICE_ID_ARECA_1214: 4009 case PCI_DEVICE_ID_ARECA_1380: 4010 case PCI_DEVICE_ID_ARECA_1381: 4011 case PCI_DEVICE_ID_ARECA_1680: 4012 case PCI_DEVICE_ID_ARECA_1681: 4013 case PCI_DEVICE_ID_ARECA_1880: 4014 type = "SAS/SATA"; 4015 break; 4016 default: 4017 type = "unknown"; 4018 raid6 = 0; 4019 break; 4020 } 4021 sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n", 4022 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION); 4023 return buf; 4024} 4025