1/* 2 * Real Time Clock interface for Linux on Atmel AT91RM9200 3 * 4 * Copyright (C) 2002 Rick Bronson 5 * 6 * Converted to RTC class model by Andrew Victor 7 * 8 * Ported to Linux 2.6 by Steven Scholz 9 * Based on s3c2410-rtc.c Simtec Electronics 10 * 11 * Based on sa1100-rtc.c by Nils Faerber 12 * Based on rtc.c by Paul Gortmaker 13 * 14 * This program is free software; you can redistribute it and/or 15 * modify it under the terms of the GNU General Public License 16 * as published by the Free Software Foundation; either version 17 * 2 of the License, or (at your option) any later version. 18 * 19 */ 20 21#include <linux/bcd.h> 22#include <linux/clk.h> 23#include <linux/completion.h> 24#include <linux/interrupt.h> 25#include <linux/ioctl.h> 26#include <linux/io.h> 27#include <linux/kernel.h> 28#include <linux/module.h> 29#include <linux/of_device.h> 30#include <linux/of.h> 31#include <linux/platform_device.h> 32#include <linux/rtc.h> 33#include <linux/spinlock.h> 34#include <linux/suspend.h> 35#include <linux/time.h> 36#include <linux/uaccess.h> 37 38#include "rtc-at91rm9200.h" 39 40#define at91_rtc_read(field) \ 41 readl_relaxed(at91_rtc_regs + field) 42#define at91_rtc_write(field, val) \ 43 writel_relaxed((val), at91_rtc_regs + field) 44 45#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ 46 47struct at91_rtc_config { 48 bool use_shadow_imr; 49}; 50 51static const struct at91_rtc_config *at91_rtc_config; 52static DECLARE_COMPLETION(at91_rtc_updated); 53static DECLARE_COMPLETION(at91_rtc_upd_rdy); 54static unsigned int at91_alarm_year = AT91_RTC_EPOCH; 55static void __iomem *at91_rtc_regs; 56static int irq; 57static DEFINE_SPINLOCK(at91_rtc_lock); 58static u32 at91_rtc_shadow_imr; 59static bool suspended; 60static DEFINE_SPINLOCK(suspended_lock); 61static unsigned long cached_events; 62static u32 at91_rtc_imr; 63static struct clk *sclk; 64 65static void at91_rtc_write_ier(u32 mask) 66{ 67 unsigned long flags; 68 69 spin_lock_irqsave(&at91_rtc_lock, flags); 70 at91_rtc_shadow_imr |= mask; 71 at91_rtc_write(AT91_RTC_IER, mask); 72 spin_unlock_irqrestore(&at91_rtc_lock, flags); 73} 74 75static void at91_rtc_write_idr(u32 mask) 76{ 77 unsigned long flags; 78 79 spin_lock_irqsave(&at91_rtc_lock, flags); 80 at91_rtc_write(AT91_RTC_IDR, mask); 81 /* 82 * Register read back (of any RTC-register) needed to make sure 83 * IDR-register write has reached the peripheral before updating 84 * shadow mask. 85 * 86 * Note that there is still a possibility that the mask is updated 87 * before interrupts have actually been disabled in hardware. The only 88 * way to be certain would be to poll the IMR-register, which is is 89 * the very register we are trying to emulate. The register read back 90 * is a reasonable heuristic. 91 */ 92 at91_rtc_read(AT91_RTC_SR); 93 at91_rtc_shadow_imr &= ~mask; 94 spin_unlock_irqrestore(&at91_rtc_lock, flags); 95} 96 97static u32 at91_rtc_read_imr(void) 98{ 99 unsigned long flags; 100 u32 mask; 101 102 if (at91_rtc_config->use_shadow_imr) { 103 spin_lock_irqsave(&at91_rtc_lock, flags); 104 mask = at91_rtc_shadow_imr; 105 spin_unlock_irqrestore(&at91_rtc_lock, flags); 106 } else { 107 mask = at91_rtc_read(AT91_RTC_IMR); 108 } 109 110 return mask; 111} 112 113/* 114 * Decode time/date into rtc_time structure 115 */ 116static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg, 117 struct rtc_time *tm) 118{ 119 unsigned int time, date; 120 121 /* must read twice in case it changes */ 122 do { 123 time = at91_rtc_read(timereg); 124 date = at91_rtc_read(calreg); 125 } while ((time != at91_rtc_read(timereg)) || 126 (date != at91_rtc_read(calreg))); 127 128 tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0); 129 tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8); 130 tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16); 131 132 /* 133 * The Calendar Alarm register does not have a field for 134 * the year - so these will return an invalid value. When an 135 * alarm is set, at91_alarm_year will store the current year. 136 */ 137 tm->tm_year = bcd2bin(date & AT91_RTC_CENT) * 100; /* century */ 138 tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8); /* year */ 139 140 tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1; /* day of the week [0-6], Sunday=0 */ 141 tm->tm_mon = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1; 142 tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24); 143} 144 145/* 146 * Read current time and date in RTC 147 */ 148static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm) 149{ 150 at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm); 151 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); 152 tm->tm_year = tm->tm_year - 1900; 153 154 dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, 155 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, 156 tm->tm_hour, tm->tm_min, tm->tm_sec); 157 158 return 0; 159} 160 161/* 162 * Set current time and date in RTC 163 */ 164static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) 165{ 166 unsigned long cr; 167 168 dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, 169 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, 170 tm->tm_hour, tm->tm_min, tm->tm_sec); 171 172 wait_for_completion(&at91_rtc_upd_rdy); 173 174 /* Stop Time/Calendar from counting */ 175 cr = at91_rtc_read(AT91_RTC_CR); 176 at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); 177 178 at91_rtc_write_ier(AT91_RTC_ACKUPD); 179 wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ 180 at91_rtc_write_idr(AT91_RTC_ACKUPD); 181 182 at91_rtc_write(AT91_RTC_TIMR, 183 bin2bcd(tm->tm_sec) << 0 184 | bin2bcd(tm->tm_min) << 8 185 | bin2bcd(tm->tm_hour) << 16); 186 187 at91_rtc_write(AT91_RTC_CALR, 188 bin2bcd((tm->tm_year + 1900) / 100) /* century */ 189 | bin2bcd(tm->tm_year % 100) << 8 /* year */ 190 | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ 191 | bin2bcd(tm->tm_wday + 1) << 21 /* day of the week [0-6], Sunday=0 */ 192 | bin2bcd(tm->tm_mday) << 24); 193 194 /* Restart Time/Calendar */ 195 cr = at91_rtc_read(AT91_RTC_CR); 196 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV); 197 at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); 198 at91_rtc_write_ier(AT91_RTC_SECEV); 199 200 return 0; 201} 202 203/* 204 * Read alarm time and date in RTC 205 */ 206static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) 207{ 208 struct rtc_time *tm = &alrm->time; 209 210 at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm); 211 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); 212 tm->tm_year = at91_alarm_year - 1900; 213 214 alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM) 215 ? 1 : 0; 216 217 dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, 218 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, 219 tm->tm_hour, tm->tm_min, tm->tm_sec); 220 221 return 0; 222} 223 224/* 225 * Set alarm time and date in RTC 226 */ 227static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) 228{ 229 struct rtc_time tm; 230 231 at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm); 232 233 at91_alarm_year = tm.tm_year; 234 235 tm.tm_mon = alrm->time.tm_mon; 236 tm.tm_mday = alrm->time.tm_mday; 237 tm.tm_hour = alrm->time.tm_hour; 238 tm.tm_min = alrm->time.tm_min; 239 tm.tm_sec = alrm->time.tm_sec; 240 241 at91_rtc_write_idr(AT91_RTC_ALARM); 242 at91_rtc_write(AT91_RTC_TIMALR, 243 bin2bcd(tm.tm_sec) << 0 244 | bin2bcd(tm.tm_min) << 8 245 | bin2bcd(tm.tm_hour) << 16 246 | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); 247 at91_rtc_write(AT91_RTC_CALALR, 248 bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ 249 | bin2bcd(tm.tm_mday) << 24 250 | AT91_RTC_DATEEN | AT91_RTC_MTHEN); 251 252 if (alrm->enabled) { 253 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 254 at91_rtc_write_ier(AT91_RTC_ALARM); 255 } 256 257 dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, 258 at91_alarm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, 259 tm.tm_min, tm.tm_sec); 260 261 return 0; 262} 263 264static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 265{ 266 dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled); 267 268 if (enabled) { 269 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 270 at91_rtc_write_ier(AT91_RTC_ALARM); 271 } else 272 at91_rtc_write_idr(AT91_RTC_ALARM); 273 274 return 0; 275} 276/* 277 * Provide additional RTC information in /proc/driver/rtc 278 */ 279static int at91_rtc_proc(struct device *dev, struct seq_file *seq) 280{ 281 unsigned long imr = at91_rtc_read_imr(); 282 283 seq_printf(seq, "update_IRQ\t: %s\n", 284 (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); 285 seq_printf(seq, "periodic_IRQ\t: %s\n", 286 (imr & AT91_RTC_SECEV) ? "yes" : "no"); 287 288 return 0; 289} 290 291/* 292 * IRQ handler for the RTC 293 */ 294static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) 295{ 296 struct platform_device *pdev = dev_id; 297 struct rtc_device *rtc = platform_get_drvdata(pdev); 298 unsigned int rtsr; 299 unsigned long events = 0; 300 int ret = IRQ_NONE; 301 302 spin_lock(&suspended_lock); 303 rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr(); 304 if (rtsr) { /* this interrupt is shared! Is it ours? */ 305 if (rtsr & AT91_RTC_ALARM) 306 events |= (RTC_AF | RTC_IRQF); 307 if (rtsr & AT91_RTC_SECEV) { 308 complete(&at91_rtc_upd_rdy); 309 at91_rtc_write_idr(AT91_RTC_SECEV); 310 } 311 if (rtsr & AT91_RTC_ACKUPD) 312 complete(&at91_rtc_updated); 313 314 at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ 315 316 if (!suspended) { 317 rtc_update_irq(rtc, 1, events); 318 319 dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n", 320 __func__, events >> 8, events & 0x000000FF); 321 } else { 322 cached_events |= events; 323 at91_rtc_write_idr(at91_rtc_imr); 324 pm_system_wakeup(); 325 } 326 327 ret = IRQ_HANDLED; 328 } 329 spin_unlock(&suspended_lock); 330 331 return ret; 332} 333 334static const struct at91_rtc_config at91rm9200_config = { 335}; 336 337static const struct at91_rtc_config at91sam9x5_config = { 338 .use_shadow_imr = true, 339}; 340 341#ifdef CONFIG_OF 342static const struct of_device_id at91_rtc_dt_ids[] = { 343 { 344 .compatible = "atmel,at91rm9200-rtc", 345 .data = &at91rm9200_config, 346 }, { 347 .compatible = "atmel,at91sam9x5-rtc", 348 .data = &at91sam9x5_config, 349 }, { 350 /* sentinel */ 351 } 352}; 353MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids); 354#endif 355 356static const struct at91_rtc_config * 357at91_rtc_get_config(struct platform_device *pdev) 358{ 359 const struct of_device_id *match; 360 361 if (pdev->dev.of_node) { 362 match = of_match_node(at91_rtc_dt_ids, pdev->dev.of_node); 363 if (!match) 364 return NULL; 365 return (const struct at91_rtc_config *)match->data; 366 } 367 368 return &at91rm9200_config; 369} 370 371static const struct rtc_class_ops at91_rtc_ops = { 372 .read_time = at91_rtc_readtime, 373 .set_time = at91_rtc_settime, 374 .read_alarm = at91_rtc_readalarm, 375 .set_alarm = at91_rtc_setalarm, 376 .proc = at91_rtc_proc, 377 .alarm_irq_enable = at91_rtc_alarm_irq_enable, 378}; 379 380/* 381 * Initialize and install RTC driver 382 */ 383static int __init at91_rtc_probe(struct platform_device *pdev) 384{ 385 struct rtc_device *rtc; 386 struct resource *regs; 387 int ret = 0; 388 389 at91_rtc_config = at91_rtc_get_config(pdev); 390 if (!at91_rtc_config) 391 return -ENODEV; 392 393 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 394 if (!regs) { 395 dev_err(&pdev->dev, "no mmio resource defined\n"); 396 return -ENXIO; 397 } 398 399 irq = platform_get_irq(pdev, 0); 400 if (irq < 0) { 401 dev_err(&pdev->dev, "no irq resource defined\n"); 402 return -ENXIO; 403 } 404 405 at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start, 406 resource_size(regs)); 407 if (!at91_rtc_regs) { 408 dev_err(&pdev->dev, "failed to map registers, aborting.\n"); 409 return -ENOMEM; 410 } 411 412 sclk = devm_clk_get(&pdev->dev, NULL); 413 if (IS_ERR(sclk)) 414 return PTR_ERR(sclk); 415 416 ret = clk_prepare_enable(sclk); 417 if (ret) { 418 dev_err(&pdev->dev, "Could not enable slow clock\n"); 419 return ret; 420 } 421 422 at91_rtc_write(AT91_RTC_CR, 0); 423 at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */ 424 425 /* Disable all interrupts */ 426 at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM | 427 AT91_RTC_SECEV | AT91_RTC_TIMEV | 428 AT91_RTC_CALEV); 429 430 ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt, 431 IRQF_SHARED | IRQF_COND_SUSPEND, 432 "at91_rtc", pdev); 433 if (ret) { 434 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq); 435 goto err_clk; 436 } 437 438 /* cpu init code should really have flagged this device as 439 * being wake-capable; if it didn't, do that here. 440 */ 441 if (!device_can_wakeup(&pdev->dev)) 442 device_init_wakeup(&pdev->dev, 1); 443 444 rtc = devm_rtc_device_register(&pdev->dev, pdev->name, 445 &at91_rtc_ops, THIS_MODULE); 446 if (IS_ERR(rtc)) { 447 ret = PTR_ERR(rtc); 448 goto err_clk; 449 } 450 platform_set_drvdata(pdev, rtc); 451 452 /* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy 453 * completion. 454 */ 455 at91_rtc_write_ier(AT91_RTC_SECEV); 456 457 dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n"); 458 return 0; 459 460err_clk: 461 clk_disable_unprepare(sclk); 462 463 return ret; 464} 465 466/* 467 * Disable and remove the RTC driver 468 */ 469static int __exit at91_rtc_remove(struct platform_device *pdev) 470{ 471 /* Disable all interrupts */ 472 at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM | 473 AT91_RTC_SECEV | AT91_RTC_TIMEV | 474 AT91_RTC_CALEV); 475 476 clk_disable_unprepare(sclk); 477 478 return 0; 479} 480 481static void at91_rtc_shutdown(struct platform_device *pdev) 482{ 483 /* Disable all interrupts */ 484 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | 485 AT91_RTC_SECEV | AT91_RTC_TIMEV | 486 AT91_RTC_CALEV); 487} 488 489#ifdef CONFIG_PM_SLEEP 490 491/* AT91RM9200 RTC Power management control */ 492 493static int at91_rtc_suspend(struct device *dev) 494{ 495 /* this IRQ is shared with DBGU and other hardware which isn't 496 * necessarily doing PM like we are... 497 */ 498 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 499 500 at91_rtc_imr = at91_rtc_read_imr() 501 & (AT91_RTC_ALARM|AT91_RTC_SECEV); 502 if (at91_rtc_imr) { 503 if (device_may_wakeup(dev)) { 504 unsigned long flags; 505 506 enable_irq_wake(irq); 507 508 spin_lock_irqsave(&suspended_lock, flags); 509 suspended = true; 510 spin_unlock_irqrestore(&suspended_lock, flags); 511 } else { 512 at91_rtc_write_idr(at91_rtc_imr); 513 } 514 } 515 return 0; 516} 517 518static int at91_rtc_resume(struct device *dev) 519{ 520 struct rtc_device *rtc = dev_get_drvdata(dev); 521 522 if (at91_rtc_imr) { 523 if (device_may_wakeup(dev)) { 524 unsigned long flags; 525 526 spin_lock_irqsave(&suspended_lock, flags); 527 528 if (cached_events) { 529 rtc_update_irq(rtc, 1, cached_events); 530 cached_events = 0; 531 } 532 533 suspended = false; 534 spin_unlock_irqrestore(&suspended_lock, flags); 535 536 disable_irq_wake(irq); 537 } 538 at91_rtc_write_ier(at91_rtc_imr); 539 } 540 return 0; 541} 542#endif 543 544static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume); 545 546static struct platform_driver at91_rtc_driver = { 547 .remove = __exit_p(at91_rtc_remove), 548 .shutdown = at91_rtc_shutdown, 549 .driver = { 550 .name = "at91_rtc", 551 .pm = &at91_rtc_pm_ops, 552 .of_match_table = of_match_ptr(at91_rtc_dt_ids), 553 }, 554}; 555 556module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe); 557 558MODULE_AUTHOR("Rick Bronson"); 559MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200"); 560MODULE_LICENSE("GPL"); 561MODULE_ALIAS("platform:at91_rtc"); 562