1/*
2 * Allwinner A23 SoCs special pins pinctrl driver.
3 *
4 * Copyright (C) 2014 Chen-Yu Tsai
5 * Chen-Yu Tsai <wens@csie.org>
6 *
7 * Copyright (C) 2014 Boris Brezillon
8 * Boris Brezillon <boris.brezillon@free-electrons.com>
9 *
10 * Copyright (C) 2014 Maxime Ripard
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
12 *
13 * This file is licensed under the terms of the GNU General Public
14 * License version 2.  This program is licensed "as is" without any
15 * warranty of any kind, whether express or implied.
16 */
17
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/of.h>
21#include <linux/of_device.h>
22#include <linux/pinctrl/pinctrl.h>
23#include <linux/reset.h>
24
25#include "pinctrl-sunxi.h"
26
27static const struct sunxi_desc_pin sun8i_a23_r_pins[] = {
28	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
29		  SUNXI_FUNCTION(0x0, "gpio_in"),
30		  SUNXI_FUNCTION(0x1, "gpio_out"),
31		  SUNXI_FUNCTION(0x2, "s_rsb"),		/* SCK */
32		  SUNXI_FUNCTION(0x3, "s_twi"),		/* SCK */
33		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)),	/* PL_EINT0 */
34	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
35		  SUNXI_FUNCTION(0x0, "gpio_in"),
36		  SUNXI_FUNCTION(0x1, "gpio_out"),
37		  SUNXI_FUNCTION(0x2, "s_rsb"),		/* SDA */
38		  SUNXI_FUNCTION(0x3, "s_twi"),		/* SDA */
39		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)),	/* PL_EINT1 */
40	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
41		  SUNXI_FUNCTION(0x0, "gpio_in"),
42		  SUNXI_FUNCTION(0x1, "gpio_out"),
43		  SUNXI_FUNCTION(0x2, "s_uart"),	/* TX */
44		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)),	/* PL_EINT2 */
45	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
46		  SUNXI_FUNCTION(0x0, "gpio_in"),
47		  SUNXI_FUNCTION(0x1, "gpio_out"),
48		  SUNXI_FUNCTION(0x2, "s_uart"),	/* RX */
49		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)),	/* PL_EINT3 */
50	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
51		  SUNXI_FUNCTION(0x0, "gpio_in"),
52		  SUNXI_FUNCTION(0x1, "gpio_out"),
53		  SUNXI_FUNCTION(0x3, "s_jtag"),	/* MS */
54		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)),	/* PL_EINT4 */
55	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
56		  SUNXI_FUNCTION(0x0, "gpio_in"),
57		  SUNXI_FUNCTION(0x1, "gpio_out"),
58		  SUNXI_FUNCTION(0x3, "s_jtag"),	/* CK */
59		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)),	/* PL_EINT5 */
60	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
61		  SUNXI_FUNCTION(0x0, "gpio_in"),
62		  SUNXI_FUNCTION(0x1, "gpio_out"),
63		  SUNXI_FUNCTION(0x3, "s_jtag"),	/* DO */
64		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)),	/* PL_EINT6 */
65	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
66		  SUNXI_FUNCTION(0x0, "gpio_in"),
67		  SUNXI_FUNCTION(0x1, "gpio_out"),
68		  SUNXI_FUNCTION(0x3, "s_jtag"),	/* DI */
69		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)),	/* PL_EINT7 */
70	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
71		  SUNXI_FUNCTION(0x0, "gpio_in"),
72		  SUNXI_FUNCTION(0x1, "gpio_out"),
73		  SUNXI_FUNCTION(0x2, "s_twi"),		/* SCK */
74		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 8)),	/* PL_EINT8 */
75	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
76		  SUNXI_FUNCTION(0x0, "gpio_in"),
77		  SUNXI_FUNCTION(0x1, "gpio_out"),
78		  SUNXI_FUNCTION(0x2, "s_twi"),		/* SDA */
79		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 9)),	/* PL_EINT9 */
80	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
81		  SUNXI_FUNCTION(0x0, "gpio_in"),
82		  SUNXI_FUNCTION(0x1, "gpio_out"),
83		  SUNXI_FUNCTION(0x2, "s_pwm"),
84		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 10)),	/* PL_EINT10 */
85	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
86		  SUNXI_FUNCTION(0x0, "gpio_in"),
87		  SUNXI_FUNCTION(0x1, "gpio_out"),
88		  SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 11)),	/* PL_EINT11 */
89};
90
91static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_data = {
92	.pins = sun8i_a23_r_pins,
93	.npins = ARRAY_SIZE(sun8i_a23_r_pins),
94	.pin_base = PL_BASE,
95	.irq_banks = 1,
96};
97
98static int sun8i_a23_r_pinctrl_probe(struct platform_device *pdev)
99{
100	struct reset_control *rstc;
101	int ret;
102
103	rstc = devm_reset_control_get(&pdev->dev, NULL);
104	if (IS_ERR(rstc)) {
105		dev_err(&pdev->dev, "Reset controller missing\n");
106		return PTR_ERR(rstc);
107	}
108
109	ret = reset_control_deassert(rstc);
110	if (ret)
111		return ret;
112
113	ret = sunxi_pinctrl_init(pdev,
114				 &sun8i_a23_r_pinctrl_data);
115
116	if (ret)
117		reset_control_assert(rstc);
118
119	return ret;
120}
121
122static const struct of_device_id sun8i_a23_r_pinctrl_match[] = {
123	{ .compatible = "allwinner,sun8i-a23-r-pinctrl", },
124	{}
125};
126MODULE_DEVICE_TABLE(of, sun8i_a23_r_pinctrl_match);
127
128static struct platform_driver sun8i_a23_r_pinctrl_driver = {
129	.probe	= sun8i_a23_r_pinctrl_probe,
130	.driver	= {
131		.name		= "sun8i-a23-r-pinctrl",
132		.of_match_table	= sun8i_a23_r_pinctrl_match,
133	},
134};
135module_platform_driver(sun8i_a23_r_pinctrl_driver);
136
137MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
138MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com");
139MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
140MODULE_DESCRIPTION("Allwinner A23 R_PIO pinctrl driver");
141MODULE_LICENSE("GPL");
142