1/*
2 * imx6q pinctrl driver based on imx pinmux core
3 *
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Copyright (C) 2012 Linaro, Inc.
6 *
7 * Author: Dong Aisheng <dong.aisheng@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/err.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/pinctrl/pinctrl.h>
22
23#include "pinctrl-imx.h"
24
25enum imx6q_pads {
26	MX6Q_PAD_RESERVE0 = 0,
27	MX6Q_PAD_RESERVE1 = 1,
28	MX6Q_PAD_RESERVE2 = 2,
29	MX6Q_PAD_RESERVE3 = 3,
30	MX6Q_PAD_RESERVE4 = 4,
31	MX6Q_PAD_RESERVE5 = 5,
32	MX6Q_PAD_RESERVE6 = 6,
33	MX6Q_PAD_RESERVE7 = 7,
34	MX6Q_PAD_RESERVE8 = 8,
35	MX6Q_PAD_RESERVE9 = 9,
36	MX6Q_PAD_RESERVE10 = 10,
37	MX6Q_PAD_RESERVE11 = 11,
38	MX6Q_PAD_RESERVE12 = 12,
39	MX6Q_PAD_RESERVE13 = 13,
40	MX6Q_PAD_RESERVE14 = 14,
41	MX6Q_PAD_RESERVE15 = 15,
42	MX6Q_PAD_RESERVE16 = 16,
43	MX6Q_PAD_RESERVE17 = 17,
44	MX6Q_PAD_RESERVE18 = 18,
45	MX6Q_PAD_SD2_DAT1 = 19,
46	MX6Q_PAD_SD2_DAT2 = 20,
47	MX6Q_PAD_SD2_DAT0 = 21,
48	MX6Q_PAD_RGMII_TXC = 22,
49	MX6Q_PAD_RGMII_TD0 = 23,
50	MX6Q_PAD_RGMII_TD1 = 24,
51	MX6Q_PAD_RGMII_TD2 = 25,
52	MX6Q_PAD_RGMII_TD3 = 26,
53	MX6Q_PAD_RGMII_RX_CTL = 27,
54	MX6Q_PAD_RGMII_RD0 = 28,
55	MX6Q_PAD_RGMII_TX_CTL = 29,
56	MX6Q_PAD_RGMII_RD1 = 30,
57	MX6Q_PAD_RGMII_RD2 = 31,
58	MX6Q_PAD_RGMII_RD3 = 32,
59	MX6Q_PAD_RGMII_RXC = 33,
60	MX6Q_PAD_EIM_A25 = 34,
61	MX6Q_PAD_EIM_EB2 = 35,
62	MX6Q_PAD_EIM_D16 = 36,
63	MX6Q_PAD_EIM_D17 = 37,
64	MX6Q_PAD_EIM_D18 = 38,
65	MX6Q_PAD_EIM_D19 = 39,
66	MX6Q_PAD_EIM_D20 = 40,
67	MX6Q_PAD_EIM_D21 = 41,
68	MX6Q_PAD_EIM_D22 = 42,
69	MX6Q_PAD_EIM_D23 = 43,
70	MX6Q_PAD_EIM_EB3 = 44,
71	MX6Q_PAD_EIM_D24 = 45,
72	MX6Q_PAD_EIM_D25 = 46,
73	MX6Q_PAD_EIM_D26 = 47,
74	MX6Q_PAD_EIM_D27 = 48,
75	MX6Q_PAD_EIM_D28 = 49,
76	MX6Q_PAD_EIM_D29 = 50,
77	MX6Q_PAD_EIM_D30 = 51,
78	MX6Q_PAD_EIM_D31 = 52,
79	MX6Q_PAD_EIM_A24 = 53,
80	MX6Q_PAD_EIM_A23 = 54,
81	MX6Q_PAD_EIM_A22 = 55,
82	MX6Q_PAD_EIM_A21 = 56,
83	MX6Q_PAD_EIM_A20 = 57,
84	MX6Q_PAD_EIM_A19 = 58,
85	MX6Q_PAD_EIM_A18 = 59,
86	MX6Q_PAD_EIM_A17 = 60,
87	MX6Q_PAD_EIM_A16 = 61,
88	MX6Q_PAD_EIM_CS0 = 62,
89	MX6Q_PAD_EIM_CS1 = 63,
90	MX6Q_PAD_EIM_OE = 64,
91	MX6Q_PAD_EIM_RW = 65,
92	MX6Q_PAD_EIM_LBA = 66,
93	MX6Q_PAD_EIM_EB0 = 67,
94	MX6Q_PAD_EIM_EB1 = 68,
95	MX6Q_PAD_EIM_DA0 = 69,
96	MX6Q_PAD_EIM_DA1 = 70,
97	MX6Q_PAD_EIM_DA2 = 71,
98	MX6Q_PAD_EIM_DA3 = 72,
99	MX6Q_PAD_EIM_DA4 = 73,
100	MX6Q_PAD_EIM_DA5 = 74,
101	MX6Q_PAD_EIM_DA6 = 75,
102	MX6Q_PAD_EIM_DA7 = 76,
103	MX6Q_PAD_EIM_DA8 = 77,
104	MX6Q_PAD_EIM_DA9 = 78,
105	MX6Q_PAD_EIM_DA10 = 79,
106	MX6Q_PAD_EIM_DA11 = 80,
107	MX6Q_PAD_EIM_DA12 = 81,
108	MX6Q_PAD_EIM_DA13 = 82,
109	MX6Q_PAD_EIM_DA14 = 83,
110	MX6Q_PAD_EIM_DA15 = 84,
111	MX6Q_PAD_EIM_WAIT = 85,
112	MX6Q_PAD_EIM_BCLK = 86,
113	MX6Q_PAD_DI0_DISP_CLK = 87,
114	MX6Q_PAD_DI0_PIN15 = 88,
115	MX6Q_PAD_DI0_PIN2 = 89,
116	MX6Q_PAD_DI0_PIN3 = 90,
117	MX6Q_PAD_DI0_PIN4 = 91,
118	MX6Q_PAD_DISP0_DAT0 = 92,
119	MX6Q_PAD_DISP0_DAT1 = 93,
120	MX6Q_PAD_DISP0_DAT2 = 94,
121	MX6Q_PAD_DISP0_DAT3 = 95,
122	MX6Q_PAD_DISP0_DAT4 = 96,
123	MX6Q_PAD_DISP0_DAT5 = 97,
124	MX6Q_PAD_DISP0_DAT6 = 98,
125	MX6Q_PAD_DISP0_DAT7 = 99,
126	MX6Q_PAD_DISP0_DAT8 = 100,
127	MX6Q_PAD_DISP0_DAT9 = 101,
128	MX6Q_PAD_DISP0_DAT10 = 102,
129	MX6Q_PAD_DISP0_DAT11 = 103,
130	MX6Q_PAD_DISP0_DAT12 = 104,
131	MX6Q_PAD_DISP0_DAT13 = 105,
132	MX6Q_PAD_DISP0_DAT14 = 106,
133	MX6Q_PAD_DISP0_DAT15 = 107,
134	MX6Q_PAD_DISP0_DAT16 = 108,
135	MX6Q_PAD_DISP0_DAT17 = 109,
136	MX6Q_PAD_DISP0_DAT18 = 110,
137	MX6Q_PAD_DISP0_DAT19 = 111,
138	MX6Q_PAD_DISP0_DAT20 = 112,
139	MX6Q_PAD_DISP0_DAT21 = 113,
140	MX6Q_PAD_DISP0_DAT22 = 114,
141	MX6Q_PAD_DISP0_DAT23 = 115,
142	MX6Q_PAD_ENET_MDIO = 116,
143	MX6Q_PAD_ENET_REF_CLK = 117,
144	MX6Q_PAD_ENET_RX_ER = 118,
145	MX6Q_PAD_ENET_CRS_DV = 119,
146	MX6Q_PAD_ENET_RXD1 = 120,
147	MX6Q_PAD_ENET_RXD0 = 121,
148	MX6Q_PAD_ENET_TX_EN = 122,
149	MX6Q_PAD_ENET_TXD1 = 123,
150	MX6Q_PAD_ENET_TXD0 = 124,
151	MX6Q_PAD_ENET_MDC = 125,
152	MX6Q_PAD_KEY_COL0 = 126,
153	MX6Q_PAD_KEY_ROW0 = 127,
154	MX6Q_PAD_KEY_COL1 = 128,
155	MX6Q_PAD_KEY_ROW1 = 129,
156	MX6Q_PAD_KEY_COL2 = 130,
157	MX6Q_PAD_KEY_ROW2 = 131,
158	MX6Q_PAD_KEY_COL3 = 132,
159	MX6Q_PAD_KEY_ROW3 = 133,
160	MX6Q_PAD_KEY_COL4 = 134,
161	MX6Q_PAD_KEY_ROW4 = 135,
162	MX6Q_PAD_GPIO_0 = 136,
163	MX6Q_PAD_GPIO_1 = 137,
164	MX6Q_PAD_GPIO_9 = 138,
165	MX6Q_PAD_GPIO_3 = 139,
166	MX6Q_PAD_GPIO_6 = 140,
167	MX6Q_PAD_GPIO_2 = 141,
168	MX6Q_PAD_GPIO_4 = 142,
169	MX6Q_PAD_GPIO_5 = 143,
170	MX6Q_PAD_GPIO_7 = 144,
171	MX6Q_PAD_GPIO_8 = 145,
172	MX6Q_PAD_GPIO_16 = 146,
173	MX6Q_PAD_GPIO_17 = 147,
174	MX6Q_PAD_GPIO_18 = 148,
175	MX6Q_PAD_GPIO_19 = 149,
176	MX6Q_PAD_CSI0_PIXCLK = 150,
177	MX6Q_PAD_CSI0_MCLK = 151,
178	MX6Q_PAD_CSI0_DATA_EN = 152,
179	MX6Q_PAD_CSI0_VSYNC = 153,
180	MX6Q_PAD_CSI0_DAT4 = 154,
181	MX6Q_PAD_CSI0_DAT5 = 155,
182	MX6Q_PAD_CSI0_DAT6 = 156,
183	MX6Q_PAD_CSI0_DAT7 = 157,
184	MX6Q_PAD_CSI0_DAT8 = 158,
185	MX6Q_PAD_CSI0_DAT9 = 159,
186	MX6Q_PAD_CSI0_DAT10 = 160,
187	MX6Q_PAD_CSI0_DAT11 = 161,
188	MX6Q_PAD_CSI0_DAT12 = 162,
189	MX6Q_PAD_CSI0_DAT13 = 163,
190	MX6Q_PAD_CSI0_DAT14 = 164,
191	MX6Q_PAD_CSI0_DAT15 = 165,
192	MX6Q_PAD_CSI0_DAT16 = 166,
193	MX6Q_PAD_CSI0_DAT17 = 167,
194	MX6Q_PAD_CSI0_DAT18 = 168,
195	MX6Q_PAD_CSI0_DAT19 = 169,
196	MX6Q_PAD_SD3_DAT7 = 170,
197	MX6Q_PAD_SD3_DAT6 = 171,
198	MX6Q_PAD_SD3_DAT5 = 172,
199	MX6Q_PAD_SD3_DAT4 = 173,
200	MX6Q_PAD_SD3_CMD = 174,
201	MX6Q_PAD_SD3_CLK = 175,
202	MX6Q_PAD_SD3_DAT0 = 176,
203	MX6Q_PAD_SD3_DAT1 = 177,
204	MX6Q_PAD_SD3_DAT2 = 178,
205	MX6Q_PAD_SD3_DAT3 = 179,
206	MX6Q_PAD_SD3_RST = 180,
207	MX6Q_PAD_NANDF_CLE = 181,
208	MX6Q_PAD_NANDF_ALE = 182,
209	MX6Q_PAD_NANDF_WP_B = 183,
210	MX6Q_PAD_NANDF_RB0 = 184,
211	MX6Q_PAD_NANDF_CS0 = 185,
212	MX6Q_PAD_NANDF_CS1 = 186,
213	MX6Q_PAD_NANDF_CS2 = 187,
214	MX6Q_PAD_NANDF_CS3 = 188,
215	MX6Q_PAD_SD4_CMD = 189,
216	MX6Q_PAD_SD4_CLK = 190,
217	MX6Q_PAD_NANDF_D0 = 191,
218	MX6Q_PAD_NANDF_D1 = 192,
219	MX6Q_PAD_NANDF_D2 = 193,
220	MX6Q_PAD_NANDF_D3 = 194,
221	MX6Q_PAD_NANDF_D4 = 195,
222	MX6Q_PAD_NANDF_D5 = 196,
223	MX6Q_PAD_NANDF_D6 = 197,
224	MX6Q_PAD_NANDF_D7 = 198,
225	MX6Q_PAD_SD4_DAT0 = 199,
226	MX6Q_PAD_SD4_DAT1 = 200,
227	MX6Q_PAD_SD4_DAT2 = 201,
228	MX6Q_PAD_SD4_DAT3 = 202,
229	MX6Q_PAD_SD4_DAT4 = 203,
230	MX6Q_PAD_SD4_DAT5 = 204,
231	MX6Q_PAD_SD4_DAT6 = 205,
232	MX6Q_PAD_SD4_DAT7 = 206,
233	MX6Q_PAD_SD1_DAT1 = 207,
234	MX6Q_PAD_SD1_DAT0 = 208,
235	MX6Q_PAD_SD1_DAT3 = 209,
236	MX6Q_PAD_SD1_CMD = 210,
237	MX6Q_PAD_SD1_DAT2 = 211,
238	MX6Q_PAD_SD1_CLK = 212,
239	MX6Q_PAD_SD2_CLK = 213,
240	MX6Q_PAD_SD2_CMD = 214,
241	MX6Q_PAD_SD2_DAT3 = 215,
242};
243
244/* Pad names for the pinmux subsystem */
245static const struct pinctrl_pin_desc imx6q_pinctrl_pads[] = {
246	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE0),
247	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE1),
248	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE2),
249	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE3),
250	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE4),
251	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE5),
252	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE6),
253	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE7),
254	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE8),
255	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE9),
256	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE10),
257	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE11),
258	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE12),
259	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE13),
260	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE14),
261	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE15),
262	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE16),
263	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE17),
264	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE18),
265	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT1),
266	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT2),
267	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT0),
268	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TXC),
269	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD0),
270	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD1),
271	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD2),
272	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD3),
273	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RX_CTL),
274	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD0),
275	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TX_CTL),
276	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD1),
277	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD2),
278	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD3),
279	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RXC),
280	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A25),
281	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB2),
282	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D16),
283	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D17),
284	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D18),
285	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D19),
286	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D20),
287	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D21),
288	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D22),
289	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D23),
290	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB3),
291	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D24),
292	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D25),
293	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D26),
294	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D27),
295	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D28),
296	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D29),
297	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D30),
298	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D31),
299	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A24),
300	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A23),
301	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A22),
302	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A21),
303	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A20),
304	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A19),
305	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A18),
306	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A17),
307	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A16),
308	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_CS0),
309	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_CS1),
310	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_OE),
311	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_RW),
312	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_LBA),
313	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB0),
314	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB1),
315	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA0),
316	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA1),
317	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA2),
318	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA3),
319	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA4),
320	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA5),
321	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA6),
322	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA7),
323	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA8),
324	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA9),
325	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA10),
326	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA11),
327	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA12),
328	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA13),
329	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA14),
330	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA15),
331	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_WAIT),
332	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_BCLK),
333	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_DISP_CLK),
334	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN15),
335	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN2),
336	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN3),
337	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN4),
338	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT0),
339	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT1),
340	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT2),
341	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT3),
342	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT4),
343	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT5),
344	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT6),
345	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT7),
346	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT8),
347	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT9),
348	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT10),
349	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT11),
350	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT12),
351	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT13),
352	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT14),
353	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT15),
354	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT16),
355	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT17),
356	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT18),
357	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT19),
358	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT20),
359	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT21),
360	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT22),
361	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT23),
362	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_MDIO),
363	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_REF_CLK),
364	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RX_ER),
365	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_CRS_DV),
366	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RXD1),
367	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RXD0),
368	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TX_EN),
369	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TXD1),
370	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TXD0),
371	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_MDC),
372	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL0),
373	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW0),
374	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL1),
375	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW1),
376	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL2),
377	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW2),
378	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL3),
379	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW3),
380	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL4),
381	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW4),
382	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_0),
383	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_1),
384	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_9),
385	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_3),
386	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_6),
387	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_2),
388	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_4),
389	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_5),
390	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_7),
391	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_8),
392	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_16),
393	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_17),
394	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_18),
395	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_19),
396	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_PIXCLK),
397	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_MCLK),
398	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DATA_EN),
399	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_VSYNC),
400	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT4),
401	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT5),
402	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT6),
403	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT7),
404	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT8),
405	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT9),
406	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT10),
407	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT11),
408	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT12),
409	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT13),
410	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT14),
411	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT15),
412	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT16),
413	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT17),
414	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT18),
415	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT19),
416	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT7),
417	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT6),
418	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT5),
419	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT4),
420	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_CMD),
421	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_CLK),
422	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT0),
423	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT1),
424	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT2),
425	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT3),
426	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_RST),
427	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CLE),
428	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_ALE),
429	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_WP_B),
430	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_RB0),
431	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS0),
432	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS1),
433	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS2),
434	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS3),
435	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_CMD),
436	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_CLK),
437	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D0),
438	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D1),
439	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D2),
440	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D3),
441	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D4),
442	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D5),
443	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D6),
444	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D7),
445	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT0),
446	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT1),
447	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT2),
448	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT3),
449	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT4),
450	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT5),
451	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT6),
452	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT7),
453	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT1),
454	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT0),
455	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT3),
456	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_CMD),
457	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT2),
458	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_CLK),
459	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_CLK),
460	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_CMD),
461	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT3),
462};
463
464static struct imx_pinctrl_soc_info imx6q_pinctrl_info = {
465	.pins = imx6q_pinctrl_pads,
466	.npins = ARRAY_SIZE(imx6q_pinctrl_pads),
467};
468
469static const struct of_device_id imx6q_pinctrl_of_match[] = {
470	{ .compatible = "fsl,imx6q-iomuxc", },
471	{ /* sentinel */ }
472};
473
474static int imx6q_pinctrl_probe(struct platform_device *pdev)
475{
476	return imx_pinctrl_probe(pdev, &imx6q_pinctrl_info);
477}
478
479static struct platform_driver imx6q_pinctrl_driver = {
480	.driver = {
481		.name = "imx6q-pinctrl",
482		.of_match_table = imx6q_pinctrl_of_match,
483	},
484	.probe = imx6q_pinctrl_probe,
485	.remove = imx_pinctrl_remove,
486};
487
488static int __init imx6q_pinctrl_init(void)
489{
490	return platform_driver_register(&imx6q_pinctrl_driver);
491}
492arch_initcall(imx6q_pinctrl_init);
493
494static void __exit imx6q_pinctrl_exit(void)
495{
496	platform_driver_unregister(&imx6q_pinctrl_driver);
497}
498module_exit(imx6q_pinctrl_exit);
499MODULE_AUTHOR("Dong Aisheng <dong.aisheng@linaro.org>");
500MODULE_DESCRIPTION("Freescale IMX6Q pinctrl driver");
501MODULE_LICENSE("GPL v2");
502