1/* 2 * (c) Copyright 2002-2010, Ralink Technology, Inc. 3 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org> 4 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 8 * as published by the Free Software Foundation 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16#include <linux/kernel.h> 17#include <linux/firmware.h> 18#include <linux/delay.h> 19#include <linux/usb.h> 20#include <linux/skbuff.h> 21 22#include "mt7601u.h" 23#include "dma.h" 24#include "mcu.h" 25#include "usb.h" 26#include "trace.h" 27 28#define MCU_FW_URB_MAX_PAYLOAD 0x3800 29#define MCU_FW_URB_SIZE (MCU_FW_URB_MAX_PAYLOAD + 12) 30#define MCU_RESP_URB_SIZE 1024 31 32static inline int firmware_running(struct mt7601u_dev *dev) 33{ 34 return mt7601u_rr(dev, MT_MCU_COM_REG0) == 1; 35} 36 37static inline void skb_put_le32(struct sk_buff *skb, u32 val) 38{ 39 put_unaligned_le32(val, skb_put(skb, 4)); 40} 41 42static inline void mt7601u_dma_skb_wrap_cmd(struct sk_buff *skb, 43 u8 seq, enum mcu_cmd cmd) 44{ 45 WARN_ON(mt7601u_dma_skb_wrap(skb, CPU_TX_PORT, DMA_COMMAND, 46 MT76_SET(MT_TXD_CMD_INFO_SEQ, seq) | 47 MT76_SET(MT_TXD_CMD_INFO_TYPE, cmd))); 48} 49 50static inline void trace_mt_mcu_msg_send_cs(struct mt7601u_dev *dev, 51 struct sk_buff *skb, bool need_resp) 52{ 53 u32 i, csum = 0; 54 55 for (i = 0; i < skb->len / 4; i++) 56 csum ^= get_unaligned_le32(skb->data + i * 4); 57 58 trace_mt_mcu_msg_send(dev, skb, csum, need_resp); 59} 60 61static struct sk_buff * 62mt7601u_mcu_msg_alloc(struct mt7601u_dev *dev, const void *data, int len) 63{ 64 struct sk_buff *skb; 65 66 WARN_ON(len % 4); /* if length is not divisible by 4 we need to pad */ 67 68 skb = alloc_skb(len + MT_DMA_HDR_LEN + 4, GFP_KERNEL); 69 skb_reserve(skb, MT_DMA_HDR_LEN); 70 memcpy(skb_put(skb, len), data, len); 71 72 return skb; 73} 74 75static int mt7601u_mcu_wait_resp(struct mt7601u_dev *dev, u8 seq) 76{ 77 struct urb *urb = dev->mcu.resp.urb; 78 u32 rxfce; 79 int urb_status, ret, i = 5; 80 81 while (i--) { 82 if (!wait_for_completion_timeout(&dev->mcu.resp_cmpl, 83 msecs_to_jiffies(300))) { 84 dev_warn(dev->dev, "Warning: %s retrying\n", __func__); 85 continue; 86 } 87 88 /* Make copies of important data before reusing the urb */ 89 rxfce = get_unaligned_le32(dev->mcu.resp.buf); 90 urb_status = urb->status * mt7601u_urb_has_error(urb); 91 92 ret = mt7601u_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP, 93 &dev->mcu.resp, GFP_KERNEL, 94 mt7601u_complete_urb, 95 &dev->mcu.resp_cmpl); 96 if (ret) 97 return ret; 98 99 if (urb_status) 100 dev_err(dev->dev, "Error: MCU resp urb failed:%d\n", 101 urb_status); 102 103 if (MT76_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce) == seq && 104 MT76_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce) == CMD_DONE) 105 return 0; 106 107 dev_err(dev->dev, "Error: MCU resp evt:%hhx seq:%hhx-%hhx!\n", 108 MT76_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce), 109 seq, MT76_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce)); 110 } 111 112 dev_err(dev->dev, "Error: %s timed out\n", __func__); 113 return -ETIMEDOUT; 114} 115 116static int 117mt7601u_mcu_msg_send(struct mt7601u_dev *dev, struct sk_buff *skb, 118 enum mcu_cmd cmd, bool wait_resp) 119{ 120 struct usb_device *usb_dev = mt7601u_to_usb_dev(dev); 121 unsigned cmd_pipe = usb_sndbulkpipe(usb_dev, 122 dev->out_eps[MT_EP_OUT_INBAND_CMD]); 123 int sent, ret; 124 u8 seq = 0; 125 126 if (test_bit(MT7601U_STATE_REMOVED, &dev->state)) 127 return 0; 128 129 mutex_lock(&dev->mcu.mutex); 130 131 if (wait_resp) 132 while (!seq) 133 seq = ++dev->mcu.msg_seq & 0xf; 134 135 mt7601u_dma_skb_wrap_cmd(skb, seq, cmd); 136 137 if (dev->mcu.resp_cmpl.done) 138 dev_err(dev->dev, "Error: MCU response pre-completed!\n"); 139 140 trace_mt_mcu_msg_send_cs(dev, skb, wait_resp); 141 trace_mt_submit_urb_sync(dev, cmd_pipe, skb->len); 142 ret = usb_bulk_msg(usb_dev, cmd_pipe, skb->data, skb->len, &sent, 500); 143 if (ret) { 144 dev_err(dev->dev, "Error: send MCU cmd failed:%d\n", ret); 145 goto out; 146 } 147 if (sent != skb->len) 148 dev_err(dev->dev, "Error: %s sent != skb->len\n", __func__); 149 150 if (wait_resp) 151 ret = mt7601u_mcu_wait_resp(dev, seq); 152out: 153 mutex_unlock(&dev->mcu.mutex); 154 155 consume_skb(skb); 156 157 return ret; 158} 159 160static int mt7601u_mcu_function_select(struct mt7601u_dev *dev, 161 enum mcu_function func, u32 val) 162{ 163 struct sk_buff *skb; 164 struct { 165 __le32 id; 166 __le32 value; 167 } __packed __aligned(4) msg = { 168 .id = cpu_to_le32(func), 169 .value = cpu_to_le32(val), 170 }; 171 172 skb = mt7601u_mcu_msg_alloc(dev, &msg, sizeof(msg)); 173 return mt7601u_mcu_msg_send(dev, skb, CMD_FUN_SET_OP, func == 5); 174} 175 176int mt7601u_mcu_tssi_read_kick(struct mt7601u_dev *dev, int use_hvga) 177{ 178 int ret; 179 180 if (!test_bit(MT7601U_STATE_MCU_RUNNING, &dev->state)) 181 return 0; 182 183 ret = mt7601u_mcu_function_select(dev, ATOMIC_TSSI_SETTING, 184 use_hvga); 185 if (ret) { 186 dev_warn(dev->dev, "Warning: MCU TSSI read kick failed\n"); 187 return ret; 188 } 189 190 dev->tssi_read_trig = true; 191 192 return 0; 193} 194 195int 196mt7601u_mcu_calibrate(struct mt7601u_dev *dev, enum mcu_calibrate cal, u32 val) 197{ 198 struct sk_buff *skb; 199 struct { 200 __le32 id; 201 __le32 value; 202 } __packed __aligned(4) msg = { 203 .id = cpu_to_le32(cal), 204 .value = cpu_to_le32(val), 205 }; 206 207 skb = mt7601u_mcu_msg_alloc(dev, &msg, sizeof(msg)); 208 return mt7601u_mcu_msg_send(dev, skb, CMD_CALIBRATION_OP, true); 209} 210 211int mt7601u_write_reg_pairs(struct mt7601u_dev *dev, u32 base, 212 const struct mt76_reg_pair *data, int n) 213{ 214 const int max_vals_per_cmd = INBAND_PACKET_MAX_LEN / 8; 215 struct sk_buff *skb; 216 int cnt, i, ret; 217 218 if (!n) 219 return 0; 220 221 cnt = min(max_vals_per_cmd, n); 222 223 skb = alloc_skb(cnt * 8 + MT_DMA_HDR_LEN + 4, GFP_KERNEL); 224 if (!skb) 225 return -ENOMEM; 226 skb_reserve(skb, MT_DMA_HDR_LEN); 227 228 for (i = 0; i < cnt; i++) { 229 skb_put_le32(skb, base + data[i].reg); 230 skb_put_le32(skb, data[i].value); 231 } 232 233 ret = mt7601u_mcu_msg_send(dev, skb, CMD_RANDOM_WRITE, cnt == n); 234 if (ret) 235 return ret; 236 237 return mt7601u_write_reg_pairs(dev, base, data + cnt, n - cnt); 238} 239 240int mt7601u_burst_write_regs(struct mt7601u_dev *dev, u32 offset, 241 const u32 *data, int n) 242{ 243 const int max_regs_per_cmd = INBAND_PACKET_MAX_LEN / 4 - 1; 244 struct sk_buff *skb; 245 int cnt, i, ret; 246 247 if (!n) 248 return 0; 249 250 cnt = min(max_regs_per_cmd, n); 251 252 skb = alloc_skb(cnt * 4 + MT_DMA_HDR_LEN + 4, GFP_KERNEL); 253 if (!skb) 254 return -ENOMEM; 255 skb_reserve(skb, MT_DMA_HDR_LEN); 256 257 skb_put_le32(skb, MT_MCU_MEMMAP_WLAN + offset); 258 for (i = 0; i < cnt; i++) 259 skb_put_le32(skb, data[i]); 260 261 ret = mt7601u_mcu_msg_send(dev, skb, CMD_BURST_WRITE, cnt == n); 262 if (ret) 263 return ret; 264 265 return mt7601u_burst_write_regs(dev, offset + cnt * 4, 266 data + cnt, n - cnt); 267} 268 269struct mt76_fw_header { 270 __le32 ilm_len; 271 __le32 dlm_len; 272 __le16 build_ver; 273 __le16 fw_ver; 274 u8 pad[4]; 275 char build_time[16]; 276}; 277 278struct mt76_fw { 279 struct mt76_fw_header hdr; 280 u8 ivb[MT_MCU_IVB_SIZE]; 281 u8 ilm[]; 282}; 283 284static int __mt7601u_dma_fw(struct mt7601u_dev *dev, 285 const struct mt7601u_dma_buf *dma_buf, 286 const void *data, u32 len, u32 dst_addr) 287{ 288 DECLARE_COMPLETION_ONSTACK(cmpl); 289 struct mt7601u_dma_buf buf = *dma_buf; /* we need to fake length */ 290 __le32 reg; 291 u32 val; 292 int ret; 293 294 reg = cpu_to_le32(MT76_SET(MT_TXD_INFO_TYPE, DMA_PACKET) | 295 MT76_SET(MT_TXD_INFO_D_PORT, CPU_TX_PORT) | 296 MT76_SET(MT_TXD_INFO_LEN, len)); 297 memcpy(buf.buf, ®, sizeof(reg)); 298 memcpy(buf.buf + sizeof(reg), data, len); 299 memset(buf.buf + sizeof(reg) + len, 0, 8); 300 301 ret = mt7601u_vendor_single_wr(dev, MT_VEND_WRITE_FCE, 302 MT_FCE_DMA_ADDR, dst_addr); 303 if (ret) 304 return ret; 305 len = roundup(len, 4); 306 ret = mt7601u_vendor_single_wr(dev, MT_VEND_WRITE_FCE, 307 MT_FCE_DMA_LEN, len << 16); 308 if (ret) 309 return ret; 310 311 buf.len = MT_DMA_HDR_LEN + len + 4; 312 ret = mt7601u_usb_submit_buf(dev, USB_DIR_OUT, MT_EP_OUT_INBAND_CMD, 313 &buf, GFP_KERNEL, 314 mt7601u_complete_urb, &cmpl); 315 if (ret) 316 return ret; 317 318 if (!wait_for_completion_timeout(&cmpl, msecs_to_jiffies(1000))) { 319 dev_err(dev->dev, "Error: firmware upload timed out\n"); 320 usb_kill_urb(buf.urb); 321 return -ETIMEDOUT; 322 } 323 if (mt7601u_urb_has_error(buf.urb)) { 324 dev_err(dev->dev, "Error: firmware upload urb failed:%d\n", 325 buf.urb->status); 326 return buf.urb->status; 327 } 328 329 val = mt7601u_rr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX); 330 val++; 331 mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX, val); 332 333 return 0; 334} 335 336static int 337mt7601u_dma_fw(struct mt7601u_dev *dev, struct mt7601u_dma_buf *dma_buf, 338 const void *data, int len, u32 dst_addr) 339{ 340 int n, ret; 341 342 if (len == 0) 343 return 0; 344 345 n = min(MCU_FW_URB_MAX_PAYLOAD, len); 346 ret = __mt7601u_dma_fw(dev, dma_buf, data, n, dst_addr); 347 if (ret) 348 return ret; 349 350 if (!mt76_poll_msec(dev, MT_MCU_COM_REG1, BIT(31), BIT(31), 500)) 351 return -ETIMEDOUT; 352 353 return mt7601u_dma_fw(dev, dma_buf, data + n, len - n, dst_addr + n); 354} 355 356static int 357mt7601u_upload_firmware(struct mt7601u_dev *dev, const struct mt76_fw *fw) 358{ 359 struct mt7601u_dma_buf dma_buf; 360 void *ivb; 361 u32 ilm_len, dlm_len; 362 int i, ret; 363 364 ivb = kmemdup(fw->ivb, sizeof(fw->ivb), GFP_KERNEL); 365 if (!ivb || mt7601u_usb_alloc_buf(dev, MCU_FW_URB_SIZE, &dma_buf)) { 366 ret = -ENOMEM; 367 goto error; 368 } 369 370 ilm_len = le32_to_cpu(fw->hdr.ilm_len) - sizeof(fw->ivb); 371 dev_dbg(dev->dev, "loading FW - ILM %u + IVB %zu\n", 372 ilm_len, sizeof(fw->ivb)); 373 ret = mt7601u_dma_fw(dev, &dma_buf, fw->ilm, ilm_len, sizeof(fw->ivb)); 374 if (ret) 375 goto error; 376 377 dlm_len = le32_to_cpu(fw->hdr.dlm_len); 378 dev_dbg(dev->dev, "loading FW - DLM %u\n", dlm_len); 379 ret = mt7601u_dma_fw(dev, &dma_buf, fw->ilm + ilm_len, 380 dlm_len, MT_MCU_DLM_OFFSET); 381 if (ret) 382 goto error; 383 384 ret = mt7601u_vendor_request(dev, MT_VEND_DEV_MODE, USB_DIR_OUT, 385 0x12, 0, ivb, sizeof(fw->ivb)); 386 if (ret < 0) 387 goto error; 388 ret = 0; 389 390 for (i = 100; i && !firmware_running(dev); i--) 391 msleep(10); 392 if (!i) { 393 ret = -ETIMEDOUT; 394 goto error; 395 } 396 397 dev_dbg(dev->dev, "Firmware running!\n"); 398error: 399 kfree(ivb); 400 mt7601u_usb_free_buf(dev, &dma_buf); 401 402 return ret; 403} 404 405static int mt7601u_load_firmware(struct mt7601u_dev *dev) 406{ 407 const struct firmware *fw; 408 const struct mt76_fw_header *hdr; 409 int len, ret; 410 u32 val; 411 412 mt7601u_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN | 413 MT_USB_DMA_CFG_TX_BULK_EN)); 414 415 if (firmware_running(dev)) 416 return 0; 417 418 ret = request_firmware(&fw, MT7601U_FIRMWARE, dev->dev); 419 if (ret) 420 return ret; 421 422 if (!fw || !fw->data || fw->size < sizeof(*hdr)) 423 goto err_inv_fw; 424 425 hdr = (const struct mt76_fw_header *) fw->data; 426 427 if (le32_to_cpu(hdr->ilm_len) <= MT_MCU_IVB_SIZE) 428 goto err_inv_fw; 429 430 len = sizeof(*hdr); 431 len += le32_to_cpu(hdr->ilm_len); 432 len += le32_to_cpu(hdr->dlm_len); 433 434 if (fw->size != len) 435 goto err_inv_fw; 436 437 val = le16_to_cpu(hdr->fw_ver); 438 dev_info(dev->dev, 439 "Firmware Version: %d.%d.%02d Build: %x Build time: %.16s\n", 440 (val >> 12) & 0xf, (val >> 8) & 0xf, val & 0xf, 441 le16_to_cpu(hdr->build_ver), hdr->build_time); 442 443 len = le32_to_cpu(hdr->ilm_len); 444 445 mt7601u_wr(dev, 0x94c, 0); 446 mt7601u_wr(dev, MT_FCE_PSE_CTRL, 0); 447 448 mt7601u_vendor_reset(dev); 449 msleep(5); 450 451 mt7601u_wr(dev, 0xa44, 0); 452 mt7601u_wr(dev, 0x230, 0x84210); 453 mt7601u_wr(dev, 0x400, 0x80c00); 454 mt7601u_wr(dev, 0x800, 1); 455 456 mt7601u_rmw(dev, MT_PBF_CFG, 0, (MT_PBF_CFG_TX0Q_EN | 457 MT_PBF_CFG_TX1Q_EN | 458 MT_PBF_CFG_TX2Q_EN | 459 MT_PBF_CFG_TX3Q_EN)); 460 461 mt7601u_wr(dev, MT_FCE_PSE_CTRL, 1); 462 463 mt7601u_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN | 464 MT_USB_DMA_CFG_TX_BULK_EN)); 465 val = mt76_set(dev, MT_USB_DMA_CFG, MT_USB_DMA_CFG_TX_CLR); 466 val &= ~MT_USB_DMA_CFG_TX_CLR; 467 mt7601u_wr(dev, MT_USB_DMA_CFG, val); 468 469 /* FCE tx_fs_base_ptr */ 470 mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230); 471 /* FCE tx_fs_max_cnt */ 472 mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_MAX_COUNT, 1); 473 /* FCE pdma enable */ 474 mt7601u_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44); 475 /* FCE skip_fs_en */ 476 mt7601u_wr(dev, MT_FCE_SKIP_FS, 3); 477 478 ret = mt7601u_upload_firmware(dev, (const struct mt76_fw *)fw->data); 479 480 release_firmware(fw); 481 482 return ret; 483 484err_inv_fw: 485 dev_err(dev->dev, "Invalid firmware image\n"); 486 release_firmware(fw); 487 return -ENOENT; 488} 489 490int mt7601u_mcu_init(struct mt7601u_dev *dev) 491{ 492 int ret; 493 494 mutex_init(&dev->mcu.mutex); 495 496 ret = mt7601u_load_firmware(dev); 497 if (ret) 498 return ret; 499 500 set_bit(MT7601U_STATE_MCU_RUNNING, &dev->state); 501 502 return 0; 503} 504 505int mt7601u_mcu_cmd_init(struct mt7601u_dev *dev) 506{ 507 int ret; 508 509 ret = mt7601u_mcu_function_select(dev, Q_SELECT, 1); 510 if (ret) 511 return ret; 512 513 init_completion(&dev->mcu.resp_cmpl); 514 if (mt7601u_usb_alloc_buf(dev, MCU_RESP_URB_SIZE, &dev->mcu.resp)) { 515 mt7601u_usb_free_buf(dev, &dev->mcu.resp); 516 return -ENOMEM; 517 } 518 519 ret = mt7601u_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP, 520 &dev->mcu.resp, GFP_KERNEL, 521 mt7601u_complete_urb, &dev->mcu.resp_cmpl); 522 if (ret) { 523 mt7601u_usb_free_buf(dev, &dev->mcu.resp); 524 return ret; 525 } 526 527 return 0; 528} 529 530void mt7601u_mcu_cmd_deinit(struct mt7601u_dev *dev) 531{ 532 usb_kill_urb(dev->mcu.resp.urb); 533 mt7601u_usb_free_buf(dev, &dev->mcu.resp); 534} 535