1/******************************************************************************
2 *
3 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 *  Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/slab.h>
33#include <net/mac80211.h>
34#include "iwl-io.h"
35#include "iwl-debug.h"
36#include "iwl-trans.h"
37#include "iwl-modparams.h"
38#include "dev.h"
39#include "agn.h"
40#include "commands.h"
41#include "power.h"
42
43static bool force_cam = true;
44module_param(force_cam, bool, 0644);
45MODULE_PARM_DESC(force_cam, "force continuously aware mode (no power saving at all)");
46
47/*
48 * Setting power level allows the card to go to sleep when not busy.
49 *
50 * We calculate a sleep command based on the required latency, which
51 * we get from mac80211. In order to handle thermal throttling, we can
52 * also use pre-defined power levels.
53 */
54
55/*
56 * This defines the old power levels. They are still used by default
57 * (level 1) and for thermal throttle (levels 3 through 5)
58 */
59
60struct iwl_power_vec_entry {
61	struct iwl_powertable_cmd cmd;
62	u8 no_dtim;	/* number of skip dtim */
63};
64
65#define IWL_DTIM_RANGE_0_MAX	2
66#define IWL_DTIM_RANGE_1_MAX	10
67
68#define NOSLP cpu_to_le16(0), 0, 0
69#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
70#define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK |	\
71		IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \
72		IWL_POWER_ADVANCE_PM_ENA_MSK)
73#define ASLP_TOUT(T) cpu_to_le32(T)
74#define TU_TO_USEC 1024
75#define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
76#define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
77				     cpu_to_le32(X1), \
78				     cpu_to_le32(X2), \
79				     cpu_to_le32(X3), \
80				     cpu_to_le32(X4)}
81/* default power management (not Tx power) table values */
82/* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
83/* DTIM 0 - 2 */
84static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
85	{{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
86	{{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
87	{{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
88	{{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
89	{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
90};
91
92
93/* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
94/* DTIM 3 - 10 */
95static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
96	{{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
97	{{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
98	{{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
99	{{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
100	{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
101};
102
103/* for DTIM period > IWL_DTIM_RANGE_1_MAX */
104/* DTIM 11 - */
105static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
106	{{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
107	{{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
108	{{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
109	{{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
110	{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
111};
112
113/* advance power management */
114/* DTIM 0 - 2 */
115static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = {
116	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
117		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
118	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
119		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
120	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
121		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
122	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
123		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
124	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
125		SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
126};
127
128
129/* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
130/* DTIM 3 - 10 */
131static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = {
132	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
133		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
134	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
135		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
136	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
137		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
138	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
139		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
140	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
141		SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2}
142};
143
144/* for DTIM period > IWL_DTIM_RANGE_1_MAX */
145/* DTIM 11 - */
146static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = {
147	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
148		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
149	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
150		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
151	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
152		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
153	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
154		SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
155	{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
156		SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
157};
158
159static void iwl_static_sleep_cmd(struct iwl_priv *priv,
160				 struct iwl_powertable_cmd *cmd,
161				 enum iwl_power_level lvl, int period)
162{
163	const struct iwl_power_vec_entry *table;
164	int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
165	int i;
166	u8 skip;
167	u32 slp_itrvl;
168
169	if (priv->lib->adv_pm) {
170		table = apm_range_2;
171		if (period <= IWL_DTIM_RANGE_1_MAX)
172			table = apm_range_1;
173		if (period <= IWL_DTIM_RANGE_0_MAX)
174			table = apm_range_0;
175	} else {
176		table = range_2;
177		if (period <= IWL_DTIM_RANGE_1_MAX)
178			table = range_1;
179		if (period <= IWL_DTIM_RANGE_0_MAX)
180			table = range_0;
181	}
182
183	if (WARN_ON(lvl < 0 || lvl >= IWL_POWER_NUM))
184		memset(cmd, 0, sizeof(*cmd));
185	else
186		*cmd = table[lvl].cmd;
187
188	if (period == 0) {
189		skip = 0;
190		period = 1;
191		for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
192			max_sleep[i] =  1;
193
194	} else {
195		skip = table[lvl].no_dtim;
196		for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
197			max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
198		max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
199	}
200
201	slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
202	/* figure out the listen interval based on dtim period and skip */
203	if (slp_itrvl == 0xFF)
204		cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
205			cpu_to_le32(period * (skip + 1));
206
207	slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
208	if (slp_itrvl > period)
209		cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
210			cpu_to_le32((slp_itrvl / period) * period);
211
212	if (skip)
213		cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
214	else
215		cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
216
217	if (priv->cfg->base_params->shadow_reg_enable)
218		cmd->flags |= IWL_POWER_SHADOW_REG_ENA;
219	else
220		cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA;
221
222	if (iwl_advanced_bt_coexist(priv)) {
223		if (!priv->lib->bt_params->bt_sco_disable)
224			cmd->flags |= IWL_POWER_BT_SCO_ENA;
225		else
226			cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
227	}
228
229
230	slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
231	if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
232		cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
233			cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL);
234
235	/* enforce max sleep interval */
236	for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
237		if (le32_to_cpu(cmd->sleep_interval[i]) >
238		    (max_sleep[i] * period))
239			cmd->sleep_interval[i] =
240				cpu_to_le32(max_sleep[i] * period);
241		if (i != (IWL_POWER_VEC_SIZE - 1)) {
242			if (le32_to_cpu(cmd->sleep_interval[i]) >
243			    le32_to_cpu(cmd->sleep_interval[i+1]))
244				cmd->sleep_interval[i] =
245					cmd->sleep_interval[i+1];
246		}
247	}
248
249	if (priv->power_data.bus_pm)
250		cmd->flags |= IWL_POWER_PCI_PM_MSK;
251	else
252		cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
253
254	IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
255			skip, period);
256	/* The power level here is 0-4 (used as array index), but user expects
257	to see 1-5 (according to spec). */
258	IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
259}
260
261static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,
262				    struct iwl_powertable_cmd *cmd)
263{
264	memset(cmd, 0, sizeof(*cmd));
265
266	if (priv->power_data.bus_pm)
267		cmd->flags |= IWL_POWER_PCI_PM_MSK;
268
269	IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");
270}
271
272static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
273{
274	IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");
275	IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
276	IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
277	IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
278	IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
279			le32_to_cpu(cmd->sleep_interval[0]),
280			le32_to_cpu(cmd->sleep_interval[1]),
281			le32_to_cpu(cmd->sleep_interval[2]),
282			le32_to_cpu(cmd->sleep_interval[3]),
283			le32_to_cpu(cmd->sleep_interval[4]));
284
285	return iwl_dvm_send_cmd_pdu(priv, POWER_TABLE_CMD, 0,
286				sizeof(struct iwl_powertable_cmd), cmd);
287}
288
289static void iwl_power_build_cmd(struct iwl_priv *priv,
290				struct iwl_powertable_cmd *cmd)
291{
292	bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
293	int dtimper;
294
295	if (force_cam) {
296		iwl_power_sleep_cam_cmd(priv, cmd);
297		return;
298	}
299
300	dtimper = priv->hw->conf.ps_dtim_period ?: 1;
301
302	if (priv->wowlan)
303		iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, dtimper);
304	else if (!priv->lib->no_idle_support &&
305		 priv->hw->conf.flags & IEEE80211_CONF_IDLE)
306		iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20);
307	else if (iwl_tt_is_low_power_state(priv)) {
308		/* in thermal throttling low power state */
309		iwl_static_sleep_cmd(priv, cmd,
310		    iwl_tt_current_power_mode(priv), dtimper);
311	} else if (!enabled)
312		iwl_power_sleep_cam_cmd(priv, cmd);
313	else if (priv->power_data.debug_sleep_level_override >= 0)
314		iwl_static_sleep_cmd(priv, cmd,
315				     priv->power_data.debug_sleep_level_override,
316				     dtimper);
317	else {
318		/* Note that the user parameter is 1-5 (according to spec),
319		but we pass 0-4 because it acts as an array index. */
320		if (iwlwifi_mod_params.power_level > IWL_POWER_INDEX_1 &&
321		    iwlwifi_mod_params.power_level <= IWL_POWER_NUM)
322			iwl_static_sleep_cmd(priv, cmd,
323				iwlwifi_mod_params.power_level - 1, dtimper);
324		else
325			iwl_static_sleep_cmd(priv, cmd,
326				IWL_POWER_INDEX_1, dtimper);
327	}
328}
329
330int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd,
331		       bool force)
332{
333	int ret;
334	bool update_chains;
335
336	lockdep_assert_held(&priv->mutex);
337
338	/* Don't update the RX chain when chain noise calibration is running */
339	update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
340			priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
341
342	if (!memcmp(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
343		return 0;
344
345	if (!iwl_is_ready_rf(priv))
346		return -EIO;
347
348	/* scan complete use sleep_power_next, need to be updated */
349	memcpy(&priv->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
350	if (test_bit(STATUS_SCANNING, &priv->status) && !force) {
351		IWL_DEBUG_INFO(priv, "Defer power set mode while scanning\n");
352		return 0;
353	}
354
355	if (cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)
356		iwl_dvm_set_pmi(priv, true);
357
358	ret = iwl_set_power(priv, cmd);
359	if (!ret) {
360		if (!(cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK))
361			iwl_dvm_set_pmi(priv, false);
362
363		if (update_chains)
364			iwl_update_chain_flags(priv);
365		else
366			IWL_DEBUG_POWER(priv,
367					"Cannot update the power, chain noise "
368					"calibration running: %d\n",
369					priv->chain_noise_data.state);
370
371		memcpy(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd));
372	} else
373		IWL_ERR(priv, "set power fail, ret = %d\n", ret);
374
375	return ret;
376}
377
378int iwl_power_update_mode(struct iwl_priv *priv, bool force)
379{
380	struct iwl_powertable_cmd cmd;
381
382	iwl_power_build_cmd(priv, &cmd);
383	return iwl_power_set_mode(priv, &cmd, force);
384}
385
386/* initialize to default */
387void iwl_power_initialize(struct iwl_priv *priv)
388{
389	priv->power_data.bus_pm = priv->trans->pm_support;
390
391	priv->power_data.debug_sleep_level_override = -1;
392
393	memset(&priv->power_data.sleep_cmd, 0,
394		sizeof(priv->power_data.sleep_cmd));
395}
396