1/* 2 * Copyright (C) 2015 Cavium, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of version 2 of the GNU General Public License 6 * as published by the Free Software Foundation. 7 */ 8 9#include <linux/module.h> 10#include <linux/interrupt.h> 11#include <linux/pci.h> 12#include <linux/netdevice.h> 13#include <linux/if_vlan.h> 14#include <linux/etherdevice.h> 15#include <linux/ethtool.h> 16#include <linux/log2.h> 17#include <linux/prefetch.h> 18#include <linux/irq.h> 19 20#include "nic_reg.h" 21#include "nic.h" 22#include "nicvf_queues.h" 23#include "thunder_bgx.h" 24 25#define DRV_NAME "thunder-nicvf" 26#define DRV_VERSION "1.0" 27 28/* Supported devices */ 29static const struct pci_device_id nicvf_id_table[] = { 30 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, 31 PCI_DEVICE_ID_THUNDER_NIC_VF, 32 PCI_VENDOR_ID_CAVIUM, 0xA134) }, 33 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, 34 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF, 35 PCI_VENDOR_ID_CAVIUM, 0xA11E) }, 36 { 0, } /* end of table */ 37}; 38 39MODULE_AUTHOR("Sunil Goutham"); 40MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver"); 41MODULE_LICENSE("GPL v2"); 42MODULE_VERSION(DRV_VERSION); 43MODULE_DEVICE_TABLE(pci, nicvf_id_table); 44 45static int debug = 0x00; 46module_param(debug, int, 0644); 47MODULE_PARM_DESC(debug, "Debug message level bitmap"); 48 49static int cpi_alg = CPI_ALG_NONE; 50module_param(cpi_alg, int, S_IRUGO); 51MODULE_PARM_DESC(cpi_alg, 52 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)"); 53 54static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx) 55{ 56 if (nic->sqs_mode) 57 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS); 58 else 59 return qidx; 60} 61 62static inline void nicvf_set_rx_frame_cnt(struct nicvf *nic, 63 struct sk_buff *skb) 64{ 65 if (skb->len <= 64) 66 nic->drv_stats.rx_frames_64++; 67 else if (skb->len <= 127) 68 nic->drv_stats.rx_frames_127++; 69 else if (skb->len <= 255) 70 nic->drv_stats.rx_frames_255++; 71 else if (skb->len <= 511) 72 nic->drv_stats.rx_frames_511++; 73 else if (skb->len <= 1023) 74 nic->drv_stats.rx_frames_1023++; 75 else if (skb->len <= 1518) 76 nic->drv_stats.rx_frames_1518++; 77 else 78 nic->drv_stats.rx_frames_jumbo++; 79} 80 81/* The Cavium ThunderX network controller can *only* be found in SoCs 82 * containing the ThunderX ARM64 CPU implementation. All accesses to the device 83 * registers on this platform are implicitly strongly ordered with respect 84 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use 85 * with no memory barriers in this driver. The readq()/writeq() functions add 86 * explicit ordering operation which in this case are redundant, and only 87 * add overhead. 88 */ 89 90/* Register read/write APIs */ 91void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val) 92{ 93 writeq_relaxed(val, nic->reg_base + offset); 94} 95 96u64 nicvf_reg_read(struct nicvf *nic, u64 offset) 97{ 98 return readq_relaxed(nic->reg_base + offset); 99} 100 101void nicvf_queue_reg_write(struct nicvf *nic, u64 offset, 102 u64 qidx, u64 val) 103{ 104 void __iomem *addr = nic->reg_base + offset; 105 106 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT)); 107} 108 109u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx) 110{ 111 void __iomem *addr = nic->reg_base + offset; 112 113 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT)); 114} 115 116/* VF -> PF mailbox communication */ 117static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx) 118{ 119 u64 *msg = (u64 *)mbx; 120 121 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]); 122 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]); 123} 124 125int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx) 126{ 127 int timeout = NIC_MBOX_MSG_TIMEOUT; 128 int sleep = 10; 129 130 nic->pf_acked = false; 131 nic->pf_nacked = false; 132 133 nicvf_write_to_mbx(nic, mbx); 134 135 /* Wait for previous message to be acked, timeout 2sec */ 136 while (!nic->pf_acked) { 137 if (nic->pf_nacked) 138 return -EINVAL; 139 msleep(sleep); 140 if (nic->pf_acked) 141 break; 142 timeout -= sleep; 143 if (!timeout) { 144 netdev_err(nic->netdev, 145 "PF didn't ack to mbox msg %d from VF%d\n", 146 (mbx->msg.msg & 0xFF), nic->vf_id); 147 return -EBUSY; 148 } 149 } 150 return 0; 151} 152 153/* Checks if VF is able to comminicate with PF 154* and also gets the VNIC number this VF is associated to. 155*/ 156static int nicvf_check_pf_ready(struct nicvf *nic) 157{ 158 union nic_mbx mbx = {}; 159 160 mbx.msg.msg = NIC_MBOX_MSG_READY; 161 if (nicvf_send_msg_to_pf(nic, &mbx)) { 162 netdev_err(nic->netdev, 163 "PF didn't respond to READY msg\n"); 164 return 0; 165 } 166 167 return 1; 168} 169 170static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx) 171{ 172 if (bgx->rx) 173 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats; 174 else 175 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats; 176} 177 178static void nicvf_handle_mbx_intr(struct nicvf *nic) 179{ 180 union nic_mbx mbx = {}; 181 u64 *mbx_data; 182 u64 mbx_addr; 183 int i; 184 185 mbx_addr = NIC_VF_PF_MAILBOX_0_1; 186 mbx_data = (u64 *)&mbx; 187 188 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) { 189 *mbx_data = nicvf_reg_read(nic, mbx_addr); 190 mbx_data++; 191 mbx_addr += sizeof(u64); 192 } 193 194 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg); 195 switch (mbx.msg.msg) { 196 case NIC_MBOX_MSG_READY: 197 nic->pf_acked = true; 198 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F; 199 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F; 200 nic->node = mbx.nic_cfg.node_id; 201 if (!nic->set_mac_pending) 202 ether_addr_copy(nic->netdev->dev_addr, 203 mbx.nic_cfg.mac_addr); 204 nic->sqs_mode = mbx.nic_cfg.sqs_mode; 205 nic->loopback_supported = mbx.nic_cfg.loopback_supported; 206 nic->link_up = false; 207 nic->duplex = 0; 208 nic->speed = 0; 209 break; 210 case NIC_MBOX_MSG_ACK: 211 nic->pf_acked = true; 212 break; 213 case NIC_MBOX_MSG_NACK: 214 nic->pf_nacked = true; 215 break; 216 case NIC_MBOX_MSG_RSS_SIZE: 217 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size; 218 nic->pf_acked = true; 219 break; 220 case NIC_MBOX_MSG_BGX_STATS: 221 nicvf_read_bgx_stats(nic, &mbx.bgx_stats); 222 nic->pf_acked = true; 223 break; 224 case NIC_MBOX_MSG_BGX_LINK_CHANGE: 225 nic->pf_acked = true; 226 nic->link_up = mbx.link_status.link_up; 227 nic->duplex = mbx.link_status.duplex; 228 nic->speed = mbx.link_status.speed; 229 if (nic->link_up) { 230 netdev_info(nic->netdev, "%s: Link is Up %d Mbps %s\n", 231 nic->netdev->name, nic->speed, 232 nic->duplex == DUPLEX_FULL ? 233 "Full duplex" : "Half duplex"); 234 netif_carrier_on(nic->netdev); 235 netif_tx_start_all_queues(nic->netdev); 236 } else { 237 netdev_info(nic->netdev, "%s: Link is Down\n", 238 nic->netdev->name); 239 netif_carrier_off(nic->netdev); 240 netif_tx_stop_all_queues(nic->netdev); 241 } 242 break; 243 case NIC_MBOX_MSG_ALLOC_SQS: 244 nic->sqs_count = mbx.sqs_alloc.qs_count; 245 nic->pf_acked = true; 246 break; 247 case NIC_MBOX_MSG_SNICVF_PTR: 248 /* Primary VF: make note of secondary VF's pointer 249 * to be used while packet transmission. 250 */ 251 nic->snicvf[mbx.nicvf.sqs_id] = 252 (struct nicvf *)mbx.nicvf.nicvf; 253 nic->pf_acked = true; 254 break; 255 case NIC_MBOX_MSG_PNICVF_PTR: 256 /* Secondary VF/Qset: make note of primary VF's pointer 257 * to be used while packet reception, to handover packet 258 * to primary VF's netdev. 259 */ 260 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf; 261 nic->pf_acked = true; 262 break; 263 default: 264 netdev_err(nic->netdev, 265 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg); 266 break; 267 } 268 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0); 269} 270 271static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev) 272{ 273 union nic_mbx mbx = {}; 274 275 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC; 276 mbx.mac.vf_id = nic->vf_id; 277 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr); 278 279 return nicvf_send_msg_to_pf(nic, &mbx); 280} 281 282static void nicvf_config_cpi(struct nicvf *nic) 283{ 284 union nic_mbx mbx = {}; 285 286 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG; 287 mbx.cpi_cfg.vf_id = nic->vf_id; 288 mbx.cpi_cfg.cpi_alg = nic->cpi_alg; 289 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt; 290 291 nicvf_send_msg_to_pf(nic, &mbx); 292} 293 294static void nicvf_get_rss_size(struct nicvf *nic) 295{ 296 union nic_mbx mbx = {}; 297 298 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE; 299 mbx.rss_size.vf_id = nic->vf_id; 300 nicvf_send_msg_to_pf(nic, &mbx); 301} 302 303void nicvf_config_rss(struct nicvf *nic) 304{ 305 union nic_mbx mbx = {}; 306 struct nicvf_rss_info *rss = &nic->rss_info; 307 int ind_tbl_len = rss->rss_size; 308 int i, nextq = 0; 309 310 mbx.rss_cfg.vf_id = nic->vf_id; 311 mbx.rss_cfg.hash_bits = rss->hash_bits; 312 while (ind_tbl_len) { 313 mbx.rss_cfg.tbl_offset = nextq; 314 mbx.rss_cfg.tbl_len = min(ind_tbl_len, 315 RSS_IND_TBL_LEN_PER_MBX_MSG); 316 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ? 317 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG; 318 319 for (i = 0; i < mbx.rss_cfg.tbl_len; i++) 320 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++]; 321 322 nicvf_send_msg_to_pf(nic, &mbx); 323 324 ind_tbl_len -= mbx.rss_cfg.tbl_len; 325 } 326} 327 328void nicvf_set_rss_key(struct nicvf *nic) 329{ 330 struct nicvf_rss_info *rss = &nic->rss_info; 331 u64 key_addr = NIC_VNIC_RSS_KEY_0_4; 332 int idx; 333 334 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) { 335 nicvf_reg_write(nic, key_addr, rss->key[idx]); 336 key_addr += sizeof(u64); 337 } 338} 339 340static int nicvf_rss_init(struct nicvf *nic) 341{ 342 struct nicvf_rss_info *rss = &nic->rss_info; 343 int idx; 344 345 nicvf_get_rss_size(nic); 346 347 if (cpi_alg != CPI_ALG_NONE) { 348 rss->enable = false; 349 rss->hash_bits = 0; 350 return 0; 351 } 352 353 rss->enable = true; 354 355 /* Using the HW reset value for now */ 356 rss->key[0] = 0xFEED0BADFEED0BADULL; 357 rss->key[1] = 0xFEED0BADFEED0BADULL; 358 rss->key[2] = 0xFEED0BADFEED0BADULL; 359 rss->key[3] = 0xFEED0BADFEED0BADULL; 360 rss->key[4] = 0xFEED0BADFEED0BADULL; 361 362 nicvf_set_rss_key(nic); 363 364 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA; 365 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg); 366 367 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size)); 368 369 for (idx = 0; idx < rss->rss_size; idx++) 370 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx, 371 nic->rx_queues); 372 nicvf_config_rss(nic); 373 return 1; 374} 375 376/* Request PF to allocate additional Qsets */ 377static void nicvf_request_sqs(struct nicvf *nic) 378{ 379 union nic_mbx mbx = {}; 380 int sqs; 381 int sqs_count = nic->sqs_count; 382 int rx_queues = 0, tx_queues = 0; 383 384 /* Only primary VF should request */ 385 if (nic->sqs_mode || !nic->sqs_count) 386 return; 387 388 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS; 389 mbx.sqs_alloc.vf_id = nic->vf_id; 390 mbx.sqs_alloc.qs_count = nic->sqs_count; 391 if (nicvf_send_msg_to_pf(nic, &mbx)) { 392 /* No response from PF */ 393 nic->sqs_count = 0; 394 return; 395 } 396 397 /* Return if no Secondary Qsets available */ 398 if (!nic->sqs_count) 399 return; 400 401 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS) 402 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS; 403 if (nic->tx_queues > MAX_SND_QUEUES_PER_QS) 404 tx_queues = nic->tx_queues - MAX_SND_QUEUES_PER_QS; 405 406 /* Set no of Rx/Tx queues in each of the SQsets */ 407 for (sqs = 0; sqs < nic->sqs_count; sqs++) { 408 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR; 409 mbx.nicvf.vf_id = nic->vf_id; 410 mbx.nicvf.sqs_id = sqs; 411 nicvf_send_msg_to_pf(nic, &mbx); 412 413 nic->snicvf[sqs]->sqs_id = sqs; 414 if (rx_queues > MAX_RCV_QUEUES_PER_QS) { 415 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS; 416 rx_queues -= MAX_RCV_QUEUES_PER_QS; 417 } else { 418 nic->snicvf[sqs]->qs->rq_cnt = rx_queues; 419 rx_queues = 0; 420 } 421 422 if (tx_queues > MAX_SND_QUEUES_PER_QS) { 423 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS; 424 tx_queues -= MAX_SND_QUEUES_PER_QS; 425 } else { 426 nic->snicvf[sqs]->qs->sq_cnt = tx_queues; 427 tx_queues = 0; 428 } 429 430 nic->snicvf[sqs]->qs->cq_cnt = 431 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt); 432 433 /* Initialize secondary Qset's queues and its interrupts */ 434 nicvf_open(nic->snicvf[sqs]->netdev); 435 } 436 437 /* Update stack with actual Rx/Tx queue count allocated */ 438 if (sqs_count != nic->sqs_count) 439 nicvf_set_real_num_queues(nic->netdev, 440 nic->tx_queues, nic->rx_queues); 441} 442 443/* Send this Qset's nicvf pointer to PF. 444 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs 445 * so that packets received by these Qsets can use primary VF's netdev 446 */ 447static void nicvf_send_vf_struct(struct nicvf *nic) 448{ 449 union nic_mbx mbx = {}; 450 451 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR; 452 mbx.nicvf.sqs_mode = nic->sqs_mode; 453 mbx.nicvf.nicvf = (u64)nic; 454 nicvf_send_msg_to_pf(nic, &mbx); 455} 456 457static void nicvf_get_primary_vf_struct(struct nicvf *nic) 458{ 459 union nic_mbx mbx = {}; 460 461 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR; 462 nicvf_send_msg_to_pf(nic, &mbx); 463} 464 465int nicvf_set_real_num_queues(struct net_device *netdev, 466 int tx_queues, int rx_queues) 467{ 468 int err = 0; 469 470 err = netif_set_real_num_tx_queues(netdev, tx_queues); 471 if (err) { 472 netdev_err(netdev, 473 "Failed to set no of Tx queues: %d\n", tx_queues); 474 return err; 475 } 476 477 err = netif_set_real_num_rx_queues(netdev, rx_queues); 478 if (err) 479 netdev_err(netdev, 480 "Failed to set no of Rx queues: %d\n", rx_queues); 481 return err; 482} 483 484static int nicvf_init_resources(struct nicvf *nic) 485{ 486 int err; 487 union nic_mbx mbx = {}; 488 489 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE; 490 491 /* Enable Qset */ 492 nicvf_qset_config(nic, true); 493 494 /* Initialize queues and HW for data transfer */ 495 err = nicvf_config_data_transfer(nic, true); 496 if (err) { 497 netdev_err(nic->netdev, 498 "Failed to alloc/config VF's QSet resources\n"); 499 return err; 500 } 501 502 /* Send VF config done msg to PF */ 503 nicvf_write_to_mbx(nic, &mbx); 504 505 return 0; 506} 507 508static void nicvf_snd_pkt_handler(struct net_device *netdev, 509 struct cmp_queue *cq, 510 struct cqe_send_t *cqe_tx, int cqe_type) 511{ 512 struct sk_buff *skb = NULL; 513 struct nicvf *nic = netdev_priv(netdev); 514 struct snd_queue *sq; 515 struct sq_hdr_subdesc *hdr; 516 517 sq = &nic->qs->sq[cqe_tx->sq_idx]; 518 519 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr); 520 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER) 521 return; 522 523 netdev_dbg(nic->netdev, 524 "%s Qset #%d SQ #%d SQ ptr #%d subdesc count %d\n", 525 __func__, cqe_tx->sq_qs, cqe_tx->sq_idx, 526 cqe_tx->sqe_ptr, hdr->subdesc_cnt); 527 528 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1); 529 nicvf_check_cqe_tx_errs(nic, cq, cqe_tx); 530 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr]; 531 /* For TSO offloaded packets only one head SKB needs to be freed */ 532 if (skb) { 533 prefetch(skb); 534 dev_consume_skb_any(skb); 535 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL; 536 } 537} 538 539static inline void nicvf_set_rxhash(struct net_device *netdev, 540 struct cqe_rx_t *cqe_rx, 541 struct sk_buff *skb) 542{ 543 u8 hash_type; 544 u32 hash; 545 546 if (!(netdev->features & NETIF_F_RXHASH)) 547 return; 548 549 switch (cqe_rx->rss_alg) { 550 case RSS_ALG_TCP_IP: 551 case RSS_ALG_UDP_IP: 552 hash_type = PKT_HASH_TYPE_L4; 553 hash = cqe_rx->rss_tag; 554 break; 555 case RSS_ALG_IP: 556 hash_type = PKT_HASH_TYPE_L3; 557 hash = cqe_rx->rss_tag; 558 break; 559 default: 560 hash_type = PKT_HASH_TYPE_NONE; 561 hash = 0; 562 } 563 564 skb_set_hash(skb, hash, hash_type); 565} 566 567static void nicvf_rcv_pkt_handler(struct net_device *netdev, 568 struct napi_struct *napi, 569 struct cmp_queue *cq, 570 struct cqe_rx_t *cqe_rx, int cqe_type) 571{ 572 struct sk_buff *skb; 573 struct nicvf *nic = netdev_priv(netdev); 574 int err = 0; 575 int rq_idx; 576 577 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx); 578 579 if (nic->sqs_mode) { 580 /* Use primary VF's 'nicvf' struct */ 581 nic = nic->pnicvf; 582 netdev = nic->netdev; 583 } 584 585 /* Check for errors */ 586 err = nicvf_check_cqe_rx_errs(nic, cq, cqe_rx); 587 if (err && !cqe_rx->rb_cnt) 588 return; 589 590 skb = nicvf_get_rcv_skb(nic, cqe_rx); 591 if (!skb) { 592 netdev_dbg(nic->netdev, "Packet not received\n"); 593 return; 594 } 595 596 if (netif_msg_pktdata(nic)) { 597 netdev_info(nic->netdev, "%s: skb 0x%p, len=%d\n", netdev->name, 598 skb, skb->len); 599 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, 600 skb->data, skb->len, true); 601 } 602 603 /* If error packet, drop it here */ 604 if (err) { 605 dev_kfree_skb_any(skb); 606 return; 607 } 608 609 nicvf_set_rx_frame_cnt(nic, skb); 610 611 nicvf_set_rxhash(netdev, cqe_rx, skb); 612 613 skb_record_rx_queue(skb, rq_idx); 614 if (netdev->hw_features & NETIF_F_RXCSUM) { 615 /* HW by default verifies TCP/UDP/SCTP checksums */ 616 skb->ip_summed = CHECKSUM_UNNECESSARY; 617 } else { 618 skb_checksum_none_assert(skb); 619 } 620 621 skb->protocol = eth_type_trans(skb, netdev); 622 623 /* Check for stripped VLAN */ 624 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped) 625 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 626 ntohs((__force __be16)cqe_rx->vlan_tci)); 627 628 if (napi && (netdev->features & NETIF_F_GRO)) 629 napi_gro_receive(napi, skb); 630 else 631 netif_receive_skb(skb); 632} 633 634static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx, 635 struct napi_struct *napi, int budget) 636{ 637 int processed_cqe, work_done = 0, tx_done = 0; 638 int cqe_count, cqe_head; 639 struct nicvf *nic = netdev_priv(netdev); 640 struct queue_set *qs = nic->qs; 641 struct cmp_queue *cq = &qs->cq[cq_idx]; 642 struct cqe_rx_t *cq_desc; 643 struct netdev_queue *txq; 644 645 spin_lock_bh(&cq->lock); 646loop: 647 processed_cqe = 0; 648 /* Get no of valid CQ entries to process */ 649 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx); 650 cqe_count &= CQ_CQE_COUNT; 651 if (!cqe_count) 652 goto done; 653 654 /* Get head of the valid CQ entries */ 655 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9; 656 cqe_head &= 0xFFFF; 657 658 netdev_dbg(nic->netdev, "%s CQ%d cqe_count %d cqe_head %d\n", 659 __func__, cq_idx, cqe_count, cqe_head); 660 while (processed_cqe < cqe_count) { 661 /* Get the CQ descriptor */ 662 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head); 663 cqe_head++; 664 cqe_head &= (cq->dmem.q_len - 1); 665 /* Initiate prefetch for next descriptor */ 666 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head)); 667 668 if ((work_done >= budget) && napi && 669 (cq_desc->cqe_type != CQE_TYPE_SEND)) { 670 break; 671 } 672 673 netdev_dbg(nic->netdev, "CQ%d cq_desc->cqe_type %d\n", 674 cq_idx, cq_desc->cqe_type); 675 switch (cq_desc->cqe_type) { 676 case CQE_TYPE_RX: 677 nicvf_rcv_pkt_handler(netdev, napi, cq, 678 cq_desc, CQE_TYPE_RX); 679 work_done++; 680 break; 681 case CQE_TYPE_SEND: 682 nicvf_snd_pkt_handler(netdev, cq, 683 (void *)cq_desc, CQE_TYPE_SEND); 684 tx_done++; 685 break; 686 case CQE_TYPE_INVALID: 687 case CQE_TYPE_RX_SPLIT: 688 case CQE_TYPE_RX_TCP: 689 case CQE_TYPE_SEND_PTP: 690 /* Ignore for now */ 691 break; 692 } 693 processed_cqe++; 694 } 695 netdev_dbg(nic->netdev, 696 "%s CQ%d processed_cqe %d work_done %d budget %d\n", 697 __func__, cq_idx, processed_cqe, work_done, budget); 698 699 /* Ring doorbell to inform H/W to reuse processed CQEs */ 700 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR, 701 cq_idx, processed_cqe); 702 703 if ((work_done < budget) && napi) 704 goto loop; 705 706done: 707 /* Wakeup TXQ if its stopped earlier due to SQ full */ 708 if (tx_done) { 709 netdev = nic->pnicvf->netdev; 710 txq = netdev_get_tx_queue(netdev, 711 nicvf_netdev_qidx(nic, cq_idx)); 712 nic = nic->pnicvf; 713 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) { 714 netif_tx_start_queue(txq); 715 nic->drv_stats.txq_wake++; 716 if (netif_msg_tx_err(nic)) 717 netdev_warn(netdev, 718 "%s: Transmit queue wakeup SQ%d\n", 719 netdev->name, cq_idx); 720 } 721 } 722 723 spin_unlock_bh(&cq->lock); 724 return work_done; 725} 726 727static int nicvf_poll(struct napi_struct *napi, int budget) 728{ 729 u64 cq_head; 730 int work_done = 0; 731 struct net_device *netdev = napi->dev; 732 struct nicvf *nic = netdev_priv(netdev); 733 struct nicvf_cq_poll *cq; 734 735 cq = container_of(napi, struct nicvf_cq_poll, napi); 736 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget); 737 738 if (work_done < budget) { 739 /* Slow packet rate, exit polling */ 740 napi_complete(napi); 741 /* Re-enable interrupts */ 742 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, 743 cq->cq_idx); 744 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx); 745 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD, 746 cq->cq_idx, cq_head); 747 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx); 748 } 749 return work_done; 750} 751 752/* Qset error interrupt handler 753 * 754 * As of now only CQ errors are handled 755 */ 756static void nicvf_handle_qs_err(unsigned long data) 757{ 758 struct nicvf *nic = (struct nicvf *)data; 759 struct queue_set *qs = nic->qs; 760 int qidx; 761 u64 status; 762 763 netif_tx_disable(nic->netdev); 764 765 /* Check if it is CQ err */ 766 for (qidx = 0; qidx < qs->cq_cnt; qidx++) { 767 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, 768 qidx); 769 if (!(status & CQ_ERR_MASK)) 770 continue; 771 /* Process already queued CQEs and reconfig CQ */ 772 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx); 773 nicvf_sq_disable(nic, qidx); 774 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0); 775 nicvf_cmp_queue_config(nic, qs, qidx, true); 776 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx); 777 nicvf_sq_enable(nic, &qs->sq[qidx], qidx); 778 779 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx); 780 } 781 782 netif_tx_start_all_queues(nic->netdev); 783 /* Re-enable Qset error interrupt */ 784 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0); 785} 786 787static void nicvf_dump_intr_status(struct nicvf *nic) 788{ 789 if (netif_msg_intr(nic)) 790 netdev_info(nic->netdev, "%s: interrupt status 0x%llx\n", 791 nic->netdev->name, nicvf_reg_read(nic, NIC_VF_INT)); 792} 793 794static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq) 795{ 796 struct nicvf *nic = (struct nicvf *)nicvf_irq; 797 u64 intr; 798 799 nicvf_dump_intr_status(nic); 800 801 intr = nicvf_reg_read(nic, NIC_VF_INT); 802 /* Check for spurious interrupt */ 803 if (!(intr & NICVF_INTR_MBOX_MASK)) 804 return IRQ_HANDLED; 805 806 nicvf_handle_mbx_intr(nic); 807 808 return IRQ_HANDLED; 809} 810 811static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq) 812{ 813 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq; 814 struct nicvf *nic = cq_poll->nicvf; 815 int qidx = cq_poll->cq_idx; 816 817 nicvf_dump_intr_status(nic); 818 819 /* Disable interrupts */ 820 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx); 821 822 /* Schedule NAPI */ 823 napi_schedule(&cq_poll->napi); 824 825 /* Clear interrupt */ 826 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx); 827 828 return IRQ_HANDLED; 829} 830 831static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq) 832{ 833 struct nicvf *nic = (struct nicvf *)nicvf_irq; 834 u8 qidx; 835 836 837 nicvf_dump_intr_status(nic); 838 839 /* Disable RBDR interrupt and schedule softirq */ 840 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) { 841 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx)) 842 continue; 843 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx); 844 tasklet_hi_schedule(&nic->rbdr_task); 845 /* Clear interrupt */ 846 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx); 847 } 848 849 return IRQ_HANDLED; 850} 851 852static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq) 853{ 854 struct nicvf *nic = (struct nicvf *)nicvf_irq; 855 856 nicvf_dump_intr_status(nic); 857 858 /* Disable Qset err interrupt and schedule softirq */ 859 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0); 860 tasklet_hi_schedule(&nic->qs_err_task); 861 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0); 862 863 return IRQ_HANDLED; 864} 865 866static int nicvf_enable_msix(struct nicvf *nic) 867{ 868 int ret, vec; 869 870 nic->num_vec = NIC_VF_MSIX_VECTORS; 871 872 for (vec = 0; vec < nic->num_vec; vec++) 873 nic->msix_entries[vec].entry = vec; 874 875 ret = pci_enable_msix(nic->pdev, nic->msix_entries, nic->num_vec); 876 if (ret) { 877 netdev_err(nic->netdev, 878 "Req for #%d msix vectors failed\n", nic->num_vec); 879 return 0; 880 } 881 nic->msix_enabled = 1; 882 return 1; 883} 884 885static void nicvf_disable_msix(struct nicvf *nic) 886{ 887 if (nic->msix_enabled) { 888 pci_disable_msix(nic->pdev); 889 nic->msix_enabled = 0; 890 nic->num_vec = 0; 891 } 892} 893 894static int nicvf_register_interrupts(struct nicvf *nic) 895{ 896 int irq, ret = 0; 897 int vector; 898 899 for_each_cq_irq(irq) 900 sprintf(nic->irq_name[irq], "NICVF%d CQ%d", 901 nic->vf_id, irq); 902 903 for_each_sq_irq(irq) 904 sprintf(nic->irq_name[irq], "NICVF%d SQ%d", 905 nic->vf_id, irq - NICVF_INTR_ID_SQ); 906 907 for_each_rbdr_irq(irq) 908 sprintf(nic->irq_name[irq], "NICVF%d RBDR%d", 909 nic->vf_id, irq - NICVF_INTR_ID_RBDR); 910 911 /* Register CQ interrupts */ 912 for (irq = 0; irq < nic->qs->cq_cnt; irq++) { 913 vector = nic->msix_entries[irq].vector; 914 ret = request_irq(vector, nicvf_intr_handler, 915 0, nic->irq_name[irq], nic->napi[irq]); 916 if (ret) 917 goto err; 918 nic->irq_allocated[irq] = true; 919 } 920 921 /* Register RBDR interrupt */ 922 for (irq = NICVF_INTR_ID_RBDR; 923 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) { 924 vector = nic->msix_entries[irq].vector; 925 ret = request_irq(vector, nicvf_rbdr_intr_handler, 926 0, nic->irq_name[irq], nic); 927 if (ret) 928 goto err; 929 nic->irq_allocated[irq] = true; 930 } 931 932 /* Register QS error interrupt */ 933 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], 934 "NICVF%d Qset error", nic->vf_id); 935 irq = NICVF_INTR_ID_QS_ERR; 936 ret = request_irq(nic->msix_entries[irq].vector, 937 nicvf_qs_err_intr_handler, 938 0, nic->irq_name[irq], nic); 939 if (!ret) 940 nic->irq_allocated[irq] = true; 941 942err: 943 if (ret) 944 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq); 945 946 return ret; 947} 948 949static void nicvf_unregister_interrupts(struct nicvf *nic) 950{ 951 int irq; 952 953 /* Free registered interrupts */ 954 for (irq = 0; irq < nic->num_vec; irq++) { 955 if (!nic->irq_allocated[irq]) 956 continue; 957 958 if (irq < NICVF_INTR_ID_SQ) 959 free_irq(nic->msix_entries[irq].vector, nic->napi[irq]); 960 else 961 free_irq(nic->msix_entries[irq].vector, nic); 962 963 nic->irq_allocated[irq] = false; 964 } 965 966 /* Disable MSI-X */ 967 nicvf_disable_msix(nic); 968} 969 970/* Initialize MSIX vectors and register MISC interrupt. 971 * Send READY message to PF to check if its alive 972 */ 973static int nicvf_register_misc_interrupt(struct nicvf *nic) 974{ 975 int ret = 0; 976 int irq = NICVF_INTR_ID_MISC; 977 978 /* Return if mailbox interrupt is already registered */ 979 if (nic->msix_enabled) 980 return 0; 981 982 /* Enable MSI-X */ 983 if (!nicvf_enable_msix(nic)) 984 return 1; 985 986 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF"); 987 /* Register Misc interrupt */ 988 ret = request_irq(nic->msix_entries[irq].vector, 989 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic); 990 991 if (ret) 992 return ret; 993 nic->irq_allocated[irq] = true; 994 995 /* Enable mailbox interrupt */ 996 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0); 997 998 /* Check if VF is able to communicate with PF */ 999 if (!nicvf_check_pf_ready(nic)) { 1000 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0); 1001 nicvf_unregister_interrupts(nic); 1002 return 1; 1003 } 1004 1005 return 0; 1006} 1007 1008static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev) 1009{ 1010 struct nicvf *nic = netdev_priv(netdev); 1011 int qid = skb_get_queue_mapping(skb); 1012 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid); 1013 1014 /* Check for minimum packet length */ 1015 if (skb->len <= ETH_HLEN) { 1016 dev_kfree_skb(skb); 1017 return NETDEV_TX_OK; 1018 } 1019 1020 if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) { 1021 netif_tx_stop_queue(txq); 1022 nic->drv_stats.txq_stop++; 1023 if (netif_msg_tx_err(nic)) 1024 netdev_warn(netdev, 1025 "%s: Transmit ring full, stopping SQ%d\n", 1026 netdev->name, qid); 1027 return NETDEV_TX_BUSY; 1028 } 1029 1030 return NETDEV_TX_OK; 1031} 1032 1033static inline void nicvf_free_cq_poll(struct nicvf *nic) 1034{ 1035 struct nicvf_cq_poll *cq_poll; 1036 int qidx; 1037 1038 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) { 1039 cq_poll = nic->napi[qidx]; 1040 if (!cq_poll) 1041 continue; 1042 nic->napi[qidx] = NULL; 1043 kfree(cq_poll); 1044 } 1045} 1046 1047int nicvf_stop(struct net_device *netdev) 1048{ 1049 int irq, qidx; 1050 struct nicvf *nic = netdev_priv(netdev); 1051 struct queue_set *qs = nic->qs; 1052 struct nicvf_cq_poll *cq_poll = NULL; 1053 union nic_mbx mbx = {}; 1054 1055 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN; 1056 nicvf_send_msg_to_pf(nic, &mbx); 1057 1058 netif_carrier_off(netdev); 1059 netif_tx_stop_all_queues(nic->netdev); 1060 nic->link_up = false; 1061 1062 /* Teardown secondary qsets first */ 1063 if (!nic->sqs_mode) { 1064 for (qidx = 0; qidx < nic->sqs_count; qidx++) { 1065 if (!nic->snicvf[qidx]) 1066 continue; 1067 nicvf_stop(nic->snicvf[qidx]->netdev); 1068 nic->snicvf[qidx] = NULL; 1069 } 1070 } 1071 1072 /* Disable RBDR & QS error interrupts */ 1073 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) { 1074 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx); 1075 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx); 1076 } 1077 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0); 1078 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0); 1079 1080 /* Wait for pending IRQ handlers to finish */ 1081 for (irq = 0; irq < nic->num_vec; irq++) 1082 synchronize_irq(nic->msix_entries[irq].vector); 1083 1084 tasklet_kill(&nic->rbdr_task); 1085 tasklet_kill(&nic->qs_err_task); 1086 if (nic->rb_work_scheduled) 1087 cancel_delayed_work_sync(&nic->rbdr_work); 1088 1089 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) { 1090 cq_poll = nic->napi[qidx]; 1091 if (!cq_poll) 1092 continue; 1093 napi_synchronize(&cq_poll->napi); 1094 /* CQ intr is enabled while napi_complete, 1095 * so disable it now 1096 */ 1097 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx); 1098 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx); 1099 napi_disable(&cq_poll->napi); 1100 netif_napi_del(&cq_poll->napi); 1101 } 1102 1103 netif_tx_disable(netdev); 1104 1105 /* Free resources */ 1106 nicvf_config_data_transfer(nic, false); 1107 1108 /* Disable HW Qset */ 1109 nicvf_qset_config(nic, false); 1110 1111 /* disable mailbox interrupt */ 1112 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0); 1113 1114 nicvf_unregister_interrupts(nic); 1115 1116 nicvf_free_cq_poll(nic); 1117 1118 /* Clear multiqset info */ 1119 nic->pnicvf = nic; 1120 nic->sqs_count = 0; 1121 1122 return 0; 1123} 1124 1125int nicvf_open(struct net_device *netdev) 1126{ 1127 int err, qidx; 1128 struct nicvf *nic = netdev_priv(netdev); 1129 struct queue_set *qs = nic->qs; 1130 struct nicvf_cq_poll *cq_poll = NULL; 1131 1132 nic->mtu = netdev->mtu; 1133 1134 netif_carrier_off(netdev); 1135 1136 err = nicvf_register_misc_interrupt(nic); 1137 if (err) 1138 return err; 1139 1140 /* Register NAPI handler for processing CQEs */ 1141 for (qidx = 0; qidx < qs->cq_cnt; qidx++) { 1142 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL); 1143 if (!cq_poll) { 1144 err = -ENOMEM; 1145 goto napi_del; 1146 } 1147 cq_poll->cq_idx = qidx; 1148 cq_poll->nicvf = nic; 1149 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll, 1150 NAPI_POLL_WEIGHT); 1151 napi_enable(&cq_poll->napi); 1152 nic->napi[qidx] = cq_poll; 1153 } 1154 1155 /* Check if we got MAC address from PF or else generate a radom MAC */ 1156 if (is_zero_ether_addr(netdev->dev_addr)) { 1157 eth_hw_addr_random(netdev); 1158 nicvf_hw_set_mac_addr(nic, netdev); 1159 } 1160 1161 if (nic->set_mac_pending) { 1162 nic->set_mac_pending = false; 1163 nicvf_hw_set_mac_addr(nic, netdev); 1164 } 1165 1166 /* Init tasklet for handling Qset err interrupt */ 1167 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err, 1168 (unsigned long)nic); 1169 1170 /* Init RBDR tasklet which will refill RBDR */ 1171 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task, 1172 (unsigned long)nic); 1173 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work); 1174 1175 /* Configure CPI alorithm */ 1176 nic->cpi_alg = cpi_alg; 1177 if (!nic->sqs_mode) 1178 nicvf_config_cpi(nic); 1179 1180 nicvf_request_sqs(nic); 1181 if (nic->sqs_mode) 1182 nicvf_get_primary_vf_struct(nic); 1183 1184 /* Configure receive side scaling */ 1185 if (!nic->sqs_mode) 1186 nicvf_rss_init(nic); 1187 1188 err = nicvf_register_interrupts(nic); 1189 if (err) 1190 goto cleanup; 1191 1192 /* Initialize the queues */ 1193 err = nicvf_init_resources(nic); 1194 if (err) 1195 goto cleanup; 1196 1197 /* Make sure queue initialization is written */ 1198 wmb(); 1199 1200 nicvf_reg_write(nic, NIC_VF_INT, -1); 1201 /* Enable Qset err interrupt */ 1202 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0); 1203 1204 /* Enable completion queue interrupt */ 1205 for (qidx = 0; qidx < qs->cq_cnt; qidx++) 1206 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx); 1207 1208 /* Enable RBDR threshold interrupt */ 1209 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) 1210 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx); 1211 1212 nic->drv_stats.txq_stop = 0; 1213 nic->drv_stats.txq_wake = 0; 1214 1215 return 0; 1216cleanup: 1217 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0); 1218 nicvf_unregister_interrupts(nic); 1219 tasklet_kill(&nic->qs_err_task); 1220 tasklet_kill(&nic->rbdr_task); 1221napi_del: 1222 for (qidx = 0; qidx < qs->cq_cnt; qidx++) { 1223 cq_poll = nic->napi[qidx]; 1224 if (!cq_poll) 1225 continue; 1226 napi_disable(&cq_poll->napi); 1227 netif_napi_del(&cq_poll->napi); 1228 } 1229 nicvf_free_cq_poll(nic); 1230 return err; 1231} 1232 1233static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu) 1234{ 1235 union nic_mbx mbx = {}; 1236 1237 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS; 1238 mbx.frs.max_frs = mtu; 1239 mbx.frs.vf_id = nic->vf_id; 1240 1241 return nicvf_send_msg_to_pf(nic, &mbx); 1242} 1243 1244static int nicvf_change_mtu(struct net_device *netdev, int new_mtu) 1245{ 1246 struct nicvf *nic = netdev_priv(netdev); 1247 1248 if (new_mtu > NIC_HW_MAX_FRS) 1249 return -EINVAL; 1250 1251 if (new_mtu < NIC_HW_MIN_FRS) 1252 return -EINVAL; 1253 1254 if (nicvf_update_hw_max_frs(nic, new_mtu)) 1255 return -EINVAL; 1256 netdev->mtu = new_mtu; 1257 nic->mtu = new_mtu; 1258 1259 return 0; 1260} 1261 1262static int nicvf_set_mac_address(struct net_device *netdev, void *p) 1263{ 1264 struct sockaddr *addr = p; 1265 struct nicvf *nic = netdev_priv(netdev); 1266 1267 if (!is_valid_ether_addr(addr->sa_data)) 1268 return -EADDRNOTAVAIL; 1269 1270 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 1271 1272 if (nic->msix_enabled) { 1273 if (nicvf_hw_set_mac_addr(nic, netdev)) 1274 return -EBUSY; 1275 } else { 1276 nic->set_mac_pending = true; 1277 } 1278 1279 return 0; 1280} 1281 1282void nicvf_update_lmac_stats(struct nicvf *nic) 1283{ 1284 int stat = 0; 1285 union nic_mbx mbx = {}; 1286 1287 if (!netif_running(nic->netdev)) 1288 return; 1289 1290 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS; 1291 mbx.bgx_stats.vf_id = nic->vf_id; 1292 /* Rx stats */ 1293 mbx.bgx_stats.rx = 1; 1294 while (stat < BGX_RX_STATS_COUNT) { 1295 mbx.bgx_stats.idx = stat; 1296 if (nicvf_send_msg_to_pf(nic, &mbx)) 1297 return; 1298 stat++; 1299 } 1300 1301 stat = 0; 1302 1303 /* Tx stats */ 1304 mbx.bgx_stats.rx = 0; 1305 while (stat < BGX_TX_STATS_COUNT) { 1306 mbx.bgx_stats.idx = stat; 1307 if (nicvf_send_msg_to_pf(nic, &mbx)) 1308 return; 1309 stat++; 1310 } 1311} 1312 1313void nicvf_update_stats(struct nicvf *nic) 1314{ 1315 int qidx; 1316 struct nicvf_hw_stats *stats = &nic->hw_stats; 1317 struct nicvf_drv_stats *drv_stats = &nic->drv_stats; 1318 struct queue_set *qs = nic->qs; 1319 1320#define GET_RX_STATS(reg) \ 1321 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3)) 1322#define GET_TX_STATS(reg) \ 1323 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3)) 1324 1325 stats->rx_bytes = GET_RX_STATS(RX_OCTS); 1326 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST); 1327 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST); 1328 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST); 1329 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS); 1330 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR); 1331 stats->rx_drop_red = GET_RX_STATS(RX_RED); 1332 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS); 1333 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN); 1334 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS); 1335 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST); 1336 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST); 1337 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST); 1338 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST); 1339 1340 stats->tx_bytes_ok = GET_TX_STATS(TX_OCTS); 1341 stats->tx_ucast_frames_ok = GET_TX_STATS(TX_UCAST); 1342 stats->tx_bcast_frames_ok = GET_TX_STATS(TX_BCAST); 1343 stats->tx_mcast_frames_ok = GET_TX_STATS(TX_MCAST); 1344 stats->tx_drops = GET_TX_STATS(TX_DROP); 1345 1346 drv_stats->tx_frames_ok = stats->tx_ucast_frames_ok + 1347 stats->tx_bcast_frames_ok + 1348 stats->tx_mcast_frames_ok; 1349 drv_stats->rx_drops = stats->rx_drop_red + 1350 stats->rx_drop_overrun; 1351 drv_stats->tx_drops = stats->tx_drops; 1352 1353 /* Update RQ and SQ stats */ 1354 for (qidx = 0; qidx < qs->rq_cnt; qidx++) 1355 nicvf_update_rq_stats(nic, qidx); 1356 for (qidx = 0; qidx < qs->sq_cnt; qidx++) 1357 nicvf_update_sq_stats(nic, qidx); 1358} 1359 1360static struct rtnl_link_stats64 *nicvf_get_stats64(struct net_device *netdev, 1361 struct rtnl_link_stats64 *stats) 1362{ 1363 struct nicvf *nic = netdev_priv(netdev); 1364 struct nicvf_hw_stats *hw_stats = &nic->hw_stats; 1365 struct nicvf_drv_stats *drv_stats = &nic->drv_stats; 1366 1367 nicvf_update_stats(nic); 1368 1369 stats->rx_bytes = hw_stats->rx_bytes; 1370 stats->rx_packets = drv_stats->rx_frames_ok; 1371 stats->rx_dropped = drv_stats->rx_drops; 1372 stats->multicast = hw_stats->rx_mcast_frames; 1373 1374 stats->tx_bytes = hw_stats->tx_bytes_ok; 1375 stats->tx_packets = drv_stats->tx_frames_ok; 1376 stats->tx_dropped = drv_stats->tx_drops; 1377 1378 return stats; 1379} 1380 1381static void nicvf_tx_timeout(struct net_device *dev) 1382{ 1383 struct nicvf *nic = netdev_priv(dev); 1384 1385 if (netif_msg_tx_err(nic)) 1386 netdev_warn(dev, "%s: Transmit timed out, resetting\n", 1387 dev->name); 1388 1389 schedule_work(&nic->reset_task); 1390} 1391 1392static void nicvf_reset_task(struct work_struct *work) 1393{ 1394 struct nicvf *nic; 1395 1396 nic = container_of(work, struct nicvf, reset_task); 1397 1398 if (!netif_running(nic->netdev)) 1399 return; 1400 1401 nicvf_stop(nic->netdev); 1402 nicvf_open(nic->netdev); 1403 nic->netdev->trans_start = jiffies; 1404} 1405 1406static int nicvf_config_loopback(struct nicvf *nic, 1407 netdev_features_t features) 1408{ 1409 union nic_mbx mbx = {}; 1410 1411 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK; 1412 mbx.lbk.vf_id = nic->vf_id; 1413 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0; 1414 1415 return nicvf_send_msg_to_pf(nic, &mbx); 1416} 1417 1418static netdev_features_t nicvf_fix_features(struct net_device *netdev, 1419 netdev_features_t features) 1420{ 1421 struct nicvf *nic = netdev_priv(netdev); 1422 1423 if ((features & NETIF_F_LOOPBACK) && 1424 netif_running(netdev) && !nic->loopback_supported) 1425 features &= ~NETIF_F_LOOPBACK; 1426 1427 return features; 1428} 1429 1430static int nicvf_set_features(struct net_device *netdev, 1431 netdev_features_t features) 1432{ 1433 struct nicvf *nic = netdev_priv(netdev); 1434 netdev_features_t changed = features ^ netdev->features; 1435 1436 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 1437 nicvf_config_vlan_stripping(nic, features); 1438 1439 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev)) 1440 return nicvf_config_loopback(nic, features); 1441 1442 return 0; 1443} 1444 1445static const struct net_device_ops nicvf_netdev_ops = { 1446 .ndo_open = nicvf_open, 1447 .ndo_stop = nicvf_stop, 1448 .ndo_start_xmit = nicvf_xmit, 1449 .ndo_change_mtu = nicvf_change_mtu, 1450 .ndo_set_mac_address = nicvf_set_mac_address, 1451 .ndo_get_stats64 = nicvf_get_stats64, 1452 .ndo_tx_timeout = nicvf_tx_timeout, 1453 .ndo_fix_features = nicvf_fix_features, 1454 .ndo_set_features = nicvf_set_features, 1455}; 1456 1457static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1458{ 1459 struct device *dev = &pdev->dev; 1460 struct net_device *netdev; 1461 struct nicvf *nic; 1462 int err, qcount; 1463 1464 err = pci_enable_device(pdev); 1465 if (err) { 1466 dev_err(dev, "Failed to enable PCI device\n"); 1467 return err; 1468 } 1469 1470 err = pci_request_regions(pdev, DRV_NAME); 1471 if (err) { 1472 dev_err(dev, "PCI request regions failed 0x%x\n", err); 1473 goto err_disable_device; 1474 } 1475 1476 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48)); 1477 if (err) { 1478 dev_err(dev, "Unable to get usable DMA configuration\n"); 1479 goto err_release_regions; 1480 } 1481 1482 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); 1483 if (err) { 1484 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n"); 1485 goto err_release_regions; 1486 } 1487 1488 qcount = MAX_CMP_QUEUES_PER_QS; 1489 1490 /* Restrict multiqset support only for host bound VFs */ 1491 if (pdev->is_virtfn) { 1492 /* Set max number of queues per VF */ 1493 qcount = roundup(num_online_cpus(), MAX_CMP_QUEUES_PER_QS); 1494 qcount = min(qcount, 1495 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS); 1496 } 1497 1498 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount); 1499 if (!netdev) { 1500 err = -ENOMEM; 1501 goto err_release_regions; 1502 } 1503 1504 pci_set_drvdata(pdev, netdev); 1505 1506 SET_NETDEV_DEV(netdev, &pdev->dev); 1507 1508 nic = netdev_priv(netdev); 1509 nic->netdev = netdev; 1510 nic->pdev = pdev; 1511 nic->pnicvf = nic; 1512 nic->max_queues = qcount; 1513 1514 /* MAP VF's configuration registers */ 1515 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); 1516 if (!nic->reg_base) { 1517 dev_err(dev, "Cannot map config register space, aborting\n"); 1518 err = -ENOMEM; 1519 goto err_free_netdev; 1520 } 1521 1522 err = nicvf_set_qset_resources(nic); 1523 if (err) 1524 goto err_free_netdev; 1525 1526 /* Check if PF is alive and get MAC address for this VF */ 1527 err = nicvf_register_misc_interrupt(nic); 1528 if (err) 1529 goto err_free_netdev; 1530 1531 nicvf_send_vf_struct(nic); 1532 1533 /* Check if this VF is in QS only mode */ 1534 if (nic->sqs_mode) 1535 return 0; 1536 1537 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues); 1538 if (err) 1539 goto err_unregister_interrupts; 1540 1541 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG | 1542 NETIF_F_TSO | NETIF_F_GRO | 1543 NETIF_F_HW_VLAN_CTAG_RX); 1544 1545 netdev->hw_features |= NETIF_F_RXHASH; 1546 1547 netdev->features |= netdev->hw_features; 1548 netdev->hw_features |= NETIF_F_LOOPBACK; 1549 1550 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO; 1551 1552 netdev->netdev_ops = &nicvf_netdev_ops; 1553 netdev->watchdog_timeo = NICVF_TX_TIMEOUT; 1554 1555 INIT_WORK(&nic->reset_task, nicvf_reset_task); 1556 1557 err = register_netdev(netdev); 1558 if (err) { 1559 dev_err(dev, "Failed to register netdevice\n"); 1560 goto err_unregister_interrupts; 1561 } 1562 1563 nic->msg_enable = debug; 1564 1565 nicvf_set_ethtool_ops(netdev); 1566 1567 return 0; 1568 1569err_unregister_interrupts: 1570 nicvf_unregister_interrupts(nic); 1571err_free_netdev: 1572 pci_set_drvdata(pdev, NULL); 1573 free_netdev(netdev); 1574err_release_regions: 1575 pci_release_regions(pdev); 1576err_disable_device: 1577 pci_disable_device(pdev); 1578 return err; 1579} 1580 1581static void nicvf_remove(struct pci_dev *pdev) 1582{ 1583 struct net_device *netdev = pci_get_drvdata(pdev); 1584 struct nicvf *nic; 1585 struct net_device *pnetdev; 1586 1587 if (!netdev) 1588 return; 1589 1590 nic = netdev_priv(netdev); 1591 pnetdev = nic->pnicvf->netdev; 1592 1593 /* Check if this Qset is assigned to different VF. 1594 * If yes, clean primary and all secondary Qsets. 1595 */ 1596 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED)) 1597 unregister_netdev(pnetdev); 1598 nicvf_unregister_interrupts(nic); 1599 pci_set_drvdata(pdev, NULL); 1600 free_netdev(netdev); 1601 pci_release_regions(pdev); 1602 pci_disable_device(pdev); 1603} 1604 1605static void nicvf_shutdown(struct pci_dev *pdev) 1606{ 1607 nicvf_remove(pdev); 1608} 1609 1610static struct pci_driver nicvf_driver = { 1611 .name = DRV_NAME, 1612 .id_table = nicvf_id_table, 1613 .probe = nicvf_probe, 1614 .remove = nicvf_remove, 1615 .shutdown = nicvf_shutdown, 1616}; 1617 1618static int __init nicvf_init_module(void) 1619{ 1620 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION); 1621 1622 return pci_register_driver(&nicvf_driver); 1623} 1624 1625static void __exit nicvf_cleanup_module(void) 1626{ 1627 pci_unregister_driver(&nicvf_driver); 1628} 1629 1630module_init(nicvf_init_module); 1631module_exit(nicvf_cleanup_module); 1632