1/* net/dsa/mv88e6171.c - Marvell 88e6171 switch chip support
2 * Copyright (c) 2008-2009 Marvell Semiconductor
3 * Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#include <linux/delay.h>
12#include <linux/jiffies.h>
13#include <linux/list.h>
14#include <linux/module.h>
15#include <linux/netdevice.h>
16#include <linux/phy.h>
17#include <net/dsa.h>
18#include "mv88e6xxx.h"
19
20static const struct mv88e6xxx_switch_id mv88e6171_table[] = {
21	{ PORT_SWITCH_ID_6171, "Marvell 88E6171" },
22	{ PORT_SWITCH_ID_6175, "Marvell 88E6175" },
23	{ PORT_SWITCH_ID_6350, "Marvell 88E6350" },
24	{ PORT_SWITCH_ID_6351, "Marvell 88E6351" },
25};
26
27static char *mv88e6171_probe(struct device *host_dev, int sw_addr)
28{
29	return mv88e6xxx_lookup_name(host_dev, sw_addr, mv88e6171_table,
30				     ARRAY_SIZE(mv88e6171_table));
31}
32
33static int mv88e6171_setup_global(struct dsa_switch *ds)
34{
35	u32 upstream_port = dsa_upstream_port(ds);
36	int ret;
37	u32 reg;
38
39	ret = mv88e6xxx_setup_global(ds);
40	if (ret)
41		return ret;
42
43	/* Discard packets with excessive collisions, mask all
44	 * interrupt sources, enable PPU.
45	 */
46	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
47		  GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);
48
49	/* Configure the upstream port, and configure the upstream
50	 * port as the port to which ingress and egress monitor frames
51	 * are to be sent.
52	 */
53	reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
54		upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
55		upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT |
56		upstream_port << GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT;
57	REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
58
59	/* Disable remote management for now, and set the switch's
60	 * DSA device number.
61	 */
62	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f);
63
64	return 0;
65}
66
67static int mv88e6171_setup(struct dsa_switch *ds)
68{
69	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
70	int ret;
71
72	ret = mv88e6xxx_setup_common(ds);
73	if (ret < 0)
74		return ret;
75
76	ps->num_ports = 7;
77
78	ret = mv88e6xxx_switch_reset(ds, true);
79	if (ret < 0)
80		return ret;
81
82	ret = mv88e6171_setup_global(ds);
83	if (ret < 0)
84		return ret;
85
86	return mv88e6xxx_setup_ports(ds);
87}
88
89struct dsa_switch_driver mv88e6171_switch_driver = {
90	.tag_protocol		= DSA_TAG_PROTO_EDSA,
91	.priv_size		= sizeof(struct mv88e6xxx_priv_state),
92	.probe			= mv88e6171_probe,
93	.setup			= mv88e6171_setup,
94	.set_addr		= mv88e6xxx_set_addr_indirect,
95	.phy_read		= mv88e6xxx_phy_read_indirect,
96	.phy_write		= mv88e6xxx_phy_write_indirect,
97	.get_strings		= mv88e6xxx_get_strings,
98	.get_ethtool_stats	= mv88e6xxx_get_ethtool_stats,
99	.get_sset_count		= mv88e6xxx_get_sset_count,
100	.adjust_link		= mv88e6xxx_adjust_link,
101#ifdef CONFIG_NET_DSA_HWMON
102	.get_temp               = mv88e6xxx_get_temp,
103#endif
104	.get_regs_len		= mv88e6xxx_get_regs_len,
105	.get_regs		= mv88e6xxx_get_regs,
106	.port_join_bridge	= mv88e6xxx_port_bridge_join,
107	.port_leave_bridge	= mv88e6xxx_port_bridge_leave,
108	.port_stp_update        = mv88e6xxx_port_stp_update,
109	.port_pvid_get		= mv88e6xxx_port_pvid_get,
110	.port_vlan_prepare	= mv88e6xxx_port_vlan_prepare,
111	.port_vlan_add		= mv88e6xxx_port_vlan_add,
112	.port_vlan_del		= mv88e6xxx_port_vlan_del,
113	.vlan_getnext		= mv88e6xxx_vlan_getnext,
114	.port_fdb_prepare	= mv88e6xxx_port_fdb_prepare,
115	.port_fdb_add		= mv88e6xxx_port_fdb_add,
116	.port_fdb_del		= mv88e6xxx_port_fdb_del,
117	.port_fdb_dump		= mv88e6xxx_port_fdb_dump,
118};
119
120MODULE_ALIAS("platform:mv88e6171");
121MODULE_ALIAS("platform:mv88e6175");
122MODULE_ALIAS("platform:mv88e6350");
123MODULE_ALIAS("platform:mv88e6351");
124