1/*
2 * Copyright (c) 2014, Sony Mobile Communications AB.
3 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
4 * Author: Bjorn Andersson <bjorn.andersson@sonymobile.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/of_platform.h>
19#include <linux/io.h>
20#include <linux/interrupt.h>
21#include <linux/mfd/qcom_rpm.h>
22#include <linux/mfd/syscon.h>
23#include <linux/regmap.h>
24
25#include <dt-bindings/mfd/qcom-rpm.h>
26
27struct qcom_rpm_resource {
28	unsigned target_id;
29	unsigned status_id;
30	unsigned select_id;
31	unsigned size;
32};
33
34struct qcom_rpm_data {
35	u32 version;
36	const struct qcom_rpm_resource *resource_table;
37	unsigned n_resources;
38};
39
40struct qcom_rpm {
41	struct device *dev;
42	struct regmap *ipc_regmap;
43	unsigned ipc_offset;
44	unsigned ipc_bit;
45
46	struct completion ack;
47	struct mutex lock;
48
49	void __iomem *status_regs;
50	void __iomem *ctrl_regs;
51	void __iomem *req_regs;
52
53	u32 ack_status;
54
55	const struct qcom_rpm_data *data;
56};
57
58#define RPM_STATUS_REG(rpm, i)	((rpm)->status_regs + (i) * 4)
59#define RPM_CTRL_REG(rpm, i)	((rpm)->ctrl_regs + (i) * 4)
60#define RPM_REQ_REG(rpm, i)	((rpm)->req_regs + (i) * 4)
61
62#define RPM_REQUEST_TIMEOUT	(5 * HZ)
63
64#define RPM_REQUEST_CONTEXT	3
65#define RPM_REQ_SELECT		11
66#define RPM_ACK_CONTEXT		15
67#define RPM_ACK_SELECTOR	23
68#define RPM_SELECT_SIZE		7
69
70#define RPM_NOTIFICATION	BIT(30)
71#define RPM_REJECTED		BIT(31)
72
73#define RPM_SIGNAL		BIT(2)
74
75static const struct qcom_rpm_resource apq8064_rpm_resource_table[] = {
76	[QCOM_RPM_CXO_CLK] =			{ 25, 9, 5, 1 },
77	[QCOM_RPM_PXO_CLK] =			{ 26, 10, 6, 1 },
78	[QCOM_RPM_APPS_FABRIC_CLK] =		{ 27, 11, 8, 1 },
79	[QCOM_RPM_SYS_FABRIC_CLK] =		{ 28, 12, 9, 1 },
80	[QCOM_RPM_MM_FABRIC_CLK] =		{ 29, 13, 10, 1 },
81	[QCOM_RPM_DAYTONA_FABRIC_CLK] =		{ 30, 14, 11, 1 },
82	[QCOM_RPM_SFPB_CLK] =			{ 31, 15, 12, 1 },
83	[QCOM_RPM_CFPB_CLK] =			{ 32, 16, 13, 1 },
84	[QCOM_RPM_MMFPB_CLK] =			{ 33, 17, 14, 1 },
85	[QCOM_RPM_EBI1_CLK] =			{ 34, 18, 16, 1 },
86	[QCOM_RPM_APPS_FABRIC_HALT] =		{ 35, 19, 18, 1 },
87	[QCOM_RPM_APPS_FABRIC_MODE] =		{ 37, 20, 19, 1 },
88	[QCOM_RPM_APPS_FABRIC_IOCTL] =		{ 40, 21, 20, 1 },
89	[QCOM_RPM_APPS_FABRIC_ARB] =		{ 41, 22, 21, 12 },
90	[QCOM_RPM_SYS_FABRIC_HALT] =		{ 53, 23, 22, 1 },
91	[QCOM_RPM_SYS_FABRIC_MODE] =		{ 55, 24, 23, 1 },
92	[QCOM_RPM_SYS_FABRIC_IOCTL] =		{ 58, 25, 24, 1 },
93	[QCOM_RPM_SYS_FABRIC_ARB] =		{ 59, 26, 25, 30 },
94	[QCOM_RPM_MM_FABRIC_HALT] =		{ 89, 27, 26, 1 },
95	[QCOM_RPM_MM_FABRIC_MODE] =		{ 91, 28, 27, 1 },
96	[QCOM_RPM_MM_FABRIC_IOCTL] =		{ 94, 29, 28, 1 },
97	[QCOM_RPM_MM_FABRIC_ARB] =		{ 95, 30, 29, 21 },
98	[QCOM_RPM_PM8921_SMPS1] =		{ 116, 31, 30, 2 },
99	[QCOM_RPM_PM8921_SMPS2] =		{ 118, 33, 31, 2 },
100	[QCOM_RPM_PM8921_SMPS3] =		{ 120, 35, 32, 2 },
101	[QCOM_RPM_PM8921_SMPS4] =		{ 122, 37, 33, 2 },
102	[QCOM_RPM_PM8921_SMPS5] =		{ 124, 39, 34, 2 },
103	[QCOM_RPM_PM8921_SMPS6] =		{ 126, 41, 35, 2 },
104	[QCOM_RPM_PM8921_SMPS7] =		{ 128, 43, 36, 2 },
105	[QCOM_RPM_PM8921_SMPS8] =		{ 130, 45, 37, 2 },
106	[QCOM_RPM_PM8921_LDO1] =		{ 132, 47, 38, 2 },
107	[QCOM_RPM_PM8921_LDO2] =		{ 134, 49, 39, 2 },
108	[QCOM_RPM_PM8921_LDO3] =		{ 136, 51, 40, 2 },
109	[QCOM_RPM_PM8921_LDO4] =		{ 138, 53, 41, 2 },
110	[QCOM_RPM_PM8921_LDO5] =		{ 140, 55, 42, 2 },
111	[QCOM_RPM_PM8921_LDO6] =		{ 142, 57, 43, 2 },
112	[QCOM_RPM_PM8921_LDO7] =		{ 144, 59, 44, 2 },
113	[QCOM_RPM_PM8921_LDO8] =		{ 146, 61, 45, 2 },
114	[QCOM_RPM_PM8921_LDO9] =		{ 148, 63, 46, 2 },
115	[QCOM_RPM_PM8921_LDO10] =		{ 150, 65, 47, 2 },
116	[QCOM_RPM_PM8921_LDO11] =		{ 152, 67, 48, 2 },
117	[QCOM_RPM_PM8921_LDO12] =		{ 154, 69, 49, 2 },
118	[QCOM_RPM_PM8921_LDO13] =		{ 156, 71, 50, 2 },
119	[QCOM_RPM_PM8921_LDO14] =		{ 158, 73, 51, 2 },
120	[QCOM_RPM_PM8921_LDO15] =		{ 160, 75, 52, 2 },
121	[QCOM_RPM_PM8921_LDO16] =		{ 162, 77, 53, 2 },
122	[QCOM_RPM_PM8921_LDO17] =		{ 164, 79, 54, 2 },
123	[QCOM_RPM_PM8921_LDO18] =		{ 166, 81, 55, 2 },
124	[QCOM_RPM_PM8921_LDO19] =		{ 168, 83, 56, 2 },
125	[QCOM_RPM_PM8921_LDO20] =		{ 170, 85, 57, 2 },
126	[QCOM_RPM_PM8921_LDO21] =		{ 172, 87, 58, 2 },
127	[QCOM_RPM_PM8921_LDO22] =		{ 174, 89, 59, 2 },
128	[QCOM_RPM_PM8921_LDO23] =		{ 176, 91, 60, 2 },
129	[QCOM_RPM_PM8921_LDO24] =		{ 178, 93, 61, 2 },
130	[QCOM_RPM_PM8921_LDO25] =		{ 180, 95, 62, 2 },
131	[QCOM_RPM_PM8921_LDO26] =		{ 182, 97, 63, 2 },
132	[QCOM_RPM_PM8921_LDO27] =		{ 184, 99, 64, 2 },
133	[QCOM_RPM_PM8921_LDO28] =		{ 186, 101, 65, 2 },
134	[QCOM_RPM_PM8921_LDO29] =		{ 188, 103, 66, 2 },
135	[QCOM_RPM_PM8921_CLK1] =		{ 190, 105, 67, 2 },
136	[QCOM_RPM_PM8921_CLK2] =		{ 192, 107, 68, 2 },
137	[QCOM_RPM_PM8921_LVS1] =		{ 194, 109, 69, 1 },
138	[QCOM_RPM_PM8921_LVS2] =		{ 195, 110, 70, 1 },
139	[QCOM_RPM_PM8921_LVS3] =		{ 196, 111, 71, 1 },
140	[QCOM_RPM_PM8921_LVS4] =		{ 197, 112, 72, 1 },
141	[QCOM_RPM_PM8921_LVS5] =		{ 198, 113, 73, 1 },
142	[QCOM_RPM_PM8921_LVS6] =		{ 199, 114, 74, 1 },
143	[QCOM_RPM_PM8921_LVS7] =		{ 200, 115, 75, 1 },
144	[QCOM_RPM_PM8821_SMPS1] =		{ 201, 116, 76, 2 },
145	[QCOM_RPM_PM8821_SMPS2] =		{ 203, 118, 77, 2 },
146	[QCOM_RPM_PM8821_LDO1] =		{ 205, 120, 78, 2 },
147	[QCOM_RPM_PM8921_NCP] =			{ 207, 122, 80, 2 },
148	[QCOM_RPM_CXO_BUFFERS] =		{ 209, 124, 81, 1 },
149	[QCOM_RPM_USB_OTG_SWITCH] =		{ 210, 125, 82, 1 },
150	[QCOM_RPM_HDMI_SWITCH] =		{ 211, 126, 83, 1 },
151	[QCOM_RPM_DDR_DMM] =			{ 212, 127, 84, 2 },
152	[QCOM_RPM_QDSS_CLK] =			{ 214, ~0, 7, 1 },
153	[QCOM_RPM_VDDMIN_GPIO] =		{ 215, 131, 89, 1 },
154};
155
156static const struct qcom_rpm_data apq8064_template = {
157	.version = 3,
158	.resource_table = apq8064_rpm_resource_table,
159	.n_resources = ARRAY_SIZE(apq8064_rpm_resource_table),
160};
161
162static const struct qcom_rpm_resource msm8660_rpm_resource_table[] = {
163	[QCOM_RPM_CXO_CLK] =			{ 32, 12, 5, 1 },
164	[QCOM_RPM_PXO_CLK] =			{ 33, 13, 6, 1 },
165	[QCOM_RPM_PLL_4] =			{ 34, 14, 7, 1 },
166	[QCOM_RPM_APPS_FABRIC_CLK] =		{ 35, 15, 8, 1 },
167	[QCOM_RPM_SYS_FABRIC_CLK] =		{ 36, 16, 9, 1 },
168	[QCOM_RPM_MM_FABRIC_CLK] =		{ 37, 17, 10, 1 },
169	[QCOM_RPM_DAYTONA_FABRIC_CLK] =		{ 38, 18, 11, 1 },
170	[QCOM_RPM_SFPB_CLK] =			{ 39, 19, 12, 1 },
171	[QCOM_RPM_CFPB_CLK] =			{ 40, 20, 13, 1 },
172	[QCOM_RPM_MMFPB_CLK] =			{ 41, 21, 14, 1 },
173	[QCOM_RPM_SMI_CLK] =			{ 42, 22, 15, 1 },
174	[QCOM_RPM_EBI1_CLK] =			{ 43, 23, 16, 1 },
175	[QCOM_RPM_APPS_L2_CACHE_CTL] =		{ 44, 24, 17, 1 },
176	[QCOM_RPM_APPS_FABRIC_HALT] =		{ 45, 25, 18, 2 },
177	[QCOM_RPM_APPS_FABRIC_MODE] =		{ 47, 26, 19, 3 },
178	[QCOM_RPM_APPS_FABRIC_ARB] =		{ 51, 28, 21, 6 },
179	[QCOM_RPM_SYS_FABRIC_HALT] =		{ 63, 29, 22, 2 },
180	[QCOM_RPM_SYS_FABRIC_MODE] =		{ 65, 30, 23, 3 },
181	[QCOM_RPM_SYS_FABRIC_ARB] =		{ 69, 32, 25, 22 },
182	[QCOM_RPM_MM_FABRIC_HALT] =		{ 105, 33, 26, 2 },
183	[QCOM_RPM_MM_FABRIC_MODE] =		{ 107, 34, 27, 3 },
184	[QCOM_RPM_MM_FABRIC_ARB] =		{ 111, 36, 29, 23 },
185	[QCOM_RPM_PM8901_SMPS0] =		{ 134, 37, 30, 2 },
186	[QCOM_RPM_PM8901_SMPS1] =		{ 136, 39, 31, 2 },
187	[QCOM_RPM_PM8901_SMPS2] =		{ 138, 41, 32, 2 },
188	[QCOM_RPM_PM8901_SMPS3] =		{ 140, 43, 33, 2 },
189	[QCOM_RPM_PM8901_SMPS4] =		{ 142, 45, 34, 2 },
190	[QCOM_RPM_PM8901_LDO0] =		{ 144, 47, 35, 2 },
191	[QCOM_RPM_PM8901_LDO1] =		{ 146, 49, 36, 2 },
192	[QCOM_RPM_PM8901_LDO2] =		{ 148, 51, 37, 2 },
193	[QCOM_RPM_PM8901_LDO3] =		{ 150, 53, 38, 2 },
194	[QCOM_RPM_PM8901_LDO4] =		{ 152, 55, 39, 2 },
195	[QCOM_RPM_PM8901_LDO5] =		{ 154, 57, 40, 2 },
196	[QCOM_RPM_PM8901_LDO6] =		{ 156, 59, 41, 2 },
197	[QCOM_RPM_PM8901_LVS0] =		{ 158, 61, 42, 1 },
198	[QCOM_RPM_PM8901_LVS1] =		{ 159, 62, 43, 1 },
199	[QCOM_RPM_PM8901_LVS2] =		{ 160, 63, 44, 1 },
200	[QCOM_RPM_PM8901_LVS3] =		{ 161, 64, 45, 1 },
201	[QCOM_RPM_PM8901_MVS] =			{ 162, 65, 46, 1 },
202	[QCOM_RPM_PM8058_SMPS0] =		{ 163, 66, 47, 2 },
203	[QCOM_RPM_PM8058_SMPS1] =		{ 165, 68, 48, 2 },
204	[QCOM_RPM_PM8058_SMPS2] =		{ 167, 70, 49, 2 },
205	[QCOM_RPM_PM8058_SMPS3] =		{ 169, 72, 50, 2 },
206	[QCOM_RPM_PM8058_SMPS4] =		{ 171, 74, 51, 2 },
207	[QCOM_RPM_PM8058_LDO0] =		{ 173, 76, 52, 2 },
208	[QCOM_RPM_PM8058_LDO1] =		{ 175, 78, 53, 2 },
209	[QCOM_RPM_PM8058_LDO2] =		{ 177, 80, 54, 2 },
210	[QCOM_RPM_PM8058_LDO3] =		{ 179, 82, 55, 2 },
211	[QCOM_RPM_PM8058_LDO4] =		{ 181, 84, 56, 2 },
212	[QCOM_RPM_PM8058_LDO5] =		{ 183, 86, 57, 2 },
213	[QCOM_RPM_PM8058_LDO6] =		{ 185, 88, 58, 2 },
214	[QCOM_RPM_PM8058_LDO7] =		{ 187, 90, 59, 2 },
215	[QCOM_RPM_PM8058_LDO8] =		{ 189, 92, 60, 2 },
216	[QCOM_RPM_PM8058_LDO9] =		{ 191, 94, 61, 2 },
217	[QCOM_RPM_PM8058_LDO10] =		{ 193, 96, 62, 2 },
218	[QCOM_RPM_PM8058_LDO11] =		{ 195, 98, 63, 2 },
219	[QCOM_RPM_PM8058_LDO12] =		{ 197, 100, 64, 2 },
220	[QCOM_RPM_PM8058_LDO13] =		{ 199, 102, 65, 2 },
221	[QCOM_RPM_PM8058_LDO14] =		{ 201, 104, 66, 2 },
222	[QCOM_RPM_PM8058_LDO15] =		{ 203, 106, 67, 2 },
223	[QCOM_RPM_PM8058_LDO16] =		{ 205, 108, 68, 2 },
224	[QCOM_RPM_PM8058_LDO17] =		{ 207, 110, 69, 2 },
225	[QCOM_RPM_PM8058_LDO18] =		{ 209, 112, 70, 2 },
226	[QCOM_RPM_PM8058_LDO19] =		{ 211, 114, 71, 2 },
227	[QCOM_RPM_PM8058_LDO20] =		{ 213, 116, 72, 2 },
228	[QCOM_RPM_PM8058_LDO21] =		{ 215, 118, 73, 2 },
229	[QCOM_RPM_PM8058_LDO22] =		{ 217, 120, 74, 2 },
230	[QCOM_RPM_PM8058_LDO23] =		{ 219, 122, 75, 2 },
231	[QCOM_RPM_PM8058_LDO24] =		{ 221, 124, 76, 2 },
232	[QCOM_RPM_PM8058_LDO25] =		{ 223, 126, 77, 2 },
233	[QCOM_RPM_PM8058_LVS0] =		{ 225, 128, 78, 1 },
234	[QCOM_RPM_PM8058_LVS1] =		{ 226, 129, 79, 1 },
235	[QCOM_RPM_PM8058_NCP] =			{ 227, 130, 80, 2 },
236	[QCOM_RPM_CXO_BUFFERS] =		{ 229, 132, 81, 1 },
237};
238
239static const struct qcom_rpm_data msm8660_template = {
240	.version = 2,
241	.resource_table = msm8660_rpm_resource_table,
242	.n_resources = ARRAY_SIZE(msm8660_rpm_resource_table),
243};
244
245static const struct qcom_rpm_resource msm8960_rpm_resource_table[] = {
246	[QCOM_RPM_CXO_CLK] =			{ 25, 9, 5, 1 },
247	[QCOM_RPM_PXO_CLK] =			{ 26, 10, 6, 1 },
248	[QCOM_RPM_APPS_FABRIC_CLK] =		{ 27, 11, 8, 1 },
249	[QCOM_RPM_SYS_FABRIC_CLK] =		{ 28, 12, 9, 1 },
250	[QCOM_RPM_MM_FABRIC_CLK] =		{ 29, 13, 10, 1 },
251	[QCOM_RPM_DAYTONA_FABRIC_CLK] =		{ 30, 14, 11, 1 },
252	[QCOM_RPM_SFPB_CLK] =			{ 31, 15, 12, 1 },
253	[QCOM_RPM_CFPB_CLK] =			{ 32, 16, 13, 1 },
254	[QCOM_RPM_MMFPB_CLK] =			{ 33, 17, 14, 1 },
255	[QCOM_RPM_EBI1_CLK] =			{ 34, 18, 16, 1 },
256	[QCOM_RPM_APPS_FABRIC_HALT] =		{ 35, 19, 18, 1 },
257	[QCOM_RPM_APPS_FABRIC_MODE] =		{ 37, 20, 19, 1 },
258	[QCOM_RPM_APPS_FABRIC_IOCTL] =		{ 40, 21, 20, 1 },
259	[QCOM_RPM_APPS_FABRIC_ARB] =		{ 41, 22, 21, 12 },
260	[QCOM_RPM_SYS_FABRIC_HALT] =		{ 53, 23, 22, 1 },
261	[QCOM_RPM_SYS_FABRIC_MODE] =		{ 55, 24, 23, 1 },
262	[QCOM_RPM_SYS_FABRIC_IOCTL] =		{ 58, 25, 24, 1 },
263	[QCOM_RPM_SYS_FABRIC_ARB] =		{ 59, 26, 25, 29 },
264	[QCOM_RPM_MM_FABRIC_HALT] =		{ 88, 27, 26, 1 },
265	[QCOM_RPM_MM_FABRIC_MODE] =		{ 90, 28, 27, 1 },
266	[QCOM_RPM_MM_FABRIC_IOCTL] =		{ 93, 29, 28, 1 },
267	[QCOM_RPM_MM_FABRIC_ARB] =		{ 94, 30, 29, 23 },
268	[QCOM_RPM_PM8921_SMPS1] =		{ 117, 31, 30, 2 },
269	[QCOM_RPM_PM8921_SMPS2] =		{ 119, 33, 31, 2 },
270	[QCOM_RPM_PM8921_SMPS3] =		{ 121, 35, 32, 2 },
271	[QCOM_RPM_PM8921_SMPS4] =		{ 123, 37, 33, 2 },
272	[QCOM_RPM_PM8921_SMPS5] =		{ 125, 39, 34, 2 },
273	[QCOM_RPM_PM8921_SMPS6] =		{ 127, 41, 35, 2 },
274	[QCOM_RPM_PM8921_SMPS7] =		{ 129, 43, 36, 2 },
275	[QCOM_RPM_PM8921_SMPS8] =		{ 131, 45, 37, 2 },
276	[QCOM_RPM_PM8921_LDO1] =		{ 133, 47, 38, 2 },
277	[QCOM_RPM_PM8921_LDO2] =		{ 135, 49, 39, 2 },
278	[QCOM_RPM_PM8921_LDO3] =		{ 137, 51, 40, 2 },
279	[QCOM_RPM_PM8921_LDO4] =		{ 139, 53, 41, 2 },
280	[QCOM_RPM_PM8921_LDO5] =		{ 141, 55, 42, 2 },
281	[QCOM_RPM_PM8921_LDO6] =		{ 143, 57, 43, 2 },
282	[QCOM_RPM_PM8921_LDO7] =		{ 145, 59, 44, 2 },
283	[QCOM_RPM_PM8921_LDO8] =		{ 147, 61, 45, 2 },
284	[QCOM_RPM_PM8921_LDO9] =		{ 149, 63, 46, 2 },
285	[QCOM_RPM_PM8921_LDO10] =		{ 151, 65, 47, 2 },
286	[QCOM_RPM_PM8921_LDO11] =		{ 153, 67, 48, 2 },
287	[QCOM_RPM_PM8921_LDO12] =		{ 155, 69, 49, 2 },
288	[QCOM_RPM_PM8921_LDO13] =		{ 157, 71, 50, 2 },
289	[QCOM_RPM_PM8921_LDO14] =		{ 159, 73, 51, 2 },
290	[QCOM_RPM_PM8921_LDO15] =		{ 161, 75, 52, 2 },
291	[QCOM_RPM_PM8921_LDO16] =		{ 163, 77, 53, 2 },
292	[QCOM_RPM_PM8921_LDO17] =		{ 165, 79, 54, 2 },
293	[QCOM_RPM_PM8921_LDO18] =		{ 167, 81, 55, 2 },
294	[QCOM_RPM_PM8921_LDO19] =		{ 169, 83, 56, 2 },
295	[QCOM_RPM_PM8921_LDO20] =		{ 171, 85, 57, 2 },
296	[QCOM_RPM_PM8921_LDO21] =		{ 173, 87, 58, 2 },
297	[QCOM_RPM_PM8921_LDO22] =		{ 175, 89, 59, 2 },
298	[QCOM_RPM_PM8921_LDO23] =		{ 177, 91, 60, 2 },
299	[QCOM_RPM_PM8921_LDO24] =		{ 179, 93, 61, 2 },
300	[QCOM_RPM_PM8921_LDO25] =		{ 181, 95, 62, 2 },
301	[QCOM_RPM_PM8921_LDO26] =		{ 183, 97, 63, 2 },
302	[QCOM_RPM_PM8921_LDO27] =		{ 185, 99, 64, 2 },
303	[QCOM_RPM_PM8921_LDO28] =		{ 187, 101, 65, 2 },
304	[QCOM_RPM_PM8921_LDO29] =		{ 189, 103, 66, 2 },
305	[QCOM_RPM_PM8921_CLK1] =		{ 191, 105, 67, 2 },
306	[QCOM_RPM_PM8921_CLK2] =		{ 193, 107, 68, 2 },
307	[QCOM_RPM_PM8921_LVS1] =		{ 195, 109, 69, 1 },
308	[QCOM_RPM_PM8921_LVS2] =		{ 196, 110, 70, 1 },
309	[QCOM_RPM_PM8921_LVS3] =		{ 197, 111, 71, 1 },
310	[QCOM_RPM_PM8921_LVS4] =		{ 198, 112, 72, 1 },
311	[QCOM_RPM_PM8921_LVS5] =		{ 199, 113, 73, 1 },
312	[QCOM_RPM_PM8921_LVS6] =		{ 200, 114, 74, 1 },
313	[QCOM_RPM_PM8921_LVS7] =		{ 201, 115, 75, 1 },
314	[QCOM_RPM_PM8921_NCP] =			{ 202, 116, 80, 2 },
315	[QCOM_RPM_CXO_BUFFERS] =		{ 204, 118, 81, 1 },
316	[QCOM_RPM_USB_OTG_SWITCH] =		{ 205, 119, 82, 1 },
317	[QCOM_RPM_HDMI_SWITCH] =		{ 206, 120, 83, 1 },
318	[QCOM_RPM_DDR_DMM] =			{ 207, 121, 84, 2 },
319};
320
321static const struct qcom_rpm_data msm8960_template = {
322	.version = 3,
323	.resource_table = msm8960_rpm_resource_table,
324	.n_resources = ARRAY_SIZE(msm8960_rpm_resource_table),
325};
326
327static const struct qcom_rpm_resource ipq806x_rpm_resource_table[] = {
328	[QCOM_RPM_CXO_CLK] =			{ 25, 9, 5, 1 },
329	[QCOM_RPM_PXO_CLK] =			{ 26, 10, 6, 1 },
330	[QCOM_RPM_APPS_FABRIC_CLK] =		{ 27, 11, 8, 1 },
331	[QCOM_RPM_SYS_FABRIC_CLK] =		{ 28, 12, 9, 1 },
332	[QCOM_RPM_NSS_FABRIC_0_CLK] =		{ 29, 13, 10, 1 },
333	[QCOM_RPM_DAYTONA_FABRIC_CLK] =		{ 30, 14, 11, 1 },
334	[QCOM_RPM_SFPB_CLK] =			{ 31, 15, 12, 1 },
335	[QCOM_RPM_CFPB_CLK] =			{ 32, 16, 13, 1 },
336	[QCOM_RPM_NSS_FABRIC_1_CLK] =		{ 33, 17, 14, 1 },
337	[QCOM_RPM_EBI1_CLK] =			{ 34, 18, 16, 1 },
338	[QCOM_RPM_APPS_FABRIC_HALT] =		{ 35, 19, 18, 2 },
339	[QCOM_RPM_APPS_FABRIC_MODE] =		{ 37, 20, 19, 3 },
340	[QCOM_RPM_APPS_FABRIC_IOCTL] =		{ 40, 21, 20, 1 },
341	[QCOM_RPM_APPS_FABRIC_ARB] =		{ 41, 22, 21, 12 },
342	[QCOM_RPM_SYS_FABRIC_HALT] =		{ 53, 23, 22, 2 },
343	[QCOM_RPM_SYS_FABRIC_MODE] =		{ 55, 24, 23, 3 },
344	[QCOM_RPM_SYS_FABRIC_IOCTL] =		{ 58, 25, 24, 1 },
345	[QCOM_RPM_SYS_FABRIC_ARB] =		{ 59, 26, 25, 30 },
346	[QCOM_RPM_MM_FABRIC_HALT] =		{ 89, 27, 26, 2 },
347	[QCOM_RPM_MM_FABRIC_MODE] =		{ 91, 28, 27, 3 },
348	[QCOM_RPM_MM_FABRIC_IOCTL] =		{ 94, 29, 28, 1 },
349	[QCOM_RPM_MM_FABRIC_ARB] =		{ 95, 30, 29, 2 },
350	[QCOM_RPM_CXO_BUFFERS] =		{ 209, 33, 31, 1 },
351	[QCOM_RPM_USB_OTG_SWITCH] =		{ 210, 34, 32, 1 },
352	[QCOM_RPM_HDMI_SWITCH] =		{ 211, 35, 33, 1 },
353	[QCOM_RPM_DDR_DMM] =			{ 212, 36, 34, 2 },
354	[QCOM_RPM_VDDMIN_GPIO] =		{ 215, 40, 39, 1 },
355	[QCOM_RPM_SMB208_S1a] =			{ 216, 41, 90, 2 },
356	[QCOM_RPM_SMB208_S1b] =			{ 218, 43, 91, 2 },
357	[QCOM_RPM_SMB208_S2a] =			{ 220, 45, 92, 2 },
358	[QCOM_RPM_SMB208_S2b] =			{ 222, 47, 93, 2 },
359};
360
361static const struct qcom_rpm_data ipq806x_template = {
362	.version = 3,
363	.resource_table = ipq806x_rpm_resource_table,
364	.n_resources = ARRAY_SIZE(ipq806x_rpm_resource_table),
365};
366
367static const struct of_device_id qcom_rpm_of_match[] = {
368	{ .compatible = "qcom,rpm-apq8064", .data = &apq8064_template },
369	{ .compatible = "qcom,rpm-msm8660", .data = &msm8660_template },
370	{ .compatible = "qcom,rpm-msm8960", .data = &msm8960_template },
371	{ .compatible = "qcom,rpm-ipq8064", .data = &ipq806x_template },
372	{ }
373};
374MODULE_DEVICE_TABLE(of, qcom_rpm_of_match);
375
376int qcom_rpm_write(struct qcom_rpm *rpm,
377		   int state,
378		   int resource,
379		   u32 *buf, size_t count)
380{
381	const struct qcom_rpm_resource *res;
382	const struct qcom_rpm_data *data = rpm->data;
383	u32 sel_mask[RPM_SELECT_SIZE] = { 0 };
384	int left;
385	int ret = 0;
386	int i;
387
388	if (WARN_ON(resource < 0 || resource >= data->n_resources))
389		return -EINVAL;
390
391	res = &data->resource_table[resource];
392	if (WARN_ON(res->size != count))
393		return -EINVAL;
394
395	mutex_lock(&rpm->lock);
396
397	for (i = 0; i < res->size; i++)
398		writel_relaxed(buf[i], RPM_REQ_REG(rpm, res->target_id + i));
399
400	bitmap_set((unsigned long *)sel_mask, res->select_id, 1);
401	for (i = 0; i < ARRAY_SIZE(sel_mask); i++) {
402		writel_relaxed(sel_mask[i],
403			       RPM_CTRL_REG(rpm, RPM_REQ_SELECT + i));
404	}
405
406	writel_relaxed(BIT(state), RPM_CTRL_REG(rpm, RPM_REQUEST_CONTEXT));
407
408	reinit_completion(&rpm->ack);
409	regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
410
411	left = wait_for_completion_timeout(&rpm->ack, RPM_REQUEST_TIMEOUT);
412	if (!left)
413		ret = -ETIMEDOUT;
414	else if (rpm->ack_status & RPM_REJECTED)
415		ret = -EIO;
416
417	mutex_unlock(&rpm->lock);
418
419	return ret;
420}
421EXPORT_SYMBOL(qcom_rpm_write);
422
423static irqreturn_t qcom_rpm_ack_interrupt(int irq, void *dev)
424{
425	struct qcom_rpm *rpm = dev;
426	u32 ack;
427	int i;
428
429	ack = readl_relaxed(RPM_CTRL_REG(rpm, RPM_ACK_CONTEXT));
430	for (i = 0; i < RPM_SELECT_SIZE; i++)
431		writel_relaxed(0, RPM_CTRL_REG(rpm, RPM_ACK_SELECTOR + i));
432	writel(0, RPM_CTRL_REG(rpm, RPM_ACK_CONTEXT));
433
434	if (ack & RPM_NOTIFICATION) {
435		dev_warn(rpm->dev, "ignoring notification!\n");
436	} else {
437		rpm->ack_status = ack;
438		complete(&rpm->ack);
439	}
440
441	return IRQ_HANDLED;
442}
443
444static irqreturn_t qcom_rpm_err_interrupt(int irq, void *dev)
445{
446	struct qcom_rpm *rpm = dev;
447
448	regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
449	dev_err(rpm->dev, "RPM triggered fatal error\n");
450
451	return IRQ_HANDLED;
452}
453
454static irqreturn_t qcom_rpm_wakeup_interrupt(int irq, void *dev)
455{
456	return IRQ_HANDLED;
457}
458
459static int qcom_rpm_probe(struct platform_device *pdev)
460{
461	const struct of_device_id *match;
462	struct device_node *syscon_np;
463	struct resource *res;
464	struct qcom_rpm *rpm;
465	u32 fw_version[3];
466	int irq_wakeup;
467	int irq_ack;
468	int irq_err;
469	int ret;
470
471	rpm = devm_kzalloc(&pdev->dev, sizeof(*rpm), GFP_KERNEL);
472	if (!rpm)
473		return -ENOMEM;
474
475	rpm->dev = &pdev->dev;
476	mutex_init(&rpm->lock);
477	init_completion(&rpm->ack);
478
479	irq_ack = platform_get_irq_byname(pdev, "ack");
480	if (irq_ack < 0) {
481		dev_err(&pdev->dev, "required ack interrupt missing\n");
482		return irq_ack;
483	}
484
485	irq_err = platform_get_irq_byname(pdev, "err");
486	if (irq_err < 0) {
487		dev_err(&pdev->dev, "required err interrupt missing\n");
488		return irq_err;
489	}
490
491	irq_wakeup = platform_get_irq_byname(pdev, "wakeup");
492	if (irq_wakeup < 0) {
493		dev_err(&pdev->dev, "required wakeup interrupt missing\n");
494		return irq_wakeup;
495	}
496
497	match = of_match_device(qcom_rpm_of_match, &pdev->dev);
498	rpm->data = match->data;
499
500	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
501	rpm->status_regs = devm_ioremap_resource(&pdev->dev, res);
502	if (IS_ERR(rpm->status_regs))
503		return PTR_ERR(rpm->status_regs);
504	rpm->ctrl_regs = rpm->status_regs + 0x400;
505	rpm->req_regs = rpm->status_regs + 0x600;
506
507	syscon_np = of_parse_phandle(pdev->dev.of_node, "qcom,ipc", 0);
508	if (!syscon_np) {
509		dev_err(&pdev->dev, "no qcom,ipc node\n");
510		return -ENODEV;
511	}
512
513	rpm->ipc_regmap = syscon_node_to_regmap(syscon_np);
514	if (IS_ERR(rpm->ipc_regmap))
515		return PTR_ERR(rpm->ipc_regmap);
516
517	ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 1,
518					 &rpm->ipc_offset);
519	if (ret < 0) {
520		dev_err(&pdev->dev, "no offset in qcom,ipc\n");
521		return -EINVAL;
522	}
523
524	ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 2,
525					 &rpm->ipc_bit);
526	if (ret < 0) {
527		dev_err(&pdev->dev, "no bit in qcom,ipc\n");
528		return -EINVAL;
529	}
530
531	dev_set_drvdata(&pdev->dev, rpm);
532
533	fw_version[0] = readl(RPM_STATUS_REG(rpm, 0));
534	fw_version[1] = readl(RPM_STATUS_REG(rpm, 1));
535	fw_version[2] = readl(RPM_STATUS_REG(rpm, 2));
536	if (fw_version[0] != rpm->data->version) {
537		dev_err(&pdev->dev,
538			"RPM version %u.%u.%u incompatible with driver version %u",
539			fw_version[0],
540			fw_version[1],
541			fw_version[2],
542			rpm->data->version);
543		return -EFAULT;
544	}
545
546	dev_info(&pdev->dev, "RPM firmware %u.%u.%u\n", fw_version[0],
547							fw_version[1],
548							fw_version[2]);
549
550	ret = devm_request_irq(&pdev->dev,
551			       irq_ack,
552			       qcom_rpm_ack_interrupt,
553			       IRQF_TRIGGER_RISING,
554			       "qcom_rpm_ack",
555			       rpm);
556	if (ret) {
557		dev_err(&pdev->dev, "failed to request ack interrupt\n");
558		return ret;
559	}
560
561	ret = irq_set_irq_wake(irq_ack, 1);
562	if (ret)
563		dev_warn(&pdev->dev, "failed to mark ack irq as wakeup\n");
564
565	ret = devm_request_irq(&pdev->dev,
566			       irq_err,
567			       qcom_rpm_err_interrupt,
568			       IRQF_TRIGGER_RISING,
569			       "qcom_rpm_err",
570			       rpm);
571	if (ret) {
572		dev_err(&pdev->dev, "failed to request err interrupt\n");
573		return ret;
574	}
575
576	ret = devm_request_irq(&pdev->dev,
577			       irq_wakeup,
578			       qcom_rpm_wakeup_interrupt,
579			       IRQF_TRIGGER_RISING,
580			       "qcom_rpm_wakeup",
581			       rpm);
582	if (ret) {
583		dev_err(&pdev->dev, "failed to request wakeup interrupt\n");
584		return ret;
585	}
586
587	ret = irq_set_irq_wake(irq_wakeup, 1);
588	if (ret)
589		dev_warn(&pdev->dev, "failed to mark wakeup irq as wakeup\n");
590
591	return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
592}
593
594static int qcom_rpm_remove(struct platform_device *pdev)
595{
596	of_platform_depopulate(&pdev->dev);
597	return 0;
598}
599
600static struct platform_driver qcom_rpm_driver = {
601	.probe = qcom_rpm_probe,
602	.remove = qcom_rpm_remove,
603	.driver  = {
604		.name  = "qcom_rpm",
605		.of_match_table = qcom_rpm_of_match,
606	},
607};
608
609static int __init qcom_rpm_init(void)
610{
611	return platform_driver_register(&qcom_rpm_driver);
612}
613arch_initcall(qcom_rpm_init);
614
615static void __exit qcom_rpm_exit(void)
616{
617	platform_driver_unregister(&qcom_rpm_driver);
618}
619module_exit(qcom_rpm_exit)
620
621MODULE_DESCRIPTION("Qualcomm Resource Power Manager driver");
622MODULE_LICENSE("GPL v2");
623MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
624