1/*
2 * Xilinx Video IP Composite Device
3 *
4 * Copyright (C) 2013-2015 Ideas on Board
5 * Copyright (C) 2013-2015 Xilinx, Inc.
6 *
7 * Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
8 *           Laurent Pinchart <laurent.pinchart@ideasonboard.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef __XILINX_VIPP_H__
16#define __XILINX_VIPP_H__
17
18#include <linux/list.h>
19#include <linux/mutex.h>
20#include <media/media-device.h>
21#include <media/v4l2-async.h>
22#include <media/v4l2-ctrls.h>
23#include <media/v4l2-device.h>
24
25/**
26 * struct xvip_composite_device - Xilinx Video IP device structure
27 * @v4l2_dev: V4L2 device
28 * @media_dev: media device
29 * @dev: (OF) device
30 * @notifier: V4L2 asynchronous subdevs notifier
31 * @entities: entities in the graph as a list of xvip_graph_entity
32 * @num_subdevs: number of subdevs in the pipeline
33 * @dmas: list of DMA channels at the pipeline output and input
34 * @v4l2_caps: V4L2 capabilities of the whole device (see VIDIOC_QUERYCAP)
35 */
36struct xvip_composite_device {
37	struct v4l2_device v4l2_dev;
38	struct media_device media_dev;
39	struct device *dev;
40
41	struct v4l2_async_notifier notifier;
42	struct list_head entities;
43	unsigned int num_subdevs;
44
45	struct list_head dmas;
46	u32 v4l2_caps;
47};
48
49#endif /* __XILINX_VIPP_H__ */
50