1/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com/
4 *
5 * Mixer register header file for Samsung Mixer driver
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11#ifndef SAMSUNG_REGS_MIXER_H
12#define SAMSUNG_REGS_MIXER_H
13
14/*
15 * Register part
16 */
17#define MXR_STATUS			0x0000
18#define MXR_CFG				0x0004
19#define MXR_INT_EN			0x0008
20#define MXR_INT_STATUS			0x000C
21#define MXR_LAYER_CFG			0x0010
22#define MXR_VIDEO_CFG			0x0014
23#define MXR_GRAPHIC0_CFG		0x0020
24#define MXR_GRAPHIC0_BASE		0x0024
25#define MXR_GRAPHIC0_SPAN		0x0028
26#define MXR_GRAPHIC0_SXY		0x002C
27#define MXR_GRAPHIC0_WH			0x0030
28#define MXR_GRAPHIC0_DXY		0x0034
29#define MXR_GRAPHIC0_BLANK		0x0038
30#define MXR_GRAPHIC1_CFG		0x0040
31#define MXR_GRAPHIC1_BASE		0x0044
32#define MXR_GRAPHIC1_SPAN		0x0048
33#define MXR_GRAPHIC1_SXY		0x004C
34#define MXR_GRAPHIC1_WH			0x0050
35#define MXR_GRAPHIC1_DXY		0x0054
36#define MXR_GRAPHIC1_BLANK		0x0058
37#define MXR_BG_CFG			0x0060
38#define MXR_BG_COLOR0			0x0064
39#define MXR_BG_COLOR1			0x0068
40#define MXR_BG_COLOR2			0x006C
41
42/* for parametrized access to layer registers */
43#define MXR_GRAPHIC_CFG(i)		(0x0020 + (i) * 0x20)
44#define MXR_GRAPHIC_BASE(i)		(0x0024 + (i) * 0x20)
45#define MXR_GRAPHIC_SPAN(i)		(0x0028 + (i) * 0x20)
46#define MXR_GRAPHIC_SXY(i)		(0x002C + (i) * 0x20)
47#define MXR_GRAPHIC_WH(i)		(0x0030 + (i) * 0x20)
48#define MXR_GRAPHIC_DXY(i)		(0x0034 + (i) * 0x20)
49
50/*
51 * Bit definition part
52 */
53
54/* generates mask for range of bits */
55#define MXR_MASK(high_bit, low_bit) \
56	(((2 << ((high_bit) - (low_bit))) - 1) << (low_bit))
57
58#define MXR_MASK_VAL(val, high_bit, low_bit) \
59	(((val) << (low_bit)) & MXR_MASK(high_bit, low_bit))
60
61/* bits for MXR_STATUS */
62#define MXR_STATUS_16_BURST		(1 << 7)
63#define MXR_STATUS_BURST_MASK		(1 << 7)
64#define MXR_STATUS_SYNC_ENABLE		(1 << 2)
65#define MXR_STATUS_REG_RUN		(1 << 0)
66
67/* bits for MXR_CFG */
68#define MXR_CFG_OUT_YUV444		(0 << 8)
69#define MXR_CFG_OUT_RGB888		(1 << 8)
70#define MXR_CFG_OUT_MASK		(1 << 8)
71#define MXR_CFG_DST_SDO			(0 << 7)
72#define MXR_CFG_DST_HDMI		(1 << 7)
73#define MXR_CFG_DST_MASK		(1 << 7)
74#define MXR_CFG_SCAN_HD_720		(0 << 6)
75#define MXR_CFG_SCAN_HD_1080		(1 << 6)
76#define MXR_CFG_GRP1_ENABLE		(1 << 5)
77#define MXR_CFG_GRP0_ENABLE		(1 << 4)
78#define MXR_CFG_VP_ENABLE		(1 << 3)
79#define MXR_CFG_SCAN_INTERLACE		(0 << 2)
80#define MXR_CFG_SCAN_PROGRASSIVE	(1 << 2)
81#define MXR_CFG_SCAN_NTSC		(0 << 1)
82#define MXR_CFG_SCAN_PAL		(1 << 1)
83#define MXR_CFG_SCAN_SD			(0 << 0)
84#define MXR_CFG_SCAN_HD			(1 << 0)
85#define MXR_CFG_SCAN_MASK		0x47
86
87/* bits for MXR_GRAPHICn_CFG */
88#define MXR_GRP_CFG_COLOR_KEY_DISABLE	(1 << 21)
89#define MXR_GRP_CFG_BLEND_PRE_MUL	(1 << 20)
90#define MXR_GRP_CFG_FORMAT_VAL(x)	MXR_MASK_VAL(x, 11, 8)
91#define MXR_GRP_CFG_FORMAT_MASK		MXR_GRP_CFG_FORMAT_VAL(~0)
92#define MXR_GRP_CFG_ALPHA_VAL(x)	MXR_MASK_VAL(x, 7, 0)
93
94/* bits for MXR_GRAPHICn_WH */
95#define MXR_GRP_WH_H_SCALE(x)		MXR_MASK_VAL(x, 28, 28)
96#define MXR_GRP_WH_V_SCALE(x)		MXR_MASK_VAL(x, 12, 12)
97#define MXR_GRP_WH_WIDTH(x)		MXR_MASK_VAL(x, 26, 16)
98#define MXR_GRP_WH_HEIGHT(x)		MXR_MASK_VAL(x, 10, 0)
99
100/* bits for MXR_GRAPHICn_SXY */
101#define MXR_GRP_SXY_SX(x)		MXR_MASK_VAL(x, 26, 16)
102#define MXR_GRP_SXY_SY(x)		MXR_MASK_VAL(x, 10, 0)
103
104/* bits for MXR_GRAPHICn_DXY */
105#define MXR_GRP_DXY_DX(x)		MXR_MASK_VAL(x, 26, 16)
106#define MXR_GRP_DXY_DY(x)		MXR_MASK_VAL(x, 10, 0)
107
108/* bits for MXR_INT_EN */
109#define MXR_INT_EN_VSYNC		(1 << 11)
110#define MXR_INT_EN_ALL			(0x0f << 8)
111
112/* bit for MXR_INT_STATUS */
113#define MXR_INT_CLEAR_VSYNC		(1 << 11)
114#define MXR_INT_STATUS_VSYNC		(1 << 0)
115
116/* bit for MXR_LAYER_CFG */
117#define MXR_LAYER_CFG_GRP1_VAL(x)	MXR_MASK_VAL(x, 11, 8)
118#define MXR_LAYER_CFG_GRP0_VAL(x)	MXR_MASK_VAL(x, 7, 4)
119#define MXR_LAYER_CFG_VP_VAL(x)		MXR_MASK_VAL(x, 3, 0)
120
121#endif /* SAMSUNG_REGS_MIXER_H */
122
123