1/* 2 * cx18 gpio functions 3 * 4 * Derived from ivtv-gpio.c 5 * 6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 7 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 22 * 02111-1307 USA 23 */ 24 25#include "cx18-driver.h" 26#include "cx18-io.h" 27#include "cx18-cards.h" 28#include "cx18-gpio.h" 29#include "tuner-xc2028.h" 30 31/********************* GPIO stuffs *********************/ 32 33/* GPIO registers */ 34#define CX18_REG_GPIO_IN 0xc72010 35#define CX18_REG_GPIO_OUT1 0xc78100 36#define CX18_REG_GPIO_DIR1 0xc78108 37#define CX18_REG_GPIO_OUT2 0xc78104 38#define CX18_REG_GPIO_DIR2 0xc7810c 39 40/* 41 * HVR-1600 GPIO pins, courtesy of Hauppauge: 42 * 43 * gpio0: zilog ir process reset pin 44 * gpio1: zilog programming pin (you should never use this) 45 * gpio12: cx24227 reset pin 46 * gpio13: cs5345 reset pin 47*/ 48 49/* 50 * File scope utility functions 51 */ 52static void gpio_write(struct cx18 *cx) 53{ 54 u32 dir_lo = cx->gpio_dir & 0xffff; 55 u32 val_lo = cx->gpio_val & 0xffff; 56 u32 dir_hi = cx->gpio_dir >> 16; 57 u32 val_hi = cx->gpio_val >> 16; 58 59 cx18_write_reg_expect(cx, dir_lo << 16, 60 CX18_REG_GPIO_DIR1, ~dir_lo, dir_lo); 61 cx18_write_reg_expect(cx, (dir_lo << 16) | val_lo, 62 CX18_REG_GPIO_OUT1, val_lo, dir_lo); 63 cx18_write_reg_expect(cx, dir_hi << 16, 64 CX18_REG_GPIO_DIR2, ~dir_hi, dir_hi); 65 cx18_write_reg_expect(cx, (dir_hi << 16) | val_hi, 66 CX18_REG_GPIO_OUT2, val_hi, dir_hi); 67} 68 69static void gpio_update(struct cx18 *cx, u32 mask, u32 data) 70{ 71 if (mask == 0) 72 return; 73 74 mutex_lock(&cx->gpio_lock); 75 cx->gpio_val = (cx->gpio_val & ~mask) | (data & mask); 76 gpio_write(cx); 77 mutex_unlock(&cx->gpio_lock); 78} 79 80static void gpio_reset_seq(struct cx18 *cx, u32 active_lo, u32 active_hi, 81 unsigned int assert_msecs, 82 unsigned int recovery_msecs) 83{ 84 u32 mask; 85 86 mask = active_lo | active_hi; 87 if (mask == 0) 88 return; 89 90 /* 91 * Assuming that active_hi and active_lo are a subsets of the bits in 92 * gpio_dir. Also assumes that active_lo and active_hi don't overlap 93 * in any bit position 94 */ 95 96 /* Assert */ 97 gpio_update(cx, mask, ~active_lo); 98 schedule_timeout_uninterruptible(msecs_to_jiffies(assert_msecs)); 99 100 /* Deassert */ 101 gpio_update(cx, mask, ~active_hi); 102 schedule_timeout_uninterruptible(msecs_to_jiffies(recovery_msecs)); 103} 104 105/* 106 * GPIO Multiplexer - logical device 107 */ 108static int gpiomux_log_status(struct v4l2_subdev *sd) 109{ 110 struct cx18 *cx = v4l2_get_subdevdata(sd); 111 112 mutex_lock(&cx->gpio_lock); 113 CX18_INFO_DEV(sd, "GPIO: direction 0x%08x, value 0x%08x\n", 114 cx->gpio_dir, cx->gpio_val); 115 mutex_unlock(&cx->gpio_lock); 116 return 0; 117} 118 119static int gpiomux_s_radio(struct v4l2_subdev *sd) 120{ 121 struct cx18 *cx = v4l2_get_subdevdata(sd); 122 123 /* 124 * FIXME - work out the cx->active/audio_input mess - this is 125 * intended to handle the switch to radio mode and set the 126 * audio routing, but we need to update the state in cx 127 */ 128 gpio_update(cx, cx->card->gpio_audio_input.mask, 129 cx->card->gpio_audio_input.radio); 130 return 0; 131} 132 133static int gpiomux_s_std(struct v4l2_subdev *sd, v4l2_std_id norm) 134{ 135 struct cx18 *cx = v4l2_get_subdevdata(sd); 136 u32 data; 137 138 switch (cx->card->audio_inputs[cx->audio_input].muxer_input) { 139 case 1: 140 data = cx->card->gpio_audio_input.linein; 141 break; 142 case 0: 143 data = cx->card->gpio_audio_input.tuner; 144 break; 145 default: 146 /* 147 * FIXME - work out the cx->active/audio_input mess - this is 148 * intended to handle the switch from radio mode and set the 149 * audio routing, but we need to update the state in cx 150 */ 151 data = cx->card->gpio_audio_input.tuner; 152 break; 153 } 154 gpio_update(cx, cx->card->gpio_audio_input.mask, data); 155 return 0; 156} 157 158static int gpiomux_s_audio_routing(struct v4l2_subdev *sd, 159 u32 input, u32 output, u32 config) 160{ 161 struct cx18 *cx = v4l2_get_subdevdata(sd); 162 u32 data; 163 164 switch (input) { 165 case 0: 166 data = cx->card->gpio_audio_input.tuner; 167 break; 168 case 1: 169 data = cx->card->gpio_audio_input.linein; 170 break; 171 case 2: 172 data = cx->card->gpio_audio_input.radio; 173 break; 174 default: 175 return -EINVAL; 176 } 177 gpio_update(cx, cx->card->gpio_audio_input.mask, data); 178 return 0; 179} 180 181static const struct v4l2_subdev_core_ops gpiomux_core_ops = { 182 .log_status = gpiomux_log_status, 183}; 184 185static const struct v4l2_subdev_tuner_ops gpiomux_tuner_ops = { 186 .s_radio = gpiomux_s_radio, 187}; 188 189static const struct v4l2_subdev_audio_ops gpiomux_audio_ops = { 190 .s_routing = gpiomux_s_audio_routing, 191}; 192 193static const struct v4l2_subdev_video_ops gpiomux_video_ops = { 194 .s_std = gpiomux_s_std, 195}; 196 197static const struct v4l2_subdev_ops gpiomux_ops = { 198 .core = &gpiomux_core_ops, 199 .tuner = &gpiomux_tuner_ops, 200 .audio = &gpiomux_audio_ops, 201 .video = &gpiomux_video_ops, 202}; 203 204/* 205 * GPIO Reset Controller - logical device 206 */ 207static int resetctrl_log_status(struct v4l2_subdev *sd) 208{ 209 struct cx18 *cx = v4l2_get_subdevdata(sd); 210 211 mutex_lock(&cx->gpio_lock); 212 CX18_INFO_DEV(sd, "GPIO: direction 0x%08x, value 0x%08x\n", 213 cx->gpio_dir, cx->gpio_val); 214 mutex_unlock(&cx->gpio_lock); 215 return 0; 216} 217 218static int resetctrl_reset(struct v4l2_subdev *sd, u32 val) 219{ 220 struct cx18 *cx = v4l2_get_subdevdata(sd); 221 const struct cx18_gpio_i2c_slave_reset *p; 222 223 p = &cx->card->gpio_i2c_slave_reset; 224 switch (val) { 225 case CX18_GPIO_RESET_I2C: 226 gpio_reset_seq(cx, p->active_lo_mask, p->active_hi_mask, 227 p->msecs_asserted, p->msecs_recovery); 228 break; 229 case CX18_GPIO_RESET_Z8F0811: 230 /* 231 * Assert timing for the Z8F0811 on HVR-1600 boards: 232 * 1. Assert RESET for min of 4 clock cycles at 18.432 MHz to 233 * initiate 234 * 2. Reset then takes 66 WDT cycles at 10 kHz + 16 xtal clock 235 * cycles (6,601,085 nanoseconds ~= 7 milliseconds) 236 * 3. DBG pin must be high before chip exits reset for normal 237 * operation. DBG is open drain and hopefully pulled high 238 * since we don't normally drive it (GPIO 1?) for the 239 * HVR-1600 240 * 4. Z8F0811 won't exit reset until RESET is deasserted 241 * 5. Zilog comes out of reset, loads reset vector address and 242 * executes from there. Required recovery delay unknown. 243 */ 244 gpio_reset_seq(cx, p->ir_reset_mask, 0, 245 p->msecs_asserted, p->msecs_recovery); 246 break; 247 case CX18_GPIO_RESET_XC2028: 248 if (cx->card->tuners[0].tuner == TUNER_XC2028) 249 gpio_reset_seq(cx, (1 << cx->card->xceive_pin), 0, 250 1, 1); 251 break; 252 } 253 return 0; 254} 255 256static const struct v4l2_subdev_core_ops resetctrl_core_ops = { 257 .log_status = resetctrl_log_status, 258 .reset = resetctrl_reset, 259}; 260 261static const struct v4l2_subdev_ops resetctrl_ops = { 262 .core = &resetctrl_core_ops, 263}; 264 265/* 266 * External entry points 267 */ 268void cx18_gpio_init(struct cx18 *cx) 269{ 270 mutex_lock(&cx->gpio_lock); 271 cx->gpio_dir = cx->card->gpio_init.direction; 272 cx->gpio_val = cx->card->gpio_init.initial_value; 273 274 if (cx->card->tuners[0].tuner == TUNER_XC2028) { 275 cx->gpio_dir |= 1 << cx->card->xceive_pin; 276 cx->gpio_val |= 1 << cx->card->xceive_pin; 277 } 278 279 if (cx->gpio_dir == 0) { 280 mutex_unlock(&cx->gpio_lock); 281 return; 282 } 283 284 CX18_DEBUG_INFO("GPIO initial dir: %08x/%08x out: %08x/%08x\n", 285 cx18_read_reg(cx, CX18_REG_GPIO_DIR1), 286 cx18_read_reg(cx, CX18_REG_GPIO_DIR2), 287 cx18_read_reg(cx, CX18_REG_GPIO_OUT1), 288 cx18_read_reg(cx, CX18_REG_GPIO_OUT2)); 289 290 gpio_write(cx); 291 mutex_unlock(&cx->gpio_lock); 292} 293 294int cx18_gpio_register(struct cx18 *cx, u32 hw) 295{ 296 struct v4l2_subdev *sd; 297 const struct v4l2_subdev_ops *ops; 298 char *str; 299 300 switch (hw) { 301 case CX18_HW_GPIO_MUX: 302 sd = &cx->sd_gpiomux; 303 ops = &gpiomux_ops; 304 str = "gpio-mux"; 305 break; 306 case CX18_HW_GPIO_RESET_CTRL: 307 sd = &cx->sd_resetctrl; 308 ops = &resetctrl_ops; 309 str = "gpio-reset-ctrl"; 310 break; 311 default: 312 return -EINVAL; 313 } 314 315 v4l2_subdev_init(sd, ops); 316 v4l2_set_subdevdata(sd, cx); 317 snprintf(sd->name, sizeof(sd->name), "%s %s", cx->v4l2_dev.name, str); 318 sd->grp_id = hw; 319 return v4l2_device_register_subdev(&cx->v4l2_dev, sd); 320} 321 322void cx18_reset_ir_gpio(void *data) 323{ 324 struct cx18 *cx = to_cx18((struct v4l2_device *)data); 325 326 if (cx->card->gpio_i2c_slave_reset.ir_reset_mask == 0) 327 return; 328 329 CX18_DEBUG_INFO("Resetting IR microcontroller\n"); 330 331 v4l2_subdev_call(&cx->sd_resetctrl, 332 core, reset, CX18_GPIO_RESET_Z8F0811); 333} 334EXPORT_SYMBOL(cx18_reset_ir_gpio); 335/* This symbol is exported for use by lirc_pvr150 for the IR-blaster */ 336 337/* Xceive tuner reset function */ 338int cx18_reset_tuner_gpio(void *dev, int component, int cmd, int value) 339{ 340 struct i2c_algo_bit_data *algo = dev; 341 struct cx18_i2c_algo_callback_data *cb_data = algo->data; 342 struct cx18 *cx = cb_data->cx; 343 344 if (cmd != XC2028_TUNER_RESET || 345 cx->card->tuners[0].tuner != TUNER_XC2028) 346 return 0; 347 348 CX18_DEBUG_INFO("Resetting XCeive tuner\n"); 349 return v4l2_subdev_call(&cx->sd_resetctrl, 350 core, reset, CX18_GPIO_RESET_XC2028); 351} 352