1/*
2 * HP i8042 SDC + MSM-58321 BBRTC driver.
3 *
4 * Copyright (c) 2001 Brian S. Julin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions, and the following disclaimer,
12 *    without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 *    derived from this software without specific prior written permission.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL").
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 *
29 * References:
30 * System Device Controller Microprocessor Firmware Theory of Operation
31 *      for Part Number 1820-4784 Revision B.  Dwg No. A-1820-4784-2
32 * efirtc.c by Stephane Eranian/Hewlett Packard
33 *
34 */
35
36#include <linux/hp_sdc.h>
37#include <linux/errno.h>
38#include <linux/types.h>
39#include <linux/init.h>
40#include <linux/module.h>
41#include <linux/time.h>
42#include <linux/miscdevice.h>
43#include <linux/proc_fs.h>
44#include <linux/seq_file.h>
45#include <linux/poll.h>
46#include <linux/rtc.h>
47#include <linux/mutex.h>
48#include <linux/semaphore.h>
49
50MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
51MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver");
52MODULE_LICENSE("Dual BSD/GPL");
53
54#define RTC_VERSION "1.10d"
55
56static DEFINE_MUTEX(hp_sdc_rtc_mutex);
57static unsigned long epoch = 2000;
58
59static struct semaphore i8042tregs;
60
61static hp_sdc_irqhook hp_sdc_rtc_isr;
62
63static struct fasync_struct *hp_sdc_rtc_async_queue;
64
65static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait);
66
67static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf,
68			       size_t count, loff_t *ppos);
69
70static long hp_sdc_rtc_unlocked_ioctl(struct file *file,
71				      unsigned int cmd, unsigned long arg);
72
73static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait);
74
75static int hp_sdc_rtc_open(struct inode *inode, struct file *file);
76static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on);
77
78static void hp_sdc_rtc_isr (int irq, void *dev_id,
79			    uint8_t status, uint8_t data)
80{
81	return;
82}
83
84static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm)
85{
86	struct semaphore tsem;
87	hp_sdc_transaction t;
88	uint8_t tseq[91];
89	int i;
90
91	i = 0;
92	while (i < 91) {
93		tseq[i++] = HP_SDC_ACT_DATAREG |
94			HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN;
95		tseq[i++] = 0x01;			/* write i8042[0x70] */
96	  	tseq[i]   = i / 7;			/* BBRTC reg address */
97		i++;
98		tseq[i++] = HP_SDC_CMD_DO_RTCR;		/* Trigger command   */
99		tseq[i++] = 2;		/* expect 1 stat/dat pair back.   */
100		i++; i++;               /* buffer for stat/dat pair       */
101	}
102	tseq[84] |= HP_SDC_ACT_SEMAPHORE;
103	t.endidx =		91;
104	t.seq =			tseq;
105	t.act.semaphore =	&tsem;
106	sema_init(&tsem, 0);
107
108	if (hp_sdc_enqueue_transaction(&t)) return -1;
109
110	/* Put ourselves to sleep for results. */
111	if (WARN_ON(down_interruptible(&tsem)))
112		return -1;
113
114	/* Check for nonpresence of BBRTC */
115	if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] |
116	       tseq[55] | tseq[62] | tseq[34] | tseq[41] |
117	       tseq[20] | tseq[27] | tseq[6]  | tseq[13]) & 0x0f))
118		return -1;
119
120	memset(rtctm, 0, sizeof(struct rtc_time));
121	rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10;
122	rtctm->tm_mon  = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10;
123	rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10;
124	rtctm->tm_wday = (tseq[48] & 0x0f);
125	rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10;
126	rtctm->tm_min  = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10;
127	rtctm->tm_sec  = (tseq[6]  & 0x0f) + (tseq[13] & 0x0f) * 10;
128
129	return 0;
130}
131
132static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm)
133{
134	struct rtc_time tm, tm_last;
135	int i = 0;
136
137	/* MSM-58321 has no read latch, so must read twice and compare. */
138
139	if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1;
140	if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
141
142	while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) {
143		if (i++ > 4) return -1;
144		memcpy(&tm_last, &tm, sizeof(struct rtc_time));
145		if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
146	}
147
148	memcpy(rtctm, &tm, sizeof(struct rtc_time));
149
150	return 0;
151}
152
153
154static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg)
155{
156	hp_sdc_transaction t;
157	uint8_t tseq[26] = {
158		HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
159		0,
160		HP_SDC_CMD_READ_T1, 2, 0, 0,
161		HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
162		HP_SDC_CMD_READ_T2, 2, 0, 0,
163		HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
164		HP_SDC_CMD_READ_T3, 2, 0, 0,
165		HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
166		HP_SDC_CMD_READ_T4, 2, 0, 0,
167		HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
168		HP_SDC_CMD_READ_T5, 2, 0, 0
169	};
170
171	t.endidx = numreg * 5;
172
173	tseq[1] = loadcmd;
174	tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */
175
176	t.seq =			tseq;
177	t.act.semaphore =	&i8042tregs;
178
179	/* Sleep if output regs in use. */
180	if (WARN_ON(down_interruptible(&i8042tregs)))
181		return -1;
182
183	if (hp_sdc_enqueue_transaction(&t)) {
184		up(&i8042tregs);
185		return -1;
186	}
187
188	/* Sleep until results come back. */
189	if (WARN_ON(down_interruptible(&i8042tregs)))
190		return -1;
191
192	up(&i8042tregs);
193
194	return (tseq[5] |
195		((uint64_t)(tseq[10]) << 8)  | ((uint64_t)(tseq[15]) << 16) |
196		((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32));
197}
198
199
200/* Read the i8042 real-time clock */
201static inline int hp_sdc_rtc_read_rt(struct timespec64 *res) {
202	int64_t raw;
203	uint32_t tenms;
204	unsigned int days;
205
206	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5);
207	if (raw < 0) return -1;
208
209	tenms = (uint32_t)raw & 0xffffff;
210	days  = (unsigned int)(raw >> 24) & 0xffff;
211
212	res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
213	res->tv_sec =  (tenms / 100) + (time64_t)days * 86400;
214
215	return 0;
216}
217
218
219/* Read the i8042 fast handshake timer */
220static inline int hp_sdc_rtc_read_fhs(struct timespec64 *res) {
221	int64_t raw;
222	unsigned int tenms;
223
224	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2);
225	if (raw < 0) return -1;
226
227	tenms = (unsigned int)raw & 0xffff;
228
229	res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
230	res->tv_sec  = (time64_t)(tenms / 100);
231
232	return 0;
233}
234
235
236/* Read the i8042 match timer (a.k.a. alarm) */
237static inline int hp_sdc_rtc_read_mt(struct timespec64 *res) {
238	int64_t raw;
239	uint32_t tenms;
240
241	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3);
242	if (raw < 0) return -1;
243
244	tenms = (uint32_t)raw & 0xffffff;
245
246	res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
247	res->tv_sec  = (time64_t)(tenms / 100);
248
249	return 0;
250}
251
252
253/* Read the i8042 delay timer */
254static inline int hp_sdc_rtc_read_dt(struct timespec64 *res) {
255	int64_t raw;
256	uint32_t tenms;
257
258	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3);
259	if (raw < 0) return -1;
260
261	tenms = (uint32_t)raw & 0xffffff;
262
263	res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
264	res->tv_sec  = (time64_t)(tenms / 100);
265
266	return 0;
267}
268
269
270/* Read the i8042 cycle timer (a.k.a. periodic) */
271static inline int hp_sdc_rtc_read_ct(struct timespec64 *res) {
272	int64_t raw;
273	uint32_t tenms;
274
275	raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3);
276	if (raw < 0) return -1;
277
278	tenms = (uint32_t)raw & 0xffffff;
279
280	res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
281	res->tv_sec  = (time64_t)(tenms / 100);
282
283	return 0;
284}
285
286
287#if 0 /* not used yet */
288/* Set the i8042 real-time clock */
289static int hp_sdc_rtc_set_rt (struct timeval *setto)
290{
291	uint32_t tenms;
292	unsigned int days;
293	hp_sdc_transaction t;
294	uint8_t tseq[11] = {
295		HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
296		HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0,
297		HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
298		HP_SDC_CMD_SET_RTD, 2, 0, 0
299	};
300
301	t.endidx = 10;
302
303	if (0xffff < setto->tv_sec / 86400) return -1;
304	days = setto->tv_sec / 86400;
305	if (0xffff < setto->tv_usec / 1000000 / 86400) return -1;
306	days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400;
307	if (days > 0xffff) return -1;
308
309	if (0xffffff < setto->tv_sec) return -1;
310	tenms  = setto->tv_sec * 100;
311	if (0xffffff < setto->tv_usec / 10000) return -1;
312	tenms += setto->tv_usec / 10000;
313	if (tenms > 0xffffff) return -1;
314
315	tseq[3] = (uint8_t)(tenms & 0xff);
316	tseq[4] = (uint8_t)((tenms >> 8)  & 0xff);
317	tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
318
319	tseq[9] = (uint8_t)(days & 0xff);
320	tseq[10] = (uint8_t)((days >> 8) & 0xff);
321
322	t.seq =	tseq;
323
324	if (hp_sdc_enqueue_transaction(&t)) return -1;
325	return 0;
326}
327
328/* Set the i8042 fast handshake timer */
329static int hp_sdc_rtc_set_fhs (struct timeval *setto)
330{
331	uint32_t tenms;
332	hp_sdc_transaction t;
333	uint8_t tseq[5] = {
334		HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
335		HP_SDC_CMD_SET_FHS, 2, 0, 0
336	};
337
338	t.endidx = 4;
339
340	if (0xffff < setto->tv_sec) return -1;
341	tenms  = setto->tv_sec * 100;
342	if (0xffff < setto->tv_usec / 10000) return -1;
343	tenms += setto->tv_usec / 10000;
344	if (tenms > 0xffff) return -1;
345
346	tseq[3] = (uint8_t)(tenms & 0xff);
347	tseq[4] = (uint8_t)((tenms >> 8)  & 0xff);
348
349	t.seq =	tseq;
350
351	if (hp_sdc_enqueue_transaction(&t)) return -1;
352	return 0;
353}
354
355
356/* Set the i8042 match timer (a.k.a. alarm) */
357#define hp_sdc_rtc_set_mt (setto) \
358	hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT)
359
360/* Set the i8042 delay timer */
361#define hp_sdc_rtc_set_dt (setto) \
362	hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT)
363
364/* Set the i8042 cycle timer (a.k.a. periodic) */
365#define hp_sdc_rtc_set_ct (setto) \
366	hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT)
367
368/* Set one of the i8042 3-byte wide timers */
369static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd)
370{
371	uint32_t tenms;
372	hp_sdc_transaction t;
373	uint8_t tseq[6] = {
374		HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
375		0, 3, 0, 0, 0
376	};
377
378	t.endidx = 6;
379
380	if (0xffffff < setto->tv_sec) return -1;
381	tenms  = setto->tv_sec * 100;
382	if (0xffffff < setto->tv_usec / 10000) return -1;
383	tenms += setto->tv_usec / 10000;
384	if (tenms > 0xffffff) return -1;
385
386	tseq[1] = setcmd;
387	tseq[3] = (uint8_t)(tenms & 0xff);
388	tseq[4] = (uint8_t)((tenms >> 8)  & 0xff);
389	tseq[5] = (uint8_t)((tenms >> 16)  & 0xff);
390
391	t.seq =			tseq;
392
393	if (hp_sdc_enqueue_transaction(&t)) {
394		return -1;
395	}
396	return 0;
397}
398#endif
399
400static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf,
401			       size_t count, loff_t *ppos) {
402	ssize_t retval;
403
404        if (count < sizeof(unsigned long))
405                return -EINVAL;
406
407	retval = put_user(68, (unsigned long __user *)buf);
408	return retval;
409}
410
411static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait)
412{
413        unsigned long l;
414
415	l = 0;
416        if (l != 0)
417                return POLLIN | POLLRDNORM;
418        return 0;
419}
420
421static int hp_sdc_rtc_open(struct inode *inode, struct file *file)
422{
423        return 0;
424}
425
426static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on)
427{
428        return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue);
429}
430
431static int hp_sdc_rtc_proc_show(struct seq_file *m, void *v)
432{
433#define YN(bit) ("no")
434#define NY(bit) ("yes")
435        struct rtc_time tm;
436	struct timespec64 tv;
437
438	memset(&tm, 0, sizeof(struct rtc_time));
439
440	if (hp_sdc_rtc_read_bbrtc(&tm)) {
441		seq_puts(m, "BBRTC\t\t: READ FAILED!\n");
442	} else {
443		seq_printf(m,
444			     "rtc_time\t: %02d:%02d:%02d\n"
445			     "rtc_date\t: %04d-%02d-%02d\n"
446			     "rtc_epoch\t: %04lu\n",
447			     tm.tm_hour, tm.tm_min, tm.tm_sec,
448			     tm.tm_year + 1900, tm.tm_mon + 1,
449			     tm.tm_mday, epoch);
450	}
451
452	if (hp_sdc_rtc_read_rt(&tv)) {
453		seq_puts(m, "i8042 rtc\t: READ FAILED!\n");
454	} else {
455		seq_printf(m, "i8042 rtc\t: %lld.%02ld seconds\n",
456			     (s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
457	}
458
459	if (hp_sdc_rtc_read_fhs(&tv)) {
460		seq_puts(m, "handshake\t: READ FAILED!\n");
461	} else {
462		seq_printf(m, "handshake\t: %lld.%02ld seconds\n",
463			     (s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
464	}
465
466	if (hp_sdc_rtc_read_mt(&tv)) {
467		seq_puts(m, "alarm\t\t: READ FAILED!\n");
468	} else {
469		seq_printf(m, "alarm\t\t: %lld.%02ld seconds\n",
470			     (s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
471	}
472
473	if (hp_sdc_rtc_read_dt(&tv)) {
474		seq_puts(m, "delay\t\t: READ FAILED!\n");
475	} else {
476		seq_printf(m, "delay\t\t: %lld.%02ld seconds\n",
477			     (s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
478	}
479
480	if (hp_sdc_rtc_read_ct(&tv)) {
481		seq_puts(m, "periodic\t: READ FAILED!\n");
482	} else {
483		seq_printf(m, "periodic\t: %lld.%02ld seconds\n",
484			     (s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
485	}
486
487        seq_printf(m,
488                     "DST_enable\t: %s\n"
489                     "BCD\t\t: %s\n"
490                     "24hr\t\t: %s\n"
491                     "square_wave\t: %s\n"
492                     "alarm_IRQ\t: %s\n"
493                     "update_IRQ\t: %s\n"
494                     "periodic_IRQ\t: %s\n"
495		     "periodic_freq\t: %ld\n"
496                     "batt_status\t: %s\n",
497                     YN(RTC_DST_EN),
498                     NY(RTC_DM_BINARY),
499                     YN(RTC_24H),
500                     YN(RTC_SQWE),
501                     YN(RTC_AIE),
502                     YN(RTC_UIE),
503                     YN(RTC_PIE),
504                     1UL,
505                     1 ? "okay" : "dead");
506
507        return 0;
508#undef YN
509#undef NY
510}
511
512static int hp_sdc_rtc_proc_open(struct inode *inode, struct file *file)
513{
514	return single_open(file, hp_sdc_rtc_proc_show, NULL);
515}
516
517static const struct file_operations hp_sdc_rtc_proc_fops = {
518	.open		= hp_sdc_rtc_proc_open,
519	.read		= seq_read,
520	.llseek		= seq_lseek,
521	.release	= single_release,
522};
523
524static int hp_sdc_rtc_ioctl(struct file *file,
525			    unsigned int cmd, unsigned long arg)
526{
527#if 1
528	return -EINVAL;
529#else
530
531        struct rtc_time wtime;
532	struct timeval ttime;
533	int use_wtime = 0;
534
535	/* This needs major work. */
536
537        switch (cmd) {
538
539        case RTC_AIE_OFF:       /* Mask alarm int. enab. bit    */
540        case RTC_AIE_ON:        /* Allow alarm interrupts.      */
541	case RTC_PIE_OFF:       /* Mask periodic int. enab. bit */
542        case RTC_PIE_ON:        /* Allow periodic ints          */
543        case RTC_UIE_ON:        /* Allow ints for RTC updates.  */
544        case RTC_UIE_OFF:       /* Allow ints for RTC updates.  */
545        {
546		/* We cannot mask individual user timers and we
547		   cannot tell them apart when they occur, so it
548		   would be disingenuous to succeed these IOCTLs */
549		return -EINVAL;
550        }
551        case RTC_ALM_READ:      /* Read the present alarm time */
552        {
553		if (hp_sdc_rtc_read_mt(&ttime)) return -EFAULT;
554		if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
555
556		wtime.tm_hour = ttime.tv_sec / 3600;  ttime.tv_sec %= 3600;
557		wtime.tm_min  = ttime.tv_sec / 60;    ttime.tv_sec %= 60;
558		wtime.tm_sec  = ttime.tv_sec;
559
560		break;
561        }
562        case RTC_IRQP_READ:     /* Read the periodic IRQ rate.  */
563        {
564                return put_user(hp_sdc_rtc_freq, (unsigned long *)arg);
565        }
566        case RTC_IRQP_SET:      /* Set periodic IRQ rate.       */
567        {
568                /*
569                 * The max we can do is 100Hz.
570		 */
571
572                if ((arg < 1) || (arg > 100)) return -EINVAL;
573		ttime.tv_sec = 0;
574		ttime.tv_usec = 1000000 / arg;
575		if (hp_sdc_rtc_set_ct(&ttime)) return -EFAULT;
576		hp_sdc_rtc_freq = arg;
577                return 0;
578        }
579        case RTC_ALM_SET:       /* Store a time into the alarm */
580        {
581                /*
582                 * This expects a struct hp_sdc_rtc_time. Writing 0xff means
583                 * "don't care" or "match all" for PC timers.  The HP SDC
584		 * does not support that perk, but it could be emulated fairly
585		 * easily.  Only the tm_hour, tm_min and tm_sec are used.
586		 * We could do it with 10ms accuracy with the HP SDC, if the
587		 * rtc interface left us a way to do that.
588                 */
589                struct hp_sdc_rtc_time alm_tm;
590
591                if (copy_from_user(&alm_tm, (struct hp_sdc_rtc_time*)arg,
592                                   sizeof(struct hp_sdc_rtc_time)))
593                       return -EFAULT;
594
595                if (alm_tm.tm_hour > 23) return -EINVAL;
596		if (alm_tm.tm_min  > 59) return -EINVAL;
597		if (alm_tm.tm_sec  > 59) return -EINVAL;
598
599		ttime.sec = alm_tm.tm_hour * 3600 +
600		  alm_tm.tm_min * 60 + alm_tm.tm_sec;
601		ttime.usec = 0;
602		if (hp_sdc_rtc_set_mt(&ttime)) return -EFAULT;
603                return 0;
604        }
605        case RTC_RD_TIME:       /* Read the time/date from RTC  */
606        {
607		if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
608                break;
609        }
610        case RTC_SET_TIME:      /* Set the RTC */
611        {
612                struct rtc_time hp_sdc_rtc_tm;
613                unsigned char mon, day, hrs, min, sec, leap_yr;
614                unsigned int yrs;
615
616                if (!capable(CAP_SYS_TIME))
617                        return -EACCES;
618		if (copy_from_user(&hp_sdc_rtc_tm, (struct rtc_time *)arg,
619                                   sizeof(struct rtc_time)))
620                        return -EFAULT;
621
622                yrs = hp_sdc_rtc_tm.tm_year + 1900;
623                mon = hp_sdc_rtc_tm.tm_mon + 1;   /* tm_mon starts at zero */
624                day = hp_sdc_rtc_tm.tm_mday;
625                hrs = hp_sdc_rtc_tm.tm_hour;
626                min = hp_sdc_rtc_tm.tm_min;
627                sec = hp_sdc_rtc_tm.tm_sec;
628
629                if (yrs < 1970)
630                        return -EINVAL;
631
632                leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
633
634                if ((mon > 12) || (day == 0))
635                        return -EINVAL;
636                if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
637                        return -EINVAL;
638		if ((hrs >= 24) || (min >= 60) || (sec >= 60))
639                        return -EINVAL;
640
641                if ((yrs -= eH) > 255)    /* They are unsigned */
642                        return -EINVAL;
643
644
645                return 0;
646        }
647        case RTC_EPOCH_READ:    /* Read the epoch.      */
648        {
649                return put_user (epoch, (unsigned long *)arg);
650        }
651        case RTC_EPOCH_SET:     /* Set the epoch.       */
652        {
653                /*
654                 * There were no RTC clocks before 1900.
655                 */
656                if (arg < 1900)
657		  return -EINVAL;
658		if (!capable(CAP_SYS_TIME))
659		  return -EACCES;
660
661                epoch = arg;
662                return 0;
663        }
664        default:
665                return -EINVAL;
666        }
667        return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0;
668#endif
669}
670
671static long hp_sdc_rtc_unlocked_ioctl(struct file *file,
672				      unsigned int cmd, unsigned long arg)
673{
674	int ret;
675
676	mutex_lock(&hp_sdc_rtc_mutex);
677	ret = hp_sdc_rtc_ioctl(file, cmd, arg);
678	mutex_unlock(&hp_sdc_rtc_mutex);
679
680	return ret;
681}
682
683
684static const struct file_operations hp_sdc_rtc_fops = {
685        .owner =		THIS_MODULE,
686        .llseek =		no_llseek,
687        .read =			hp_sdc_rtc_read,
688        .poll =			hp_sdc_rtc_poll,
689        .unlocked_ioctl =	hp_sdc_rtc_unlocked_ioctl,
690        .open =			hp_sdc_rtc_open,
691        .fasync =		hp_sdc_rtc_fasync,
692};
693
694static struct miscdevice hp_sdc_rtc_dev = {
695        .minor =	RTC_MINOR,
696        .name =		"rtc_HIL",
697        .fops =		&hp_sdc_rtc_fops
698};
699
700static int __init hp_sdc_rtc_init(void)
701{
702	int ret;
703
704#ifdef __mc68000__
705	if (!MACH_IS_HP300)
706		return -ENODEV;
707#endif
708
709	sema_init(&i8042tregs, 1);
710
711	if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr)))
712		return ret;
713	if (misc_register(&hp_sdc_rtc_dev) != 0)
714		printk(KERN_INFO "Could not register misc. dev for i8042 rtc\n");
715
716        proc_create("driver/rtc", 0, NULL, &hp_sdc_rtc_proc_fops);
717
718	printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded "
719			 "(RTC v " RTC_VERSION ")\n");
720
721	return 0;
722}
723
724static void __exit hp_sdc_rtc_exit(void)
725{
726	remove_proc_entry ("driver/rtc", NULL);
727        misc_deregister(&hp_sdc_rtc_dev);
728	hp_sdc_release_timer_irq(hp_sdc_rtc_isr);
729        printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n");
730}
731
732module_init(hp_sdc_rtc_init);
733module_exit(hp_sdc_rtc_exit);
734