1/*
2 * Copyright 2010 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 *     Alex Deucher <alexander.deucher@amd.com>
25 */
26
27#include <linux/bug.h>
28#include <linux/types.h>
29#include <linux/kernel.h>
30
31/*
32 * evergreen cards need to use the 3D engine to blit data which requires
33 * quite a bit of hw state setup.  Rather than pull the whole 3D driver
34 * (which normally generates the 3D state) into the DRM, we opt to use
35 * statically generated state tables.  The register state and shaders
36 * were hand generated to support blitting functionality.  See the 3D
37 * driver or documentation for descriptions of the registers and
38 * shader instructions.
39 */
40
41const u32 evergreen_default_state[] =
42{
43	0xc0016900,
44	0x0000023b,
45	0x00000000, /* SQ_LDS_ALLOC_PS */
46
47	0xc0066900,
48	0x00000240,
49	0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
50	0x00000000,
51	0x00000000,
52	0x00000000,
53	0x00000000,
54	0x00000000,
55
56	0xc0046900,
57	0x00000247,
58	0x00000000, /* SQ_GS_VERT_ITEMSIZE */
59	0x00000000,
60	0x00000000,
61	0x00000000,
62
63	0xc0026900,
64	0x00000010,
65	0x00000000, /* DB_Z_INFO */
66	0x00000000, /* DB_STENCIL_INFO */
67
68	0xc0016900,
69	0x00000200,
70	0x00000000, /* DB_DEPTH_CONTROL */
71
72	0xc0066900,
73	0x00000000,
74	0x00000060, /* DB_RENDER_CONTROL */
75	0x00000000, /* DB_COUNT_CONTROL */
76	0x00000000, /* DB_DEPTH_VIEW */
77	0x0000002a, /* DB_RENDER_OVERRIDE */
78	0x00000000, /* DB_RENDER_OVERRIDE2 */
79	0x00000000, /* DB_HTILE_DATA_BASE */
80
81	0xc0026900,
82	0x0000000a,
83	0x00000000, /* DB_STENCIL_CLEAR */
84	0x00000000, /* DB_DEPTH_CLEAR */
85
86	0xc0016900,
87	0x000002dc,
88	0x0000aa00, /* DB_ALPHA_TO_MASK */
89
90	0xc0016900,
91	0x00000080,
92	0x00000000, /* PA_SC_WINDOW_OFFSET */
93
94	0xc00d6900,
95	0x00000083,
96	0x0000ffff, /* PA_SC_CLIPRECT_RULE */
97	0x00000000, /* PA_SC_CLIPRECT_0_TL */
98	0x20002000, /* PA_SC_CLIPRECT_0_BR */
99	0x00000000,
100	0x20002000,
101	0x00000000,
102	0x20002000,
103	0x00000000,
104	0x20002000,
105	0xaaaaaaaa, /* PA_SC_EDGERULE */
106	0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */
107	0x0000000f, /* CB_TARGET_MASK */
108	0x0000000f, /* CB_SHADER_MASK */
109
110	0xc0226900,
111	0x00000094,
112	0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
113	0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
114	0x80000000,
115	0x20002000,
116	0x80000000,
117	0x20002000,
118	0x80000000,
119	0x20002000,
120	0x80000000,
121	0x20002000,
122	0x80000000,
123	0x20002000,
124	0x80000000,
125	0x20002000,
126	0x80000000,
127	0x20002000,
128	0x80000000,
129	0x20002000,
130	0x80000000,
131	0x20002000,
132	0x80000000,
133	0x20002000,
134	0x80000000,
135	0x20002000,
136	0x80000000,
137	0x20002000,
138	0x80000000,
139	0x20002000,
140	0x80000000,
141	0x20002000,
142	0x80000000,
143	0x20002000,
144	0x00000000, /* PA_SC_VPORT_ZMIN_0 */
145	0x3f800000, /* PA_SC_VPORT_ZMAX_0 */
146
147	0xc0016900,
148	0x000000d4,
149	0x00000000, /* SX_MISC */
150
151	0xc0026900,
152	0x00000292,
153	0x00000000, /* PA_SC_MODE_CNTL_0 */
154	0x00000000, /* PA_SC_MODE_CNTL_1 */
155
156	0xc0106900,
157	0x00000300,
158	0x00000000, /* PA_SC_LINE_CNTL */
159	0x00000000, /* PA_SC_AA_CONFIG */
160	0x00000005, /* PA_SU_VTX_CNTL */
161	0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
162	0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */
163	0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */
164	0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */
165	0x00000000, /* PA_SC_AA_SAMPLE_LOCS_0 */
166	0x00000000, /*  */
167	0x00000000, /*  */
168	0x00000000, /*  */
169	0x00000000, /*  */
170	0x00000000, /*  */
171	0x00000000, /*  */
172	0x00000000, /* PA_SC_AA_SAMPLE_LOCS_7 */
173	0xffffffff, /* PA_SC_AA_MASK */
174
175	0xc00d6900,
176	0x00000202,
177	0x00cc0010, /* CB_COLOR_CONTROL */
178	0x00000210, /* DB_SHADER_CONTROL */
179	0x00010000, /* PA_CL_CLIP_CNTL */
180	0x00000004, /* PA_SU_SC_MODE_CNTL */
181	0x00000100, /* PA_CL_VTE_CNTL */
182	0x00000000, /* PA_CL_VS_OUT_CNTL */
183	0x00000000, /* PA_CL_NANINF_CNTL */
184	0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */
185	0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */
186	0x00000000, /* PA_SU_PRIM_FILTER_CNTL */
187	0x00000000, /*  */
188	0x00000000, /*  */
189	0x00000000, /* SQ_DYN_GPR_RESOURCE_LIMIT_1 */
190
191	0xc0066900,
192	0x000002de,
193	0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
194	0x00000000, /*  */
195	0x00000000, /*  */
196	0x00000000, /*  */
197	0x00000000, /*  */
198	0x00000000, /*  */
199
200	0xc0016900,
201	0x00000229,
202	0x00000000, /* SQ_PGM_START_FS */
203
204	0xc0016900,
205	0x0000022a,
206	0x00000000, /* SQ_PGM_RESOURCES_FS */
207
208	0xc0096900,
209	0x00000100,
210	0x00ffffff, /* VGT_MAX_VTX_INDX */
211	0x00000000, /*  */
212	0x00000000, /*  */
213	0x00000000, /*  */
214	0x00000000, /* SX_ALPHA_TEST_CONTROL */
215	0x00000000, /* CB_BLEND_RED */
216	0x00000000, /* CB_BLEND_GREEN */
217	0x00000000, /* CB_BLEND_BLUE */
218	0x00000000, /* CB_BLEND_ALPHA */
219
220	0xc0026900,
221	0x000002a8,
222	0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
223	0x00000000, /*  */
224
225	0xc0026900,
226	0x000002ad,
227	0x00000000, /* VGT_REUSE_OFF */
228	0x00000000, /*  */
229
230	0xc0116900,
231	0x00000280,
232	0x00000000, /* PA_SU_POINT_SIZE */
233	0x00000000, /* PA_SU_POINT_MINMAX */
234	0x00000008, /* PA_SU_LINE_CNTL */
235	0x00000000, /* PA_SC_LINE_STIPPLE */
236	0x00000000, /* VGT_OUTPUT_PATH_CNTL */
237	0x00000000, /* VGT_HOS_CNTL */
238	0x00000000, /*  */
239	0x00000000, /*  */
240	0x00000000, /*  */
241	0x00000000, /*  */
242	0x00000000, /*  */
243	0x00000000, /*  */
244	0x00000000, /*  */
245	0x00000000, /*  */
246	0x00000000, /*  */
247	0x00000000, /*  */
248	0x00000000, /* VGT_GS_MODE */
249
250	0xc0016900,
251	0x000002a1,
252	0x00000000, /* VGT_PRIMITIVEID_EN */
253
254	0xc0016900,
255	0x000002a5,
256	0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */
257
258	0xc0016900,
259	0x000002d5,
260	0x00000000, /* VGT_SHADER_STAGES_EN */
261
262	0xc0026900,
263	0x000002e5,
264	0x00000000, /* VGT_STRMOUT_CONFIG */
265	0x00000000, /*  */
266
267	0xc0016900,
268	0x000001e0,
269	0x00000000, /* CB_BLEND0_CONTROL */
270
271	0xc0016900,
272	0x000001b1,
273	0x00000000, /* SPI_VS_OUT_CONFIG */
274
275	0xc0016900,
276	0x00000187,
277	0x00000000, /* SPI_VS_OUT_ID_0 */
278
279	0xc0016900,
280	0x00000191,
281	0x00000100, /* SPI_PS_INPUT_CNTL_0 */
282
283	0xc00b6900,
284	0x000001b3,
285	0x20000001, /* SPI_PS_IN_CONTROL_0 */
286	0x00000000, /* SPI_PS_IN_CONTROL_1 */
287	0x00000000, /* SPI_INTERP_CONTROL_0 */
288	0x00000000, /* SPI_INPUT_Z */
289	0x00000000, /* SPI_FOG_CNTL */
290	0x00100000, /* SPI_BARYC_CNTL */
291	0x00000000, /* SPI_PS_IN_CONTROL_2 */
292	0x00000000, /*  */
293	0x00000000, /*  */
294	0x00000000, /*  */
295	0x00000000, /*  */
296
297	0xc0026900,
298	0x00000316,
299	0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */
300	0x00000010, /*  */
301};
302
303const u32 evergreen_default_size = ARRAY_SIZE(evergreen_default_state);
304