1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24#include "priv.h"
25#include "regsnv04.h"
26
27void
28nv04_timer_time(struct nvkm_timer *tmr, u64 time)
29{
30	struct nvkm_subdev *subdev = &tmr->subdev;
31	struct nvkm_device *device = subdev->device;
32	u32 hi = upper_32_bits(time);
33	u32 lo = lower_32_bits(time);
34
35	nvkm_debug(subdev, "time low        : %08x\n", lo);
36	nvkm_debug(subdev, "time high       : %08x\n", hi);
37
38	nvkm_wr32(device, NV04_PTIMER_TIME_1, hi);
39	nvkm_wr32(device, NV04_PTIMER_TIME_0, lo);
40}
41
42u64
43nv04_timer_read(struct nvkm_timer *tmr)
44{
45	struct nvkm_device *device = tmr->subdev.device;
46	u32 hi, lo;
47
48	do {
49		hi = nvkm_rd32(device, NV04_PTIMER_TIME_1);
50		lo = nvkm_rd32(device, NV04_PTIMER_TIME_0);
51	} while (hi != nvkm_rd32(device, NV04_PTIMER_TIME_1));
52
53	return ((u64)hi << 32 | lo);
54}
55
56void
57nv04_timer_alarm_fini(struct nvkm_timer *tmr)
58{
59	struct nvkm_device *device = tmr->subdev.device;
60	nvkm_wr32(device, NV04_PTIMER_INTR_EN_0, 0x00000000);
61}
62
63void
64nv04_timer_alarm_init(struct nvkm_timer *tmr, u32 time)
65{
66	struct nvkm_device *device = tmr->subdev.device;
67	nvkm_wr32(device, NV04_PTIMER_ALARM_0, time);
68	nvkm_wr32(device, NV04_PTIMER_INTR_EN_0, 0x00000001);
69}
70
71void
72nv04_timer_intr(struct nvkm_timer *tmr)
73{
74	struct nvkm_subdev *subdev = &tmr->subdev;
75	struct nvkm_device *device = subdev->device;
76	u32 stat = nvkm_rd32(device, NV04_PTIMER_INTR_0);
77
78	if (stat & 0x00000001) {
79		nvkm_timer_alarm_trigger(tmr);
80		nvkm_wr32(device, NV04_PTIMER_INTR_0, 0x00000001);
81		stat &= ~0x00000001;
82	}
83
84	if (stat) {
85		nvkm_error(subdev, "intr %08x\n", stat);
86		nvkm_wr32(device, NV04_PTIMER_INTR_0, stat);
87	}
88}
89
90static void
91nv04_timer_init(struct nvkm_timer *tmr)
92{
93	struct nvkm_subdev *subdev = &tmr->subdev;
94	struct nvkm_device *device = subdev->device;
95	u32 f = 0; /*XXX: nvclk */
96	u32 n, d;
97
98	/* aim for 31.25MHz, which gives us nanosecond timestamps */
99	d = 1000000 / 32;
100	n = f;
101
102	if (!f) {
103		n = nvkm_rd32(device, NV04_PTIMER_NUMERATOR);
104		d = nvkm_rd32(device, NV04_PTIMER_DENOMINATOR);
105		if (!n || !d) {
106			n = 1;
107			d = 1;
108		}
109		nvkm_warn(subdev, "unknown input clock freq\n");
110	}
111
112	/* reduce ratio to acceptable values */
113	while (((n % 5) == 0) && ((d % 5) == 0)) {
114		n /= 5;
115		d /= 5;
116	}
117
118	while (((n % 2) == 0) && ((d % 2) == 0)) {
119		n /= 2;
120		d /= 2;
121	}
122
123	while (n > 0xffff || d > 0xffff) {
124		n >>= 1;
125		d >>= 1;
126	}
127
128	nvkm_debug(subdev, "input frequency : %dHz\n", f);
129	nvkm_debug(subdev, "numerator       : %08x\n", n);
130	nvkm_debug(subdev, "denominator     : %08x\n", d);
131	nvkm_debug(subdev, "timer frequency : %dHz\n", f * d / n);
132
133	nvkm_wr32(device, NV04_PTIMER_NUMERATOR, n);
134	nvkm_wr32(device, NV04_PTIMER_DENOMINATOR, d);
135}
136
137static const struct nvkm_timer_func
138nv04_timer = {
139	.init = nv04_timer_init,
140	.intr = nv04_timer_intr,
141	.read = nv04_timer_read,
142	.time = nv04_timer_time,
143	.alarm_init = nv04_timer_alarm_init,
144	.alarm_fini = nv04_timer_alarm_fini,
145};
146
147int
148nv04_timer_new(struct nvkm_device *device, int index, struct nvkm_timer **ptmr)
149{
150	return nvkm_timer_new_(&nv04_timer, device, index, ptmr);
151}
152