1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24#include "dmacnv50.h"
25#include "rootnv50.h"
26
27#include <core/ramht.h>
28#include <subdev/timer.h>
29
30int
31gf119_disp_dmac_bind(struct nv50_disp_dmac *chan,
32		     struct nvkm_object *object, u32 handle)
33{
34	return nvkm_ramht_insert(chan->base.root->ramht, object,
35				 chan->base.chid, -9, handle,
36				 chan->base.chid << 27 | 0x00000001);
37}
38
39static void
40gf119_disp_dmac_fini(struct nv50_disp_dmac *chan)
41{
42	struct nv50_disp *disp = chan->base.root->disp;
43	struct nvkm_subdev *subdev = &disp->base.engine.subdev;
44	struct nvkm_device *device = subdev->device;
45	int chid = chan->base.chid;
46
47	/* deactivate channel */
48	nvkm_mask(device, 0x610490 + (chid * 0x0010), 0x00001010, 0x00001000);
49	nvkm_mask(device, 0x610490 + (chid * 0x0010), 0x00000003, 0x00000000);
50	if (nvkm_msec(device, 2000,
51		if (!(nvkm_rd32(device, 0x610490 + (chid * 0x10)) & 0x001e0000))
52			break;
53	) < 0) {
54		nvkm_error(subdev, "ch %d fini: %08x\n", chid,
55			   nvkm_rd32(device, 0x610490 + (chid * 0x10)));
56	}
57
58	/* disable error reporting and completion notification */
59	nvkm_mask(device, 0x610090, 0x00000001 << chid, 0x00000000);
60	nvkm_mask(device, 0x6100a0, 0x00000001 << chid, 0x00000000);
61}
62
63static int
64gf119_disp_dmac_init(struct nv50_disp_dmac *chan)
65{
66	struct nv50_disp *disp = chan->base.root->disp;
67	struct nvkm_subdev *subdev = &disp->base.engine.subdev;
68	struct nvkm_device *device = subdev->device;
69	int chid = chan->base.chid;
70
71	/* enable error reporting */
72	nvkm_mask(device, 0x6100a0, 0x00000001 << chid, 0x00000001 << chid);
73
74	/* initialise channel for dma command submission */
75	nvkm_wr32(device, 0x610494 + (chid * 0x0010), chan->push);
76	nvkm_wr32(device, 0x610498 + (chid * 0x0010), 0x00010000);
77	nvkm_wr32(device, 0x61049c + (chid * 0x0010), 0x00000001);
78	nvkm_mask(device, 0x610490 + (chid * 0x0010), 0x00000010, 0x00000010);
79	nvkm_wr32(device, 0x640000 + (chid * 0x1000), 0x00000000);
80	nvkm_wr32(device, 0x610490 + (chid * 0x0010), 0x00000013);
81
82	/* wait for it to go inactive */
83	if (nvkm_msec(device, 2000,
84		if (!(nvkm_rd32(device, 0x610490 + (chid * 0x10)) & 0x80000000))
85			break;
86	) < 0) {
87		nvkm_error(subdev, "ch %d init: %08x\n", chid,
88			   nvkm_rd32(device, 0x610490 + (chid * 0x10)));
89		return -EBUSY;
90	}
91
92	return 0;
93}
94
95const struct nv50_disp_dmac_func
96gf119_disp_dmac_func = {
97	.init = gf119_disp_dmac_init,
98	.fini = gf119_disp_dmac_fini,
99	.bind = gf119_disp_dmac_bind,
100};
101