1/*
2 * Xilinx gpio driver for xps/axi_gpio IP.
3 *
4 * Copyright 2008 - 2013 Xilinx, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program; if not, write to the Free Software
12 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
13 */
14
15#include <linux/bitops.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/module.h>
19#include <linux/of_device.h>
20#include <linux/of_platform.h>
21#include <linux/of_gpio.h>
22#include <linux/io.h>
23#include <linux/gpio.h>
24#include <linux/slab.h>
25
26/* Register Offset Definitions */
27#define XGPIO_DATA_OFFSET   (0x0)	/* Data register  */
28#define XGPIO_TRI_OFFSET    (0x4)	/* I/O direction register  */
29
30#define XGPIO_CHANNEL_OFFSET	0x8
31
32/* Read/Write access to the GPIO registers */
33#if defined(CONFIG_ARCH_ZYNQ) || defined(CONFIG_X86)
34# define xgpio_readreg(offset)		readl(offset)
35# define xgpio_writereg(offset, val)	writel(val, offset)
36#else
37# define xgpio_readreg(offset)		__raw_readl(offset)
38# define xgpio_writereg(offset, val)	__raw_writel(val, offset)
39#endif
40
41/**
42 * struct xgpio_instance - Stores information about GPIO device
43 * @mmchip: OF GPIO chip for memory mapped banks
44 * @gpio_width: GPIO width for every channel
45 * @gpio_state: GPIO state shadow register
46 * @gpio_dir: GPIO direction shadow register
47 * @gpio_lock: Lock used for synchronization
48 */
49struct xgpio_instance {
50	struct of_mm_gpio_chip mmchip;
51	unsigned int gpio_width[2];
52	u32 gpio_state[2];
53	u32 gpio_dir[2];
54	spinlock_t gpio_lock[2];
55};
56
57static inline int xgpio_index(struct xgpio_instance *chip, int gpio)
58{
59	if (gpio >= chip->gpio_width[0])
60		return 1;
61
62	return 0;
63}
64
65static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio)
66{
67	if (xgpio_index(chip, gpio))
68		return XGPIO_CHANNEL_OFFSET;
69
70	return 0;
71}
72
73static inline int xgpio_offset(struct xgpio_instance *chip, int gpio)
74{
75	if (xgpio_index(chip, gpio))
76		return gpio - chip->gpio_width[0];
77
78	return gpio;
79}
80
81/**
82 * xgpio_get - Read the specified signal of the GPIO device.
83 * @gc:     Pointer to gpio_chip device structure.
84 * @gpio:   GPIO signal number.
85 *
86 * This function reads the specified signal of the GPIO device.
87 *
88 * Return:
89 * 0 if direction of GPIO signals is set as input otherwise it
90 * returns negative error value.
91 */
92static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
93{
94	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
95	struct xgpio_instance *chip =
96	    container_of(mm_gc, struct xgpio_instance, mmchip);
97	u32 val;
98
99	val = xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET +
100			    xgpio_regoffset(chip, gpio));
101
102	return !!(val & BIT(xgpio_offset(chip, gpio)));
103}
104
105/**
106 * xgpio_set - Write the specified signal of the GPIO device.
107 * @gc:     Pointer to gpio_chip device structure.
108 * @gpio:   GPIO signal number.
109 * @val:    Value to be written to specified signal.
110 *
111 * This function writes the specified value in to the specified signal of the
112 * GPIO device.
113 */
114static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
115{
116	unsigned long flags;
117	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
118	struct xgpio_instance *chip =
119	    container_of(mm_gc, struct xgpio_instance, mmchip);
120	int index =  xgpio_index(chip, gpio);
121	int offset =  xgpio_offset(chip, gpio);
122
123	spin_lock_irqsave(&chip->gpio_lock[index], flags);
124
125	/* Write to GPIO signal and set its direction to output */
126	if (val)
127		chip->gpio_state[index] |= BIT(offset);
128	else
129		chip->gpio_state[index] &= ~BIT(offset);
130
131	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
132		       xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
133
134	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
135}
136
137/**
138 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
139 * @gc:     Pointer to gpio_chip device structure.
140 * @gpio:   GPIO signal number.
141 *
142 * Return:
143 * 0 - if direction of GPIO signals is set as input
144 * otherwise it returns negative error value.
145 */
146static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
147{
148	unsigned long flags;
149	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
150	struct xgpio_instance *chip =
151	    container_of(mm_gc, struct xgpio_instance, mmchip);
152	int index =  xgpio_index(chip, gpio);
153	int offset =  xgpio_offset(chip, gpio);
154
155	spin_lock_irqsave(&chip->gpio_lock[index], flags);
156
157	/* Set the GPIO bit in shadow register and set direction as input */
158	chip->gpio_dir[index] |= BIT(offset);
159	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
160		       xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
161
162	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
163
164	return 0;
165}
166
167/**
168 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
169 * @gc:     Pointer to gpio_chip device structure.
170 * @gpio:   GPIO signal number.
171 * @val:    Value to be written to specified signal.
172 *
173 * This function sets the direction of specified GPIO signal as output.
174 *
175 * Return:
176 * If all GPIO signals of GPIO chip is configured as input then it returns
177 * error otherwise it returns 0.
178 */
179static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
180{
181	unsigned long flags;
182	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
183	struct xgpio_instance *chip =
184	    container_of(mm_gc, struct xgpio_instance, mmchip);
185	int index =  xgpio_index(chip, gpio);
186	int offset =  xgpio_offset(chip, gpio);
187
188	spin_lock_irqsave(&chip->gpio_lock[index], flags);
189
190	/* Write state of GPIO signal */
191	if (val)
192		chip->gpio_state[index] |= BIT(offset);
193	else
194		chip->gpio_state[index] &= ~BIT(offset);
195	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
196			xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
197
198	/* Clear the GPIO bit in shadow register and set direction as output */
199	chip->gpio_dir[index] &= ~BIT(offset);
200	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
201			xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
202
203	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
204
205	return 0;
206}
207
208/**
209 * xgpio_save_regs - Set initial values of GPIO pins
210 * @mm_gc: Pointer to memory mapped GPIO chip structure
211 */
212static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
213{
214	struct xgpio_instance *chip =
215	    container_of(mm_gc, struct xgpio_instance, mmchip);
216
217	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET,	chip->gpio_state[0]);
218	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]);
219
220	if (!chip->gpio_width[1])
221		return;
222
223	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET,
224		       chip->gpio_state[1]);
225	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET,
226		       chip->gpio_dir[1]);
227}
228
229/**
230 * xgpio_remove - Remove method for the GPIO device.
231 * @pdev: pointer to the platform device
232 *
233 * This function remove gpiochips and frees all the allocated resources.
234 *
235 * Return: 0 always
236 */
237static int xgpio_remove(struct platform_device *pdev)
238{
239	struct xgpio_instance *chip = platform_get_drvdata(pdev);
240
241	of_mm_gpiochip_remove(&chip->mmchip);
242
243	return 0;
244}
245
246/**
247 * xgpio_of_probe - Probe method for the GPIO device.
248 * @pdev: pointer to the platform device
249 *
250 * Return:
251 * It returns 0, if the driver is bound to the GPIO device, or
252 * a negative value if there is an error.
253 */
254static int xgpio_probe(struct platform_device *pdev)
255{
256	struct xgpio_instance *chip;
257	int status = 0;
258	struct device_node *np = pdev->dev.of_node;
259	u32 is_dual;
260
261	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
262	if (!chip)
263		return -ENOMEM;
264
265	platform_set_drvdata(pdev, chip);
266
267	/* Update GPIO state shadow register with default value */
268	of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0]);
269
270	/* Update GPIO direction shadow register with default value */
271	if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0]))
272		chip->gpio_dir[0] = 0xFFFFFFFF;
273
274	/*
275	 * Check device node and parent device node for device width
276	 * and assume default width of 32
277	 */
278	if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))
279		chip->gpio_width[0] = 32;
280
281	spin_lock_init(&chip->gpio_lock[0]);
282
283	if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))
284		is_dual = 0;
285
286	if (is_dual) {
287		/* Update GPIO state shadow register with default value */
288		of_property_read_u32(np, "xlnx,dout-default-2",
289				     &chip->gpio_state[1]);
290
291		/* Update GPIO direction shadow register with default value */
292		if (of_property_read_u32(np, "xlnx,tri-default-2",
293					 &chip->gpio_dir[1]))
294			chip->gpio_dir[1] = 0xFFFFFFFF;
295
296		/*
297		 * Check device node and parent device node for device width
298		 * and assume default width of 32
299		 */
300		if (of_property_read_u32(np, "xlnx,gpio2-width",
301					 &chip->gpio_width[1]))
302			chip->gpio_width[1] = 32;
303
304		spin_lock_init(&chip->gpio_lock[1]);
305	}
306
307	chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
308	chip->mmchip.gc.dev = &pdev->dev;
309	chip->mmchip.gc.direction_input = xgpio_dir_in;
310	chip->mmchip.gc.direction_output = xgpio_dir_out;
311	chip->mmchip.gc.get = xgpio_get;
312	chip->mmchip.gc.set = xgpio_set;
313
314	chip->mmchip.save_regs = xgpio_save_regs;
315
316	/* Call the OF gpio helper to setup and register the GPIO device */
317	status = of_mm_gpiochip_add(np, &chip->mmchip);
318	if (status) {
319		pr_err("%s: error in probe function with status %d\n",
320		       np->full_name, status);
321		return status;
322	}
323
324	return 0;
325}
326
327static const struct of_device_id xgpio_of_match[] = {
328	{ .compatible = "xlnx,xps-gpio-1.00.a", },
329	{ /* end of list */ },
330};
331
332MODULE_DEVICE_TABLE(of, xgpio_of_match);
333
334static struct platform_driver xgpio_plat_driver = {
335	.probe		= xgpio_probe,
336	.remove		= xgpio_remove,
337	.driver		= {
338			.name = "gpio-xilinx",
339			.of_match_table	= xgpio_of_match,
340	},
341};
342
343static int __init xgpio_init(void)
344{
345	return platform_driver_register(&xgpio_plat_driver);
346}
347
348subsys_initcall(xgpio_init);
349
350static void __exit xgpio_exit(void)
351{
352	platform_driver_unregister(&xgpio_plat_driver);
353}
354module_exit(xgpio_exit);
355
356MODULE_AUTHOR("Xilinx, Inc.");
357MODULE_DESCRIPTION("Xilinx GPIO driver");
358MODULE_LICENSE("GPL");
359