1/*
2 * caam - Freescale FSL CAAM support for hw_random
3 *
4 * Copyright 2011 Freescale Semiconductor, Inc.
5 *
6 * Based on caamalg.c crypto API driver.
7 *
8 * relationship between job descriptors to shared descriptors:
9 *
10 * ---------------                     --------------
11 * | JobDesc #0  |-------------------->| ShareDesc  |
12 * | *(buffer 0) |      |------------->| (generate) |
13 * ---------------      |              | (move)     |
14 *                      |              | (store)    |
15 * ---------------      |              --------------
16 * | JobDesc #1  |------|
17 * | *(buffer 1) |
18 * ---------------
19 *
20 * A job desc looks like this:
21 *
22 * ---------------------
23 * | Header            |
24 * | ShareDesc Pointer |
25 * | SEQ_OUT_PTR       |
26 * | (output buffer)   |
27 * ---------------------
28 *
29 * The SharedDesc never changes, and each job descriptor points to one of two
30 * buffers for each device, from which the data will be copied into the
31 * requested destination
32 */
33
34#include <linux/hw_random.h>
35#include <linux/completion.h>
36#include <linux/atomic.h>
37
38#include "compat.h"
39
40#include "regs.h"
41#include "intern.h"
42#include "desc_constr.h"
43#include "jr.h"
44#include "error.h"
45
46/*
47 * Maximum buffer size: maximum number of random, cache-aligned bytes that
48 * will be generated and moved to seq out ptr (extlen not allowed)
49 */
50#define RN_BUF_SIZE			(0xffff / L1_CACHE_BYTES * \
51					 L1_CACHE_BYTES)
52
53/* length of descriptors */
54#define DESC_JOB_O_LEN			(CAAM_CMD_SZ * 2 + CAAM_PTR_SZ * 2)
55#define DESC_RNG_LEN			(4 * CAAM_CMD_SZ)
56
57/* Buffer, its dma address and lock */
58struct buf_data {
59	u8 buf[RN_BUF_SIZE] ____cacheline_aligned;
60	dma_addr_t addr;
61	struct completion filled;
62	u32 hw_desc[DESC_JOB_O_LEN];
63#define BUF_NOT_EMPTY 0
64#define BUF_EMPTY 1
65#define BUF_PENDING 2  /* Empty, but with job pending --don't submit another */
66	atomic_t empty;
67};
68
69/* rng per-device context */
70struct caam_rng_ctx {
71	struct device *jrdev;
72	dma_addr_t sh_desc_dma;
73	u32 sh_desc[DESC_RNG_LEN];
74	unsigned int cur_buf_idx;
75	int current_buf;
76	struct buf_data bufs[2];
77};
78
79static struct caam_rng_ctx *rng_ctx;
80
81static inline void rng_unmap_buf(struct device *jrdev, struct buf_data *bd)
82{
83	if (bd->addr)
84		dma_unmap_single(jrdev, bd->addr, RN_BUF_SIZE,
85				 DMA_FROM_DEVICE);
86}
87
88static inline void rng_unmap_ctx(struct caam_rng_ctx *ctx)
89{
90	struct device *jrdev = ctx->jrdev;
91
92	if (ctx->sh_desc_dma)
93		dma_unmap_single(jrdev, ctx->sh_desc_dma,
94				 desc_bytes(ctx->sh_desc), DMA_TO_DEVICE);
95	rng_unmap_buf(jrdev, &ctx->bufs[0]);
96	rng_unmap_buf(jrdev, &ctx->bufs[1]);
97}
98
99static void rng_done(struct device *jrdev, u32 *desc, u32 err, void *context)
100{
101	struct buf_data *bd;
102
103	bd = (struct buf_data *)((char *)desc -
104	      offsetof(struct buf_data, hw_desc));
105
106	if (err)
107		caam_jr_strstatus(jrdev, err);
108
109	atomic_set(&bd->empty, BUF_NOT_EMPTY);
110	complete(&bd->filled);
111
112	/* Buffer refilled, invalidate cache */
113	dma_sync_single_for_cpu(jrdev, bd->addr, RN_BUF_SIZE, DMA_FROM_DEVICE);
114
115#ifdef DEBUG
116	print_hex_dump(KERN_ERR, "rng refreshed buf@: ",
117		       DUMP_PREFIX_ADDRESS, 16, 4, bd->buf, RN_BUF_SIZE, 1);
118#endif
119}
120
121static inline int submit_job(struct caam_rng_ctx *ctx, int to_current)
122{
123	struct buf_data *bd = &ctx->bufs[!(to_current ^ ctx->current_buf)];
124	struct device *jrdev = ctx->jrdev;
125	u32 *desc = bd->hw_desc;
126	int err;
127
128	dev_dbg(jrdev, "submitting job %d\n", !(to_current ^ ctx->current_buf));
129	init_completion(&bd->filled);
130	err = caam_jr_enqueue(jrdev, desc, rng_done, ctx);
131	if (err)
132		complete(&bd->filled); /* don't wait on failed job*/
133	else
134		atomic_inc(&bd->empty); /* note if pending */
135
136	return err;
137}
138
139static int caam_read(struct hwrng *rng, void *data, size_t max, bool wait)
140{
141	struct caam_rng_ctx *ctx = rng_ctx;
142	struct buf_data *bd = &ctx->bufs[ctx->current_buf];
143	int next_buf_idx, copied_idx;
144	int err;
145
146	if (atomic_read(&bd->empty)) {
147		/* try to submit job if there wasn't one */
148		if (atomic_read(&bd->empty) == BUF_EMPTY) {
149			err = submit_job(ctx, 1);
150			/* if can't submit job, can't even wait */
151			if (err)
152				return 0;
153		}
154		/* no immediate data, so exit if not waiting */
155		if (!wait)
156			return 0;
157
158		/* waiting for pending job */
159		if (atomic_read(&bd->empty))
160			wait_for_completion(&bd->filled);
161	}
162
163	next_buf_idx = ctx->cur_buf_idx + max;
164	dev_dbg(ctx->jrdev, "%s: start reading at buffer %d, idx %d\n",
165		 __func__, ctx->current_buf, ctx->cur_buf_idx);
166
167	/* if enough data in current buffer */
168	if (next_buf_idx < RN_BUF_SIZE) {
169		memcpy(data, bd->buf + ctx->cur_buf_idx, max);
170		ctx->cur_buf_idx = next_buf_idx;
171		return max;
172	}
173
174	/* else, copy what's left... */
175	copied_idx = RN_BUF_SIZE - ctx->cur_buf_idx;
176	memcpy(data, bd->buf + ctx->cur_buf_idx, copied_idx);
177	ctx->cur_buf_idx = 0;
178	atomic_set(&bd->empty, BUF_EMPTY);
179
180	/* ...refill... */
181	submit_job(ctx, 1);
182
183	/* and use next buffer */
184	ctx->current_buf = !ctx->current_buf;
185	dev_dbg(ctx->jrdev, "switched to buffer %d\n", ctx->current_buf);
186
187	/* since there already is some data read, don't wait */
188	return copied_idx + caam_read(rng, data + copied_idx,
189				      max - copied_idx, false);
190}
191
192static inline int rng_create_sh_desc(struct caam_rng_ctx *ctx)
193{
194	struct device *jrdev = ctx->jrdev;
195	u32 *desc = ctx->sh_desc;
196
197	init_sh_desc(desc, HDR_SHARE_SERIAL);
198
199	/* Propagate errors from shared to job descriptor */
200	append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD);
201
202	/* Generate random bytes */
203	append_operation(desc, OP_ALG_ALGSEL_RNG | OP_TYPE_CLASS1_ALG);
204
205	/* Store bytes */
206	append_seq_fifo_store(desc, RN_BUF_SIZE, FIFOST_TYPE_RNGSTORE);
207
208	ctx->sh_desc_dma = dma_map_single(jrdev, desc, desc_bytes(desc),
209					  DMA_TO_DEVICE);
210	if (dma_mapping_error(jrdev, ctx->sh_desc_dma)) {
211		dev_err(jrdev, "unable to map shared descriptor\n");
212		return -ENOMEM;
213	}
214#ifdef DEBUG
215	print_hex_dump(KERN_ERR, "rng shdesc@: ", DUMP_PREFIX_ADDRESS, 16, 4,
216		       desc, desc_bytes(desc), 1);
217#endif
218	return 0;
219}
220
221static inline int rng_create_job_desc(struct caam_rng_ctx *ctx, int buf_id)
222{
223	struct device *jrdev = ctx->jrdev;
224	struct buf_data *bd = &ctx->bufs[buf_id];
225	u32 *desc = bd->hw_desc;
226	int sh_len = desc_len(ctx->sh_desc);
227
228	init_job_desc_shared(desc, ctx->sh_desc_dma, sh_len, HDR_SHARE_DEFER |
229			     HDR_REVERSE);
230
231	bd->addr = dma_map_single(jrdev, bd->buf, RN_BUF_SIZE, DMA_FROM_DEVICE);
232	if (dma_mapping_error(jrdev, bd->addr)) {
233		dev_err(jrdev, "unable to map dst\n");
234		return -ENOMEM;
235	}
236
237	append_seq_out_ptr_intlen(desc, bd->addr, RN_BUF_SIZE, 0);
238#ifdef DEBUG
239	print_hex_dump(KERN_ERR, "rng job desc@: ", DUMP_PREFIX_ADDRESS, 16, 4,
240		       desc, desc_bytes(desc), 1);
241#endif
242	return 0;
243}
244
245static void caam_cleanup(struct hwrng *rng)
246{
247	int i;
248	struct buf_data *bd;
249
250	for (i = 0; i < 2; i++) {
251		bd = &rng_ctx->bufs[i];
252		if (atomic_read(&bd->empty) == BUF_PENDING)
253			wait_for_completion(&bd->filled);
254	}
255
256	rng_unmap_ctx(rng_ctx);
257}
258
259static int caam_init_buf(struct caam_rng_ctx *ctx, int buf_id)
260{
261	struct buf_data *bd = &ctx->bufs[buf_id];
262	int err;
263
264	err = rng_create_job_desc(ctx, buf_id);
265	if (err)
266		return err;
267
268	atomic_set(&bd->empty, BUF_EMPTY);
269	submit_job(ctx, buf_id == ctx->current_buf);
270	wait_for_completion(&bd->filled);
271
272	return 0;
273}
274
275static int caam_init_rng(struct caam_rng_ctx *ctx, struct device *jrdev)
276{
277	int err;
278
279	ctx->jrdev = jrdev;
280
281	err = rng_create_sh_desc(ctx);
282	if (err)
283		return err;
284
285	ctx->current_buf = 0;
286	ctx->cur_buf_idx = 0;
287
288	err = caam_init_buf(ctx, 0);
289	if (err)
290		return err;
291
292	err = caam_init_buf(ctx, 1);
293	if (err)
294		return err;
295
296	return 0;
297}
298
299static struct hwrng caam_rng = {
300	.name		= "rng-caam",
301	.cleanup	= caam_cleanup,
302	.read		= caam_read,
303};
304
305static void __exit caam_rng_exit(void)
306{
307	caam_jr_free(rng_ctx->jrdev);
308	hwrng_unregister(&caam_rng);
309	kfree(rng_ctx);
310}
311
312static int __init caam_rng_init(void)
313{
314	struct device *dev;
315	struct device_node *dev_node;
316	struct platform_device *pdev;
317	struct device *ctrldev;
318	struct caam_drv_private *priv;
319	int err;
320
321	dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
322	if (!dev_node) {
323		dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec4.0");
324		if (!dev_node)
325			return -ENODEV;
326	}
327
328	pdev = of_find_device_by_node(dev_node);
329	if (!pdev) {
330		of_node_put(dev_node);
331		return -ENODEV;
332	}
333
334	ctrldev = &pdev->dev;
335	priv = dev_get_drvdata(ctrldev);
336	of_node_put(dev_node);
337
338	/*
339	 * If priv is NULL, it's probably because the caam driver wasn't
340	 * properly initialized (e.g. RNG4 init failed). Thus, bail out here.
341	 */
342	if (!priv)
343		return -ENODEV;
344
345	/* Check for an instantiated RNG before registration */
346	if (!(rd_reg32(&priv->ctrl->perfmon.cha_num_ls) & CHA_ID_LS_RNG_MASK))
347		return -ENODEV;
348
349	dev = caam_jr_alloc();
350	if (IS_ERR(dev)) {
351		pr_err("Job Ring Device allocation for transform failed\n");
352		return PTR_ERR(dev);
353	}
354	rng_ctx = kmalloc(sizeof(*rng_ctx), GFP_DMA);
355	if (!rng_ctx) {
356		err = -ENOMEM;
357		goto free_caam_alloc;
358	}
359	err = caam_init_rng(rng_ctx, dev);
360	if (err)
361		goto free_rng_ctx;
362
363	dev_info(dev, "registering rng-caam\n");
364	return hwrng_register(&caam_rng);
365
366free_rng_ctx:
367	kfree(rng_ctx);
368free_caam_alloc:
369	caam_jr_free(dev);
370	return err;
371}
372
373module_init(caam_rng_init);
374module_exit(caam_rng_exit);
375
376MODULE_LICENSE("GPL");
377MODULE_DESCRIPTION("FSL CAAM support for hw_random API");
378MODULE_AUTHOR("Freescale Semiconductor - NMG");
379