1/*
2 * RNG driver for Freescale RNGA
3 *
4 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Author: Alan Carvalho de Assis <acassis@gmail.com>
6 */
7
8/*
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
12 *
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
15 *
16 * This driver is based on other RNG drivers.
17 */
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/clk.h>
23#include <linux/err.h>
24#include <linux/ioport.h>
25#include <linux/platform_device.h>
26#include <linux/hw_random.h>
27#include <linux/delay.h>
28#include <linux/io.h>
29
30/* RNGA Registers */
31#define RNGA_CONTROL			0x00
32#define RNGA_STATUS			0x04
33#define RNGA_ENTROPY			0x08
34#define RNGA_OUTPUT_FIFO		0x0c
35#define RNGA_MODE			0x10
36#define RNGA_VERIFICATION_CONTROL	0x14
37#define RNGA_OSC_CONTROL_COUNTER	0x18
38#define RNGA_OSC1_COUNTER		0x1c
39#define RNGA_OSC2_COUNTER		0x20
40#define RNGA_OSC_COUNTER_STATUS		0x24
41
42/* RNGA Registers Range */
43#define RNG_ADDR_RANGE			0x28
44
45/* RNGA Control Register */
46#define RNGA_CONTROL_SLEEP		0x00000010
47#define RNGA_CONTROL_CLEAR_INT		0x00000008
48#define RNGA_CONTROL_MASK_INTS		0x00000004
49#define RNGA_CONTROL_HIGH_ASSURANCE	0x00000002
50#define RNGA_CONTROL_GO			0x00000001
51
52#define RNGA_STATUS_LEVEL_MASK		0x0000ff00
53
54/* RNGA Status Register */
55#define RNGA_STATUS_OSC_DEAD		0x80000000
56#define RNGA_STATUS_SLEEP		0x00000010
57#define RNGA_STATUS_ERROR_INT		0x00000008
58#define RNGA_STATUS_FIFO_UNDERFLOW	0x00000004
59#define RNGA_STATUS_LAST_READ_STATUS	0x00000002
60#define RNGA_STATUS_SECURITY_VIOLATION	0x00000001
61
62struct mxc_rng {
63	struct device *dev;
64	struct hwrng rng;
65	void __iomem *mem;
66	struct clk *clk;
67};
68
69static int mxc_rnga_data_present(struct hwrng *rng, int wait)
70{
71	int i;
72	struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
73
74	for (i = 0; i < 20; i++) {
75		/* how many random numbers are in FIFO? [0-16] */
76		int level = (__raw_readl(mxc_rng->mem + RNGA_STATUS) &
77				RNGA_STATUS_LEVEL_MASK) >> 8;
78		if (level || !wait)
79			return !!level;
80		udelay(10);
81	}
82	return 0;
83}
84
85static int mxc_rnga_data_read(struct hwrng *rng, u32 * data)
86{
87	int err;
88	u32 ctrl;
89	struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
90
91	/* retrieve a random number from FIFO */
92	*data = __raw_readl(mxc_rng->mem + RNGA_OUTPUT_FIFO);
93
94	/* some error while reading this random number? */
95	err = __raw_readl(mxc_rng->mem + RNGA_STATUS) & RNGA_STATUS_ERROR_INT;
96
97	/* if error: clear error interrupt, but doesn't return random number */
98	if (err) {
99		dev_dbg(mxc_rng->dev, "Error while reading random number!\n");
100		ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
101		__raw_writel(ctrl | RNGA_CONTROL_CLEAR_INT,
102					mxc_rng->mem + RNGA_CONTROL);
103		return 0;
104	} else
105		return 4;
106}
107
108static int mxc_rnga_init(struct hwrng *rng)
109{
110	u32 ctrl, osc;
111	struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
112
113	/* wake up */
114	ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
115	__raw_writel(ctrl & ~RNGA_CONTROL_SLEEP, mxc_rng->mem + RNGA_CONTROL);
116
117	/* verify if oscillator is working */
118	osc = __raw_readl(mxc_rng->mem + RNGA_STATUS);
119	if (osc & RNGA_STATUS_OSC_DEAD) {
120		dev_err(mxc_rng->dev, "RNGA Oscillator is dead!\n");
121		return -ENODEV;
122	}
123
124	/* go running */
125	ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
126	__raw_writel(ctrl | RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL);
127
128	return 0;
129}
130
131static void mxc_rnga_cleanup(struct hwrng *rng)
132{
133	u32 ctrl;
134	struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
135
136	ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
137
138	/* stop rnga */
139	__raw_writel(ctrl & ~RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL);
140}
141
142static int __init mxc_rnga_probe(struct platform_device *pdev)
143{
144	int err;
145	struct resource *res;
146	struct mxc_rng *mxc_rng;
147
148	mxc_rng = devm_kzalloc(&pdev->dev, sizeof(*mxc_rng), GFP_KERNEL);
149	if (!mxc_rng)
150		return -ENOMEM;
151
152	mxc_rng->dev = &pdev->dev;
153	mxc_rng->rng.name = "mxc-rnga";
154	mxc_rng->rng.init = mxc_rnga_init;
155	mxc_rng->rng.cleanup = mxc_rnga_cleanup,
156	mxc_rng->rng.data_present = mxc_rnga_data_present,
157	mxc_rng->rng.data_read = mxc_rnga_data_read,
158
159	mxc_rng->clk = devm_clk_get(&pdev->dev, NULL);
160	if (IS_ERR(mxc_rng->clk)) {
161		dev_err(&pdev->dev, "Could not get rng_clk!\n");
162		return PTR_ERR(mxc_rng->clk);
163	}
164
165	err = clk_prepare_enable(mxc_rng->clk);
166	if (err)
167		return err;
168
169	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
170	mxc_rng->mem = devm_ioremap_resource(&pdev->dev, res);
171	if (IS_ERR(mxc_rng->mem)) {
172		err = PTR_ERR(mxc_rng->mem);
173		goto err_ioremap;
174	}
175
176	err = hwrng_register(&mxc_rng->rng);
177	if (err) {
178		dev_err(&pdev->dev, "MXC RNGA registering failed (%d)\n", err);
179		goto err_ioremap;
180	}
181
182	return 0;
183
184err_ioremap:
185	clk_disable_unprepare(mxc_rng->clk);
186	return err;
187}
188
189static int __exit mxc_rnga_remove(struct platform_device *pdev)
190{
191	struct mxc_rng *mxc_rng = platform_get_drvdata(pdev);
192
193	hwrng_unregister(&mxc_rng->rng);
194
195	clk_disable_unprepare(mxc_rng->clk);
196
197	return 0;
198}
199
200static struct platform_driver mxc_rnga_driver = {
201	.driver = {
202		   .name = "mxc_rnga",
203		   },
204	.remove = __exit_p(mxc_rnga_remove),
205};
206
207module_platform_driver_probe(mxc_rnga_driver, mxc_rnga_probe);
208
209MODULE_AUTHOR("Freescale Semiconductor, Inc.");
210MODULE_DESCRIPTION("H/W RNGA driver for i.MX");
211MODULE_LICENSE("GPL");
212