1/* 2 * Disk Array driver for HP Smart Array controllers. 3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 17 * 02111-1307, USA. 18 * 19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 20 * 21 */ 22 23#include <linux/module.h> 24#include <linux/interrupt.h> 25#include <linux/types.h> 26#include <linux/pci.h> 27#include <linux/pci-aspm.h> 28#include <linux/kernel.h> 29#include <linux/slab.h> 30#include <linux/delay.h> 31#include <linux/major.h> 32#include <linux/fs.h> 33#include <linux/bio.h> 34#include <linux/blkpg.h> 35#include <linux/timer.h> 36#include <linux/proc_fs.h> 37#include <linux/seq_file.h> 38#include <linux/init.h> 39#include <linux/jiffies.h> 40#include <linux/hdreg.h> 41#include <linux/spinlock.h> 42#include <linux/compat.h> 43#include <linux/mutex.h> 44#include <linux/bitmap.h> 45#include <linux/io.h> 46#include <asm/uaccess.h> 47 48#include <linux/dma-mapping.h> 49#include <linux/blkdev.h> 50#include <linux/genhd.h> 51#include <linux/completion.h> 52#include <scsi/scsi.h> 53#include <scsi/sg.h> 54#include <scsi/scsi_ioctl.h> 55#include <linux/cdrom.h> 56#include <linux/scatterlist.h> 57#include <linux/kthread.h> 58 59#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin)) 60#define DRIVER_NAME "HP CISS Driver (v 3.6.26)" 61#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26) 62 63/* Embedded module documentation macros - see modules.h */ 64MODULE_AUTHOR("Hewlett-Packard Company"); 65MODULE_DESCRIPTION("Driver for HP Smart Array Controllers"); 66MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 67MODULE_VERSION("3.6.26"); 68MODULE_LICENSE("GPL"); 69static int cciss_tape_cmds = 6; 70module_param(cciss_tape_cmds, int, 0644); 71MODULE_PARM_DESC(cciss_tape_cmds, 72 "number of commands to allocate for tape devices (default: 6)"); 73static int cciss_simple_mode; 74module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR); 75MODULE_PARM_DESC(cciss_simple_mode, 76 "Use 'simple mode' rather than 'performant mode'"); 77 78static int cciss_allow_hpsa; 79module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR); 80MODULE_PARM_DESC(cciss_allow_hpsa, 81 "Prevent cciss driver from accessing hardware known to be " 82 " supported by the hpsa driver"); 83 84static DEFINE_MUTEX(cciss_mutex); 85static struct proc_dir_entry *proc_cciss; 86 87#include "cciss_cmd.h" 88#include "cciss.h" 89#include <linux/cciss_ioctl.h> 90 91/* define the PCI info for the cards we can control */ 92static const struct pci_device_id cciss_pci_device_id[] = { 93 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070}, 94 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080}, 95 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082}, 96 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083}, 97 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091}, 98 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A}, 99 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B}, 100 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C}, 101 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D}, 113 {0,} 114}; 115 116MODULE_DEVICE_TABLE(pci, cciss_pci_device_id); 117 118/* board_id = Subsystem Device ID & Vendor ID 119 * product = Marketing Name for the board 120 * access = Address of the struct of function pointers 121 */ 122static struct board_type products[] = { 123 {0x40700E11, "Smart Array 5300", &SA5_access}, 124 {0x40800E11, "Smart Array 5i", &SA5B_access}, 125 {0x40820E11, "Smart Array 532", &SA5B_access}, 126 {0x40830E11, "Smart Array 5312", &SA5B_access}, 127 {0x409A0E11, "Smart Array 641", &SA5_access}, 128 {0x409B0E11, "Smart Array 642", &SA5_access}, 129 {0x409C0E11, "Smart Array 6400", &SA5_access}, 130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access}, 131 {0x40910E11, "Smart Array 6i", &SA5_access}, 132 {0x3225103C, "Smart Array P600", &SA5_access}, 133 {0x3223103C, "Smart Array P800", &SA5_access}, 134 {0x3234103C, "Smart Array P400", &SA5_access}, 135 {0x3235103C, "Smart Array P400i", &SA5_access}, 136 {0x3211103C, "Smart Array E200i", &SA5_access}, 137 {0x3212103C, "Smart Array E200", &SA5_access}, 138 {0x3213103C, "Smart Array E200i", &SA5_access}, 139 {0x3214103C, "Smart Array E200i", &SA5_access}, 140 {0x3215103C, "Smart Array E200i", &SA5_access}, 141 {0x3237103C, "Smart Array E500", &SA5_access}, 142 {0x323D103C, "Smart Array P700m", &SA5_access}, 143}; 144 145/* How long to wait (in milliseconds) for board to go into simple mode */ 146#define MAX_CONFIG_WAIT 30000 147#define MAX_IOCTL_CONFIG_WAIT 1000 148 149/*define how many times we will try a command because of bus resets */ 150#define MAX_CMD_RETRIES 3 151 152#define MAX_CTLR 32 153 154/* Originally cciss driver only supports 8 major numbers */ 155#define MAX_CTLR_ORIG 8 156 157static ctlr_info_t *hba[MAX_CTLR]; 158 159static struct task_struct *cciss_scan_thread; 160static DEFINE_MUTEX(scan_mutex); 161static LIST_HEAD(scan_q); 162 163static void do_cciss_request(struct request_queue *q); 164static irqreturn_t do_cciss_intx(int irq, void *dev_id); 165static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id); 166static int cciss_open(struct block_device *bdev, fmode_t mode); 167static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode); 168static void cciss_release(struct gendisk *disk, fmode_t mode); 169static int cciss_ioctl(struct block_device *bdev, fmode_t mode, 170 unsigned int cmd, unsigned long arg); 171static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo); 172 173static int cciss_revalidate(struct gendisk *disk); 174static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl); 175static int deregister_disk(ctlr_info_t *h, int drv_index, 176 int clear_all, int via_ioctl); 177 178static void cciss_read_capacity(ctlr_info_t *h, int logvol, 179 sector_t *total_size, unsigned int *block_size); 180static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, 181 sector_t *total_size, unsigned int *block_size); 182static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, 183 sector_t total_size, 184 unsigned int block_size, InquiryData_struct *inq_buff, 185 drive_info_struct *drv); 186static void cciss_interrupt_mode(ctlr_info_t *); 187static int cciss_enter_simple_mode(struct ctlr_info *h); 188static void start_io(ctlr_info_t *h); 189static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, 190 __u8 page_code, unsigned char scsi3addr[], 191 int cmd_type); 192static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, 193 int attempt_retry); 194static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c); 195 196static int add_to_scan_list(struct ctlr_info *h); 197static int scan_thread(void *data); 198static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c); 199static void cciss_hba_release(struct device *dev); 200static void cciss_device_release(struct device *dev); 201static void cciss_free_gendisk(ctlr_info_t *h, int drv_index); 202static void cciss_free_drive_info(ctlr_info_t *h, int drv_index); 203static inline u32 next_command(ctlr_info_t *h); 204static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 205 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 206 u64 *cfg_offset); 207static int cciss_pci_find_memory_BAR(struct pci_dev *pdev, 208 unsigned long *memory_bar); 209static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag); 210static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable); 211 212/* performant mode helper functions */ 213static void calc_bucket_map(int *bucket, int num_buckets, int nsgs, 214 int *bucket_map); 215static void cciss_put_controller_into_performant_mode(ctlr_info_t *h); 216 217#ifdef CONFIG_PROC_FS 218static void cciss_procinit(ctlr_info_t *h); 219#else 220static void cciss_procinit(ctlr_info_t *h) 221{ 222} 223#endif /* CONFIG_PROC_FS */ 224 225#ifdef CONFIG_COMPAT 226static int cciss_compat_ioctl(struct block_device *, fmode_t, 227 unsigned, unsigned long); 228#endif 229 230static const struct block_device_operations cciss_fops = { 231 .owner = THIS_MODULE, 232 .open = cciss_unlocked_open, 233 .release = cciss_release, 234 .ioctl = cciss_ioctl, 235 .getgeo = cciss_getgeo, 236#ifdef CONFIG_COMPAT 237 .compat_ioctl = cciss_compat_ioctl, 238#endif 239 .revalidate_disk = cciss_revalidate, 240}; 241 242/* set_performant_mode: Modify the tag for cciss performant 243 * set bit 0 for pull model, bits 3-1 for block fetch 244 * register number 245 */ 246static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c) 247{ 248 if (likely(h->transMethod & CFGTBL_Trans_Performant)) 249 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 250} 251 252/* 253 * Enqueuing and dequeuing functions for cmdlists. 254 */ 255static inline void addQ(struct list_head *list, CommandList_struct *c) 256{ 257 list_add_tail(&c->list, list); 258} 259 260static inline void removeQ(CommandList_struct *c) 261{ 262 /* 263 * After kexec/dump some commands might still 264 * be in flight, which the firmware will try 265 * to complete. Resetting the firmware doesn't work 266 * with old fw revisions, so we have to mark 267 * them off as 'stale' to prevent the driver from 268 * falling over. 269 */ 270 if (WARN_ON(list_empty(&c->list))) { 271 c->cmd_type = CMD_MSG_STALE; 272 return; 273 } 274 275 list_del_init(&c->list); 276} 277 278static void enqueue_cmd_and_start_io(ctlr_info_t *h, 279 CommandList_struct *c) 280{ 281 unsigned long flags; 282 set_performant_mode(h, c); 283 spin_lock_irqsave(&h->lock, flags); 284 addQ(&h->reqQ, c); 285 h->Qdepth++; 286 if (h->Qdepth > h->maxQsinceinit) 287 h->maxQsinceinit = h->Qdepth; 288 start_io(h); 289 spin_unlock_irqrestore(&h->lock, flags); 290} 291 292static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list, 293 int nr_cmds) 294{ 295 int i; 296 297 if (!cmd_sg_list) 298 return; 299 for (i = 0; i < nr_cmds; i++) { 300 kfree(cmd_sg_list[i]); 301 cmd_sg_list[i] = NULL; 302 } 303 kfree(cmd_sg_list); 304} 305 306static SGDescriptor_struct **cciss_allocate_sg_chain_blocks( 307 ctlr_info_t *h, int chainsize, int nr_cmds) 308{ 309 int j; 310 SGDescriptor_struct **cmd_sg_list; 311 312 if (chainsize <= 0) 313 return NULL; 314 315 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL); 316 if (!cmd_sg_list) 317 return NULL; 318 319 /* Build up chain blocks for each command */ 320 for (j = 0; j < nr_cmds; j++) { 321 /* Need a block of chainsized s/g elements. */ 322 cmd_sg_list[j] = kmalloc((chainsize * 323 sizeof(*cmd_sg_list[j])), GFP_KERNEL); 324 if (!cmd_sg_list[j]) { 325 dev_err(&h->pdev->dev, "Cannot get memory " 326 "for s/g chains.\n"); 327 goto clean; 328 } 329 } 330 return cmd_sg_list; 331clean: 332 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds); 333 return NULL; 334} 335 336static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c) 337{ 338 SGDescriptor_struct *chain_sg; 339 u64bit temp64; 340 341 if (c->Header.SGTotal <= h->max_cmd_sgentries) 342 return; 343 344 chain_sg = &c->SG[h->max_cmd_sgentries - 1]; 345 temp64.val32.lower = chain_sg->Addr.lower; 346 temp64.val32.upper = chain_sg->Addr.upper; 347 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); 348} 349 350static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c, 351 SGDescriptor_struct *chain_block, int len) 352{ 353 SGDescriptor_struct *chain_sg; 354 u64bit temp64; 355 356 chain_sg = &c->SG[h->max_cmd_sgentries - 1]; 357 chain_sg->Ext = CCISS_SG_CHAIN; 358 chain_sg->Len = len; 359 temp64.val = pci_map_single(h->pdev, chain_block, len, 360 PCI_DMA_TODEVICE); 361 chain_sg->Addr.lower = temp64.val32.lower; 362 chain_sg->Addr.upper = temp64.val32.upper; 363} 364 365#include "cciss_scsi.c" /* For SCSI tape support */ 366 367static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 368 "UNKNOWN" 369}; 370#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1) 371 372#ifdef CONFIG_PROC_FS 373 374/* 375 * Report information about this controller. 376 */ 377#define ENG_GIG 1000000000 378#define ENG_GIG_FACTOR (ENG_GIG/512) 379#define ENGAGE_SCSI "engage scsi" 380 381static void cciss_seq_show_header(struct seq_file *seq) 382{ 383 ctlr_info_t *h = seq->private; 384 385 seq_printf(seq, "%s: HP %s Controller\n" 386 "Board ID: 0x%08lx\n" 387 "Firmware Version: %c%c%c%c\n" 388 "IRQ: %d\n" 389 "Logical drives: %d\n" 390 "Current Q depth: %d\n" 391 "Current # commands on controller: %d\n" 392 "Max Q depth since init: %d\n" 393 "Max # commands on controller since init: %d\n" 394 "Max SG entries since init: %d\n", 395 h->devname, 396 h->product_name, 397 (unsigned long)h->board_id, 398 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2], 399 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode], 400 h->num_luns, 401 h->Qdepth, h->commands_outstanding, 402 h->maxQsinceinit, h->max_outstanding, h->maxSG); 403 404#ifdef CONFIG_CISS_SCSI_TAPE 405 cciss_seq_tape_report(seq, h); 406#endif /* CONFIG_CISS_SCSI_TAPE */ 407} 408 409static void *cciss_seq_start(struct seq_file *seq, loff_t *pos) 410{ 411 ctlr_info_t *h = seq->private; 412 unsigned long flags; 413 414 /* prevent displaying bogus info during configuration 415 * or deconfiguration of a logical volume 416 */ 417 spin_lock_irqsave(&h->lock, flags); 418 if (h->busy_configuring) { 419 spin_unlock_irqrestore(&h->lock, flags); 420 return ERR_PTR(-EBUSY); 421 } 422 h->busy_configuring = 1; 423 spin_unlock_irqrestore(&h->lock, flags); 424 425 if (*pos == 0) 426 cciss_seq_show_header(seq); 427 428 return pos; 429} 430 431static int cciss_seq_show(struct seq_file *seq, void *v) 432{ 433 sector_t vol_sz, vol_sz_frac; 434 ctlr_info_t *h = seq->private; 435 unsigned ctlr = h->ctlr; 436 loff_t *pos = v; 437 drive_info_struct *drv = h->drv[*pos]; 438 439 if (*pos > h->highest_lun) 440 return 0; 441 442 if (drv == NULL) /* it's possible for h->drv[] to have holes. */ 443 return 0; 444 445 if (drv->heads == 0) 446 return 0; 447 448 vol_sz = drv->nr_blocks; 449 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR); 450 vol_sz_frac *= 100; 451 sector_div(vol_sz_frac, ENG_GIG_FACTOR); 452 453 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN) 454 drv->raid_level = RAID_UNKNOWN; 455 seq_printf(seq, "cciss/c%dd%d:" 456 "\t%4u.%02uGB\tRAID %s\n", 457 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac, 458 raid_label[drv->raid_level]); 459 return 0; 460} 461 462static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos) 463{ 464 ctlr_info_t *h = seq->private; 465 466 if (*pos > h->highest_lun) 467 return NULL; 468 *pos += 1; 469 470 return pos; 471} 472 473static void cciss_seq_stop(struct seq_file *seq, void *v) 474{ 475 ctlr_info_t *h = seq->private; 476 477 /* Only reset h->busy_configuring if we succeeded in setting 478 * it during cciss_seq_start. */ 479 if (v == ERR_PTR(-EBUSY)) 480 return; 481 482 h->busy_configuring = 0; 483} 484 485static const struct seq_operations cciss_seq_ops = { 486 .start = cciss_seq_start, 487 .show = cciss_seq_show, 488 .next = cciss_seq_next, 489 .stop = cciss_seq_stop, 490}; 491 492static int cciss_seq_open(struct inode *inode, struct file *file) 493{ 494 int ret = seq_open(file, &cciss_seq_ops); 495 struct seq_file *seq = file->private_data; 496 497 if (!ret) 498 seq->private = PDE_DATA(inode); 499 500 return ret; 501} 502 503static ssize_t 504cciss_proc_write(struct file *file, const char __user *buf, 505 size_t length, loff_t *ppos) 506{ 507 int err; 508 char *buffer; 509 510#ifndef CONFIG_CISS_SCSI_TAPE 511 return -EINVAL; 512#endif 513 514 if (!buf || length > PAGE_SIZE - 1) 515 return -EINVAL; 516 517 buffer = (char *)__get_free_page(GFP_KERNEL); 518 if (!buffer) 519 return -ENOMEM; 520 521 err = -EFAULT; 522 if (copy_from_user(buffer, buf, length)) 523 goto out; 524 buffer[length] = '\0'; 525 526#ifdef CONFIG_CISS_SCSI_TAPE 527 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) { 528 struct seq_file *seq = file->private_data; 529 ctlr_info_t *h = seq->private; 530 531 err = cciss_engage_scsi(h); 532 if (err == 0) 533 err = length; 534 } else 535#endif /* CONFIG_CISS_SCSI_TAPE */ 536 err = -EINVAL; 537 /* might be nice to have "disengage" too, but it's not 538 safely possible. (only 1 module use count, lock issues.) */ 539 540out: 541 free_page((unsigned long)buffer); 542 return err; 543} 544 545static const struct file_operations cciss_proc_fops = { 546 .owner = THIS_MODULE, 547 .open = cciss_seq_open, 548 .read = seq_read, 549 .llseek = seq_lseek, 550 .release = seq_release, 551 .write = cciss_proc_write, 552}; 553 554static void cciss_procinit(ctlr_info_t *h) 555{ 556 struct proc_dir_entry *pde; 557 558 if (proc_cciss == NULL) 559 proc_cciss = proc_mkdir("driver/cciss", NULL); 560 if (!proc_cciss) 561 return; 562 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP | 563 S_IROTH, proc_cciss, 564 &cciss_proc_fops, h); 565} 566#endif /* CONFIG_PROC_FS */ 567 568#define MAX_PRODUCT_NAME_LEN 19 569 570#define to_hba(n) container_of(n, struct ctlr_info, dev) 571#define to_drv(n) container_of(n, drive_info_struct, dev) 572 573/* List of controllers which cannot be hard reset on kexec with reset_devices */ 574static u32 unresettable_controller[] = { 575 0x3223103C, /* Smart Array P800 */ 576 0x3234103C, /* Smart Array P400 */ 577 0x3235103C, /* Smart Array P400i */ 578 0x3211103C, /* Smart Array E200i */ 579 0x3212103C, /* Smart Array E200 */ 580 0x3213103C, /* Smart Array E200i */ 581 0x3214103C, /* Smart Array E200i */ 582 0x3215103C, /* Smart Array E200i */ 583 0x3237103C, /* Smart Array E500 */ 584 0x323D103C, /* Smart Array P700m */ 585 0x40800E11, /* Smart Array 5i */ 586 0x409C0E11, /* Smart Array 6400 */ 587 0x409D0E11, /* Smart Array 6400 EM */ 588 0x40700E11, /* Smart Array 5300 */ 589 0x40820E11, /* Smart Array 532 */ 590 0x40830E11, /* Smart Array 5312 */ 591 0x409A0E11, /* Smart Array 641 */ 592 0x409B0E11, /* Smart Array 642 */ 593 0x40910E11, /* Smart Array 6i */ 594}; 595 596/* List of controllers which cannot even be soft reset */ 597static u32 soft_unresettable_controller[] = { 598 0x40800E11, /* Smart Array 5i */ 599 0x40700E11, /* Smart Array 5300 */ 600 0x40820E11, /* Smart Array 532 */ 601 0x40830E11, /* Smart Array 5312 */ 602 0x409A0E11, /* Smart Array 641 */ 603 0x409B0E11, /* Smart Array 642 */ 604 0x40910E11, /* Smart Array 6i */ 605 /* Exclude 640x boards. These are two pci devices in one slot 606 * which share a battery backed cache module. One controls the 607 * cache, the other accesses the cache through the one that controls 608 * it. If we reset the one controlling the cache, the other will 609 * likely not be happy. Just forbid resetting this conjoined mess. 610 */ 611 0x409C0E11, /* Smart Array 6400 */ 612 0x409D0E11, /* Smart Array 6400 EM */ 613}; 614 615static int ctlr_is_hard_resettable(u32 board_id) 616{ 617 int i; 618 619 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) 620 if (unresettable_controller[i] == board_id) 621 return 0; 622 return 1; 623} 624 625static int ctlr_is_soft_resettable(u32 board_id) 626{ 627 int i; 628 629 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) 630 if (soft_unresettable_controller[i] == board_id) 631 return 0; 632 return 1; 633} 634 635static int ctlr_is_resettable(u32 board_id) 636{ 637 return ctlr_is_hard_resettable(board_id) || 638 ctlr_is_soft_resettable(board_id); 639} 640 641static ssize_t host_show_resettable(struct device *dev, 642 struct device_attribute *attr, 643 char *buf) 644{ 645 struct ctlr_info *h = to_hba(dev); 646 647 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 648} 649static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL); 650 651static ssize_t host_store_rescan(struct device *dev, 652 struct device_attribute *attr, 653 const char *buf, size_t count) 654{ 655 struct ctlr_info *h = to_hba(dev); 656 657 add_to_scan_list(h); 658 wake_up_process(cciss_scan_thread); 659 wait_for_completion_interruptible(&h->scan_wait); 660 661 return count; 662} 663static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 664 665static ssize_t host_show_transport_mode(struct device *dev, 666 struct device_attribute *attr, 667 char *buf) 668{ 669 struct ctlr_info *h = to_hba(dev); 670 671 return snprintf(buf, 20, "%s\n", 672 h->transMethod & CFGTBL_Trans_Performant ? 673 "performant" : "simple"); 674} 675static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL); 676 677static ssize_t dev_show_unique_id(struct device *dev, 678 struct device_attribute *attr, 679 char *buf) 680{ 681 drive_info_struct *drv = to_drv(dev); 682 struct ctlr_info *h = to_hba(drv->dev.parent); 683 __u8 sn[16]; 684 unsigned long flags; 685 int ret = 0; 686 687 spin_lock_irqsave(&h->lock, flags); 688 if (h->busy_configuring) 689 ret = -EBUSY; 690 else 691 memcpy(sn, drv->serial_no, sizeof(sn)); 692 spin_unlock_irqrestore(&h->lock, flags); 693 694 if (ret) 695 return ret; 696 else 697 return snprintf(buf, 16 * 2 + 2, 698 "%02X%02X%02X%02X%02X%02X%02X%02X" 699 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 700 sn[0], sn[1], sn[2], sn[3], 701 sn[4], sn[5], sn[6], sn[7], 702 sn[8], sn[9], sn[10], sn[11], 703 sn[12], sn[13], sn[14], sn[15]); 704} 705static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL); 706 707static ssize_t dev_show_vendor(struct device *dev, 708 struct device_attribute *attr, 709 char *buf) 710{ 711 drive_info_struct *drv = to_drv(dev); 712 struct ctlr_info *h = to_hba(drv->dev.parent); 713 char vendor[VENDOR_LEN + 1]; 714 unsigned long flags; 715 int ret = 0; 716 717 spin_lock_irqsave(&h->lock, flags); 718 if (h->busy_configuring) 719 ret = -EBUSY; 720 else 721 memcpy(vendor, drv->vendor, VENDOR_LEN + 1); 722 spin_unlock_irqrestore(&h->lock, flags); 723 724 if (ret) 725 return ret; 726 else 727 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor); 728} 729static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL); 730 731static ssize_t dev_show_model(struct device *dev, 732 struct device_attribute *attr, 733 char *buf) 734{ 735 drive_info_struct *drv = to_drv(dev); 736 struct ctlr_info *h = to_hba(drv->dev.parent); 737 char model[MODEL_LEN + 1]; 738 unsigned long flags; 739 int ret = 0; 740 741 spin_lock_irqsave(&h->lock, flags); 742 if (h->busy_configuring) 743 ret = -EBUSY; 744 else 745 memcpy(model, drv->model, MODEL_LEN + 1); 746 spin_unlock_irqrestore(&h->lock, flags); 747 748 if (ret) 749 return ret; 750 else 751 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model); 752} 753static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL); 754 755static ssize_t dev_show_rev(struct device *dev, 756 struct device_attribute *attr, 757 char *buf) 758{ 759 drive_info_struct *drv = to_drv(dev); 760 struct ctlr_info *h = to_hba(drv->dev.parent); 761 char rev[REV_LEN + 1]; 762 unsigned long flags; 763 int ret = 0; 764 765 spin_lock_irqsave(&h->lock, flags); 766 if (h->busy_configuring) 767 ret = -EBUSY; 768 else 769 memcpy(rev, drv->rev, REV_LEN + 1); 770 spin_unlock_irqrestore(&h->lock, flags); 771 772 if (ret) 773 return ret; 774 else 775 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev); 776} 777static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL); 778 779static ssize_t cciss_show_lunid(struct device *dev, 780 struct device_attribute *attr, char *buf) 781{ 782 drive_info_struct *drv = to_drv(dev); 783 struct ctlr_info *h = to_hba(drv->dev.parent); 784 unsigned long flags; 785 unsigned char lunid[8]; 786 787 spin_lock_irqsave(&h->lock, flags); 788 if (h->busy_configuring) { 789 spin_unlock_irqrestore(&h->lock, flags); 790 return -EBUSY; 791 } 792 if (!drv->heads) { 793 spin_unlock_irqrestore(&h->lock, flags); 794 return -ENOTTY; 795 } 796 memcpy(lunid, drv->LunID, sizeof(lunid)); 797 spin_unlock_irqrestore(&h->lock, flags); 798 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 799 lunid[0], lunid[1], lunid[2], lunid[3], 800 lunid[4], lunid[5], lunid[6], lunid[7]); 801} 802static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL); 803 804static ssize_t cciss_show_raid_level(struct device *dev, 805 struct device_attribute *attr, char *buf) 806{ 807 drive_info_struct *drv = to_drv(dev); 808 struct ctlr_info *h = to_hba(drv->dev.parent); 809 int raid; 810 unsigned long flags; 811 812 spin_lock_irqsave(&h->lock, flags); 813 if (h->busy_configuring) { 814 spin_unlock_irqrestore(&h->lock, flags); 815 return -EBUSY; 816 } 817 raid = drv->raid_level; 818 spin_unlock_irqrestore(&h->lock, flags); 819 if (raid < 0 || raid > RAID_UNKNOWN) 820 raid = RAID_UNKNOWN; 821 822 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n", 823 raid_label[raid]); 824} 825static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL); 826 827static ssize_t cciss_show_usage_count(struct device *dev, 828 struct device_attribute *attr, char *buf) 829{ 830 drive_info_struct *drv = to_drv(dev); 831 struct ctlr_info *h = to_hba(drv->dev.parent); 832 unsigned long flags; 833 int count; 834 835 spin_lock_irqsave(&h->lock, flags); 836 if (h->busy_configuring) { 837 spin_unlock_irqrestore(&h->lock, flags); 838 return -EBUSY; 839 } 840 count = drv->usage_count; 841 spin_unlock_irqrestore(&h->lock, flags); 842 return snprintf(buf, 20, "%d\n", count); 843} 844static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL); 845 846static struct attribute *cciss_host_attrs[] = { 847 &dev_attr_rescan.attr, 848 &dev_attr_resettable.attr, 849 &dev_attr_transport_mode.attr, 850 NULL 851}; 852 853static struct attribute_group cciss_host_attr_group = { 854 .attrs = cciss_host_attrs, 855}; 856 857static const struct attribute_group *cciss_host_attr_groups[] = { 858 &cciss_host_attr_group, 859 NULL 860}; 861 862static struct device_type cciss_host_type = { 863 .name = "cciss_host", 864 .groups = cciss_host_attr_groups, 865 .release = cciss_hba_release, 866}; 867 868static struct attribute *cciss_dev_attrs[] = { 869 &dev_attr_unique_id.attr, 870 &dev_attr_model.attr, 871 &dev_attr_vendor.attr, 872 &dev_attr_rev.attr, 873 &dev_attr_lunid.attr, 874 &dev_attr_raid_level.attr, 875 &dev_attr_usage_count.attr, 876 NULL 877}; 878 879static struct attribute_group cciss_dev_attr_group = { 880 .attrs = cciss_dev_attrs, 881}; 882 883static const struct attribute_group *cciss_dev_attr_groups[] = { 884 &cciss_dev_attr_group, 885 NULL 886}; 887 888static struct device_type cciss_dev_type = { 889 .name = "cciss_device", 890 .groups = cciss_dev_attr_groups, 891 .release = cciss_device_release, 892}; 893 894static struct bus_type cciss_bus_type = { 895 .name = "cciss", 896}; 897 898/* 899 * cciss_hba_release is called when the reference count 900 * of h->dev goes to zero. 901 */ 902static void cciss_hba_release(struct device *dev) 903{ 904 /* 905 * nothing to do, but need this to avoid a warning 906 * about not having a release handler from lib/kref.c. 907 */ 908} 909 910/* 911 * Initialize sysfs entry for each controller. This sets up and registers 912 * the 'cciss#' directory for each individual controller under 913 * /sys/bus/pci/devices/<dev>/. 914 */ 915static int cciss_create_hba_sysfs_entry(struct ctlr_info *h) 916{ 917 device_initialize(&h->dev); 918 h->dev.type = &cciss_host_type; 919 h->dev.bus = &cciss_bus_type; 920 dev_set_name(&h->dev, "%s", h->devname); 921 h->dev.parent = &h->pdev->dev; 922 923 return device_add(&h->dev); 924} 925 926/* 927 * Remove sysfs entries for an hba. 928 */ 929static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h) 930{ 931 device_del(&h->dev); 932 put_device(&h->dev); /* final put. */ 933} 934 935/* cciss_device_release is called when the reference count 936 * of h->drv[x]dev goes to zero. 937 */ 938static void cciss_device_release(struct device *dev) 939{ 940 drive_info_struct *drv = to_drv(dev); 941 kfree(drv); 942} 943 944/* 945 * Initialize sysfs for each logical drive. This sets up and registers 946 * the 'c#d#' directory for each individual logical drive under 947 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from 948 * /sys/block/cciss!c#d# to this entry. 949 */ 950static long cciss_create_ld_sysfs_entry(struct ctlr_info *h, 951 int drv_index) 952{ 953 struct device *dev; 954 955 if (h->drv[drv_index]->device_initialized) 956 return 0; 957 958 dev = &h->drv[drv_index]->dev; 959 device_initialize(dev); 960 dev->type = &cciss_dev_type; 961 dev->bus = &cciss_bus_type; 962 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index); 963 dev->parent = &h->dev; 964 h->drv[drv_index]->device_initialized = 1; 965 return device_add(dev); 966} 967 968/* 969 * Remove sysfs entries for a logical drive. 970 */ 971static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index, 972 int ctlr_exiting) 973{ 974 struct device *dev = &h->drv[drv_index]->dev; 975 976 /* special case for c*d0, we only destroy it on controller exit */ 977 if (drv_index == 0 && !ctlr_exiting) 978 return; 979 980 device_del(dev); 981 put_device(dev); /* the "final" put. */ 982 h->drv[drv_index] = NULL; 983} 984 985/* 986 * For operations that cannot sleep, a command block is allocated at init, 987 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 988 * which ones are free or in use. 989 */ 990static CommandList_struct *cmd_alloc(ctlr_info_t *h) 991{ 992 CommandList_struct *c; 993 int i; 994 u64bit temp64; 995 dma_addr_t cmd_dma_handle, err_dma_handle; 996 997 do { 998 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); 999 if (i == h->nr_cmds) 1000 return NULL; 1001 } while (test_and_set_bit(i, h->cmd_pool_bits) != 0); 1002 c = h->cmd_pool + i; 1003 memset(c, 0, sizeof(CommandList_struct)); 1004 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct); 1005 c->err_info = h->errinfo_pool + i; 1006 memset(c->err_info, 0, sizeof(ErrorInfo_struct)); 1007 err_dma_handle = h->errinfo_pool_dhandle 1008 + i * sizeof(ErrorInfo_struct); 1009 h->nr_allocs++; 1010 1011 c->cmdindex = i; 1012 1013 INIT_LIST_HEAD(&c->list); 1014 c->busaddr = (__u32) cmd_dma_handle; 1015 temp64.val = (__u64) err_dma_handle; 1016 c->ErrDesc.Addr.lower = temp64.val32.lower; 1017 c->ErrDesc.Addr.upper = temp64.val32.upper; 1018 c->ErrDesc.Len = sizeof(ErrorInfo_struct); 1019 1020 c->ctlr = h->ctlr; 1021 return c; 1022} 1023 1024/* allocate a command using pci_alloc_consistent, used for ioctls, 1025 * etc., not for the main i/o path. 1026 */ 1027static CommandList_struct *cmd_special_alloc(ctlr_info_t *h) 1028{ 1029 CommandList_struct *c; 1030 u64bit temp64; 1031 dma_addr_t cmd_dma_handle, err_dma_handle; 1032 1033 c = pci_zalloc_consistent(h->pdev, sizeof(CommandList_struct), 1034 &cmd_dma_handle); 1035 if (c == NULL) 1036 return NULL; 1037 1038 c->cmdindex = -1; 1039 1040 c->err_info = pci_zalloc_consistent(h->pdev, sizeof(ErrorInfo_struct), 1041 &err_dma_handle); 1042 1043 if (c->err_info == NULL) { 1044 pci_free_consistent(h->pdev, 1045 sizeof(CommandList_struct), c, cmd_dma_handle); 1046 return NULL; 1047 } 1048 1049 INIT_LIST_HEAD(&c->list); 1050 c->busaddr = (__u32) cmd_dma_handle; 1051 temp64.val = (__u64) err_dma_handle; 1052 c->ErrDesc.Addr.lower = temp64.val32.lower; 1053 c->ErrDesc.Addr.upper = temp64.val32.upper; 1054 c->ErrDesc.Len = sizeof(ErrorInfo_struct); 1055 1056 c->ctlr = h->ctlr; 1057 return c; 1058} 1059 1060static void cmd_free(ctlr_info_t *h, CommandList_struct *c) 1061{ 1062 int i; 1063 1064 i = c - h->cmd_pool; 1065 clear_bit(i, h->cmd_pool_bits); 1066 h->nr_frees++; 1067} 1068 1069static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c) 1070{ 1071 u64bit temp64; 1072 1073 temp64.val32.lower = c->ErrDesc.Addr.lower; 1074 temp64.val32.upper = c->ErrDesc.Addr.upper; 1075 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct), 1076 c->err_info, (dma_addr_t) temp64.val); 1077 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c, 1078 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr)); 1079} 1080 1081static inline ctlr_info_t *get_host(struct gendisk *disk) 1082{ 1083 return disk->queue->queuedata; 1084} 1085 1086static inline drive_info_struct *get_drv(struct gendisk *disk) 1087{ 1088 return disk->private_data; 1089} 1090 1091/* 1092 * Open. Make sure the device is really there. 1093 */ 1094static int cciss_open(struct block_device *bdev, fmode_t mode) 1095{ 1096 ctlr_info_t *h = get_host(bdev->bd_disk); 1097 drive_info_struct *drv = get_drv(bdev->bd_disk); 1098 1099 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name); 1100 if (drv->busy_configuring) 1101 return -EBUSY; 1102 /* 1103 * Root is allowed to open raw volume zero even if it's not configured 1104 * so array config can still work. Root is also allowed to open any 1105 * volume that has a LUN ID, so it can issue IOCTL to reread the 1106 * disk information. I don't think I really like this 1107 * but I'm already using way to many device nodes to claim another one 1108 * for "raw controller". 1109 */ 1110 if (drv->heads == 0) { 1111 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */ 1112 /* if not node 0 make sure it is a partition = 0 */ 1113 if (MINOR(bdev->bd_dev) & 0x0f) { 1114 return -ENXIO; 1115 /* if it is, make sure we have a LUN ID */ 1116 } else if (memcmp(drv->LunID, CTLR_LUNID, 1117 sizeof(drv->LunID))) { 1118 return -ENXIO; 1119 } 1120 } 1121 if (!capable(CAP_SYS_ADMIN)) 1122 return -EPERM; 1123 } 1124 drv->usage_count++; 1125 h->usage_count++; 1126 return 0; 1127} 1128 1129static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode) 1130{ 1131 int ret; 1132 1133 mutex_lock(&cciss_mutex); 1134 ret = cciss_open(bdev, mode); 1135 mutex_unlock(&cciss_mutex); 1136 1137 return ret; 1138} 1139 1140/* 1141 * Close. Sync first. 1142 */ 1143static void cciss_release(struct gendisk *disk, fmode_t mode) 1144{ 1145 ctlr_info_t *h; 1146 drive_info_struct *drv; 1147 1148 mutex_lock(&cciss_mutex); 1149 h = get_host(disk); 1150 drv = get_drv(disk); 1151 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name); 1152 drv->usage_count--; 1153 h->usage_count--; 1154 mutex_unlock(&cciss_mutex); 1155} 1156 1157#ifdef CONFIG_COMPAT 1158 1159static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, 1160 unsigned cmd, unsigned long arg); 1161static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, 1162 unsigned cmd, unsigned long arg); 1163 1164static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode, 1165 unsigned cmd, unsigned long arg) 1166{ 1167 switch (cmd) { 1168 case CCISS_GETPCIINFO: 1169 case CCISS_GETINTINFO: 1170 case CCISS_SETINTINFO: 1171 case CCISS_GETNODENAME: 1172 case CCISS_SETNODENAME: 1173 case CCISS_GETHEARTBEAT: 1174 case CCISS_GETBUSTYPES: 1175 case CCISS_GETFIRMVER: 1176 case CCISS_GETDRIVVER: 1177 case CCISS_REVALIDVOLS: 1178 case CCISS_DEREGDISK: 1179 case CCISS_REGNEWDISK: 1180 case CCISS_REGNEWD: 1181 case CCISS_RESCANDISK: 1182 case CCISS_GETLUNINFO: 1183 return cciss_ioctl(bdev, mode, cmd, arg); 1184 1185 case CCISS_PASSTHRU32: 1186 return cciss_ioctl32_passthru(bdev, mode, cmd, arg); 1187 case CCISS_BIG_PASSTHRU32: 1188 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg); 1189 1190 default: 1191 return -ENOIOCTLCMD; 1192 } 1193} 1194 1195static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, 1196 unsigned cmd, unsigned long arg) 1197{ 1198 IOCTL32_Command_struct __user *arg32 = 1199 (IOCTL32_Command_struct __user *) arg; 1200 IOCTL_Command_struct arg64; 1201 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 1202 int err; 1203 u32 cp; 1204 1205 memset(&arg64, 0, sizeof(arg64)); 1206 err = 0; 1207 err |= 1208 copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 1209 sizeof(arg64.LUN_info)); 1210 err |= 1211 copy_from_user(&arg64.Request, &arg32->Request, 1212 sizeof(arg64.Request)); 1213 err |= 1214 copy_from_user(&arg64.error_info, &arg32->error_info, 1215 sizeof(arg64.error_info)); 1216 err |= get_user(arg64.buf_size, &arg32->buf_size); 1217 err |= get_user(cp, &arg32->buf); 1218 arg64.buf = compat_ptr(cp); 1219 err |= copy_to_user(p, &arg64, sizeof(arg64)); 1220 1221 if (err) 1222 return -EFAULT; 1223 1224 err = cciss_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p); 1225 if (err) 1226 return err; 1227 err |= 1228 copy_in_user(&arg32->error_info, &p->error_info, 1229 sizeof(arg32->error_info)); 1230 if (err) 1231 return -EFAULT; 1232 return err; 1233} 1234 1235static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, 1236 unsigned cmd, unsigned long arg) 1237{ 1238 BIG_IOCTL32_Command_struct __user *arg32 = 1239 (BIG_IOCTL32_Command_struct __user *) arg; 1240 BIG_IOCTL_Command_struct arg64; 1241 BIG_IOCTL_Command_struct __user *p = 1242 compat_alloc_user_space(sizeof(arg64)); 1243 int err; 1244 u32 cp; 1245 1246 memset(&arg64, 0, sizeof(arg64)); 1247 err = 0; 1248 err |= 1249 copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 1250 sizeof(arg64.LUN_info)); 1251 err |= 1252 copy_from_user(&arg64.Request, &arg32->Request, 1253 sizeof(arg64.Request)); 1254 err |= 1255 copy_from_user(&arg64.error_info, &arg32->error_info, 1256 sizeof(arg64.error_info)); 1257 err |= get_user(arg64.buf_size, &arg32->buf_size); 1258 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 1259 err |= get_user(cp, &arg32->buf); 1260 arg64.buf = compat_ptr(cp); 1261 err |= copy_to_user(p, &arg64, sizeof(arg64)); 1262 1263 if (err) 1264 return -EFAULT; 1265 1266 err = cciss_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p); 1267 if (err) 1268 return err; 1269 err |= 1270 copy_in_user(&arg32->error_info, &p->error_info, 1271 sizeof(arg32->error_info)); 1272 if (err) 1273 return -EFAULT; 1274 return err; 1275} 1276#endif 1277 1278static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1279{ 1280 drive_info_struct *drv = get_drv(bdev->bd_disk); 1281 1282 if (!drv->cylinders) 1283 return -ENXIO; 1284 1285 geo->heads = drv->heads; 1286 geo->sectors = drv->sectors; 1287 geo->cylinders = drv->cylinders; 1288 return 0; 1289} 1290 1291static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c) 1292{ 1293 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 1294 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 1295 (void)check_for_unit_attention(h, c); 1296} 1297 1298static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp) 1299{ 1300 cciss_pci_info_struct pciinfo; 1301 1302 if (!argp) 1303 return -EINVAL; 1304 pciinfo.domain = pci_domain_nr(h->pdev->bus); 1305 pciinfo.bus = h->pdev->bus->number; 1306 pciinfo.dev_fn = h->pdev->devfn; 1307 pciinfo.board_id = h->board_id; 1308 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct))) 1309 return -EFAULT; 1310 return 0; 1311} 1312 1313static int cciss_getintinfo(ctlr_info_t *h, void __user *argp) 1314{ 1315 cciss_coalint_struct intinfo; 1316 unsigned long flags; 1317 1318 if (!argp) 1319 return -EINVAL; 1320 spin_lock_irqsave(&h->lock, flags); 1321 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay); 1322 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount); 1323 spin_unlock_irqrestore(&h->lock, flags); 1324 if (copy_to_user 1325 (argp, &intinfo, sizeof(cciss_coalint_struct))) 1326 return -EFAULT; 1327 return 0; 1328} 1329 1330static int cciss_setintinfo(ctlr_info_t *h, void __user *argp) 1331{ 1332 cciss_coalint_struct intinfo; 1333 unsigned long flags; 1334 int i; 1335 1336 if (!argp) 1337 return -EINVAL; 1338 if (!capable(CAP_SYS_ADMIN)) 1339 return -EPERM; 1340 if (copy_from_user(&intinfo, argp, sizeof(intinfo))) 1341 return -EFAULT; 1342 if ((intinfo.delay == 0) && (intinfo.count == 0)) 1343 return -EINVAL; 1344 spin_lock_irqsave(&h->lock, flags); 1345 /* Update the field, and then ring the doorbell */ 1346 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay)); 1347 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount)); 1348 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 1349 1350 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { 1351 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) 1352 break; 1353 udelay(1000); /* delay and try again */ 1354 } 1355 spin_unlock_irqrestore(&h->lock, flags); 1356 if (i >= MAX_IOCTL_CONFIG_WAIT) 1357 return -EAGAIN; 1358 return 0; 1359} 1360 1361static int cciss_getnodename(ctlr_info_t *h, void __user *argp) 1362{ 1363 NodeName_type NodeName; 1364 unsigned long flags; 1365 int i; 1366 1367 if (!argp) 1368 return -EINVAL; 1369 spin_lock_irqsave(&h->lock, flags); 1370 for (i = 0; i < 16; i++) 1371 NodeName[i] = readb(&h->cfgtable->ServerName[i]); 1372 spin_unlock_irqrestore(&h->lock, flags); 1373 if (copy_to_user(argp, NodeName, sizeof(NodeName_type))) 1374 return -EFAULT; 1375 return 0; 1376} 1377 1378static int cciss_setnodename(ctlr_info_t *h, void __user *argp) 1379{ 1380 NodeName_type NodeName; 1381 unsigned long flags; 1382 int i; 1383 1384 if (!argp) 1385 return -EINVAL; 1386 if (!capable(CAP_SYS_ADMIN)) 1387 return -EPERM; 1388 if (copy_from_user(NodeName, argp, sizeof(NodeName_type))) 1389 return -EFAULT; 1390 spin_lock_irqsave(&h->lock, flags); 1391 /* Update the field, and then ring the doorbell */ 1392 for (i = 0; i < 16; i++) 1393 writeb(NodeName[i], &h->cfgtable->ServerName[i]); 1394 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 1395 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { 1396 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) 1397 break; 1398 udelay(1000); /* delay and try again */ 1399 } 1400 spin_unlock_irqrestore(&h->lock, flags); 1401 if (i >= MAX_IOCTL_CONFIG_WAIT) 1402 return -EAGAIN; 1403 return 0; 1404} 1405 1406static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp) 1407{ 1408 Heartbeat_type heartbeat; 1409 unsigned long flags; 1410 1411 if (!argp) 1412 return -EINVAL; 1413 spin_lock_irqsave(&h->lock, flags); 1414 heartbeat = readl(&h->cfgtable->HeartBeat); 1415 spin_unlock_irqrestore(&h->lock, flags); 1416 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type))) 1417 return -EFAULT; 1418 return 0; 1419} 1420 1421static int cciss_getbustypes(ctlr_info_t *h, void __user *argp) 1422{ 1423 BusTypes_type BusTypes; 1424 unsigned long flags; 1425 1426 if (!argp) 1427 return -EINVAL; 1428 spin_lock_irqsave(&h->lock, flags); 1429 BusTypes = readl(&h->cfgtable->BusTypes); 1430 spin_unlock_irqrestore(&h->lock, flags); 1431 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type))) 1432 return -EFAULT; 1433 return 0; 1434} 1435 1436static int cciss_getfirmver(ctlr_info_t *h, void __user *argp) 1437{ 1438 FirmwareVer_type firmware; 1439 1440 if (!argp) 1441 return -EINVAL; 1442 memcpy(firmware, h->firm_ver, 4); 1443 1444 if (copy_to_user 1445 (argp, firmware, sizeof(FirmwareVer_type))) 1446 return -EFAULT; 1447 return 0; 1448} 1449 1450static int cciss_getdrivver(ctlr_info_t *h, void __user *argp) 1451{ 1452 DriverVer_type DriverVer = DRIVER_VERSION; 1453 1454 if (!argp) 1455 return -EINVAL; 1456 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 1457 return -EFAULT; 1458 return 0; 1459} 1460 1461static int cciss_getluninfo(ctlr_info_t *h, 1462 struct gendisk *disk, void __user *argp) 1463{ 1464 LogvolInfo_struct luninfo; 1465 drive_info_struct *drv = get_drv(disk); 1466 1467 if (!argp) 1468 return -EINVAL; 1469 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID)); 1470 luninfo.num_opens = drv->usage_count; 1471 luninfo.num_parts = 0; 1472 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct))) 1473 return -EFAULT; 1474 return 0; 1475} 1476 1477static int cciss_passthru(ctlr_info_t *h, void __user *argp) 1478{ 1479 IOCTL_Command_struct iocommand; 1480 CommandList_struct *c; 1481 char *buff = NULL; 1482 u64bit temp64; 1483 DECLARE_COMPLETION_ONSTACK(wait); 1484 1485 if (!argp) 1486 return -EINVAL; 1487 1488 if (!capable(CAP_SYS_RAWIO)) 1489 return -EPERM; 1490 1491 if (copy_from_user 1492 (&iocommand, argp, sizeof(IOCTL_Command_struct))) 1493 return -EFAULT; 1494 if ((iocommand.buf_size < 1) && 1495 (iocommand.Request.Type.Direction != XFER_NONE)) { 1496 return -EINVAL; 1497 } 1498 if (iocommand.buf_size > 0) { 1499 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 1500 if (buff == NULL) 1501 return -EFAULT; 1502 } 1503 if (iocommand.Request.Type.Direction == XFER_WRITE) { 1504 /* Copy the data into the buffer we created */ 1505 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) { 1506 kfree(buff); 1507 return -EFAULT; 1508 } 1509 } else { 1510 memset(buff, 0, iocommand.buf_size); 1511 } 1512 c = cmd_special_alloc(h); 1513 if (!c) { 1514 kfree(buff); 1515 return -ENOMEM; 1516 } 1517 /* Fill in the command type */ 1518 c->cmd_type = CMD_IOCTL_PEND; 1519 /* Fill in Command Header */ 1520 c->Header.ReplyQueue = 0; /* unused in simple mode */ 1521 if (iocommand.buf_size > 0) { /* buffer to fill */ 1522 c->Header.SGList = 1; 1523 c->Header.SGTotal = 1; 1524 } else { /* no buffers to fill */ 1525 c->Header.SGList = 0; 1526 c->Header.SGTotal = 0; 1527 } 1528 c->Header.LUN = iocommand.LUN_info; 1529 /* use the kernel address the cmd block for tag */ 1530 c->Header.Tag.lower = c->busaddr; 1531 1532 /* Fill in Request block */ 1533 c->Request = iocommand.Request; 1534 1535 /* Fill in the scatter gather information */ 1536 if (iocommand.buf_size > 0) { 1537 temp64.val = pci_map_single(h->pdev, buff, 1538 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 1539 c->SG[0].Addr.lower = temp64.val32.lower; 1540 c->SG[0].Addr.upper = temp64.val32.upper; 1541 c->SG[0].Len = iocommand.buf_size; 1542 c->SG[0].Ext = 0; /* we are not chaining */ 1543 } 1544 c->waiting = &wait; 1545 1546 enqueue_cmd_and_start_io(h, c); 1547 wait_for_completion(&wait); 1548 1549 /* unlock the buffers from DMA */ 1550 temp64.val32.lower = c->SG[0].Addr.lower; 1551 temp64.val32.upper = c->SG[0].Addr.upper; 1552 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size, 1553 PCI_DMA_BIDIRECTIONAL); 1554 check_ioctl_unit_attention(h, c); 1555 1556 /* Copy the error information out */ 1557 iocommand.error_info = *(c->err_info); 1558 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) { 1559 kfree(buff); 1560 cmd_special_free(h, c); 1561 return -EFAULT; 1562 } 1563 1564 if (iocommand.Request.Type.Direction == XFER_READ) { 1565 /* Copy the data out of the buffer we created */ 1566 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 1567 kfree(buff); 1568 cmd_special_free(h, c); 1569 return -EFAULT; 1570 } 1571 } 1572 kfree(buff); 1573 cmd_special_free(h, c); 1574 return 0; 1575} 1576 1577static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp) 1578{ 1579 BIG_IOCTL_Command_struct *ioc; 1580 CommandList_struct *c; 1581 unsigned char **buff = NULL; 1582 int *buff_size = NULL; 1583 u64bit temp64; 1584 BYTE sg_used = 0; 1585 int status = 0; 1586 int i; 1587 DECLARE_COMPLETION_ONSTACK(wait); 1588 __u32 left; 1589 __u32 sz; 1590 BYTE __user *data_ptr; 1591 1592 if (!argp) 1593 return -EINVAL; 1594 if (!capable(CAP_SYS_RAWIO)) 1595 return -EPERM; 1596 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 1597 if (!ioc) { 1598 status = -ENOMEM; 1599 goto cleanup1; 1600 } 1601 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 1602 status = -EFAULT; 1603 goto cleanup1; 1604 } 1605 if ((ioc->buf_size < 1) && 1606 (ioc->Request.Type.Direction != XFER_NONE)) { 1607 status = -EINVAL; 1608 goto cleanup1; 1609 } 1610 /* Check kmalloc limits using all SGs */ 1611 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 1612 status = -EINVAL; 1613 goto cleanup1; 1614 } 1615 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) { 1616 status = -EINVAL; 1617 goto cleanup1; 1618 } 1619 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL); 1620 if (!buff) { 1621 status = -ENOMEM; 1622 goto cleanup1; 1623 } 1624 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL); 1625 if (!buff_size) { 1626 status = -ENOMEM; 1627 goto cleanup1; 1628 } 1629 left = ioc->buf_size; 1630 data_ptr = ioc->buf; 1631 while (left) { 1632 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 1633 buff_size[sg_used] = sz; 1634 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 1635 if (buff[sg_used] == NULL) { 1636 status = -ENOMEM; 1637 goto cleanup1; 1638 } 1639 if (ioc->Request.Type.Direction == XFER_WRITE) { 1640 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 1641 status = -EFAULT; 1642 goto cleanup1; 1643 } 1644 } else { 1645 memset(buff[sg_used], 0, sz); 1646 } 1647 left -= sz; 1648 data_ptr += sz; 1649 sg_used++; 1650 } 1651 c = cmd_special_alloc(h); 1652 if (!c) { 1653 status = -ENOMEM; 1654 goto cleanup1; 1655 } 1656 c->cmd_type = CMD_IOCTL_PEND; 1657 c->Header.ReplyQueue = 0; 1658 c->Header.SGList = sg_used; 1659 c->Header.SGTotal = sg_used; 1660 c->Header.LUN = ioc->LUN_info; 1661 c->Header.Tag.lower = c->busaddr; 1662 1663 c->Request = ioc->Request; 1664 for (i = 0; i < sg_used; i++) { 1665 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i], 1666 PCI_DMA_BIDIRECTIONAL); 1667 c->SG[i].Addr.lower = temp64.val32.lower; 1668 c->SG[i].Addr.upper = temp64.val32.upper; 1669 c->SG[i].Len = buff_size[i]; 1670 c->SG[i].Ext = 0; /* we are not chaining */ 1671 } 1672 c->waiting = &wait; 1673 enqueue_cmd_and_start_io(h, c); 1674 wait_for_completion(&wait); 1675 /* unlock the buffers from DMA */ 1676 for (i = 0; i < sg_used; i++) { 1677 temp64.val32.lower = c->SG[i].Addr.lower; 1678 temp64.val32.upper = c->SG[i].Addr.upper; 1679 pci_unmap_single(h->pdev, 1680 (dma_addr_t) temp64.val, buff_size[i], 1681 PCI_DMA_BIDIRECTIONAL); 1682 } 1683 check_ioctl_unit_attention(h, c); 1684 /* Copy the error information out */ 1685 ioc->error_info = *(c->err_info); 1686 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 1687 cmd_special_free(h, c); 1688 status = -EFAULT; 1689 goto cleanup1; 1690 } 1691 if (ioc->Request.Type.Direction == XFER_READ) { 1692 /* Copy the data out of the buffer we created */ 1693 BYTE __user *ptr = ioc->buf; 1694 for (i = 0; i < sg_used; i++) { 1695 if (copy_to_user(ptr, buff[i], buff_size[i])) { 1696 cmd_special_free(h, c); 1697 status = -EFAULT; 1698 goto cleanup1; 1699 } 1700 ptr += buff_size[i]; 1701 } 1702 } 1703 cmd_special_free(h, c); 1704 status = 0; 1705cleanup1: 1706 if (buff) { 1707 for (i = 0; i < sg_used; i++) 1708 kfree(buff[i]); 1709 kfree(buff); 1710 } 1711 kfree(buff_size); 1712 kfree(ioc); 1713 return status; 1714} 1715 1716static int cciss_ioctl(struct block_device *bdev, fmode_t mode, 1717 unsigned int cmd, unsigned long arg) 1718{ 1719 struct gendisk *disk = bdev->bd_disk; 1720 ctlr_info_t *h = get_host(disk); 1721 void __user *argp = (void __user *)arg; 1722 1723 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n", 1724 cmd, arg); 1725 switch (cmd) { 1726 case CCISS_GETPCIINFO: 1727 return cciss_getpciinfo(h, argp); 1728 case CCISS_GETINTINFO: 1729 return cciss_getintinfo(h, argp); 1730 case CCISS_SETINTINFO: 1731 return cciss_setintinfo(h, argp); 1732 case CCISS_GETNODENAME: 1733 return cciss_getnodename(h, argp); 1734 case CCISS_SETNODENAME: 1735 return cciss_setnodename(h, argp); 1736 case CCISS_GETHEARTBEAT: 1737 return cciss_getheartbeat(h, argp); 1738 case CCISS_GETBUSTYPES: 1739 return cciss_getbustypes(h, argp); 1740 case CCISS_GETFIRMVER: 1741 return cciss_getfirmver(h, argp); 1742 case CCISS_GETDRIVVER: 1743 return cciss_getdrivver(h, argp); 1744 case CCISS_DEREGDISK: 1745 case CCISS_REGNEWD: 1746 case CCISS_REVALIDVOLS: 1747 return rebuild_lun_table(h, 0, 1); 1748 case CCISS_GETLUNINFO: 1749 return cciss_getluninfo(h, disk, argp); 1750 case CCISS_PASSTHRU: 1751 return cciss_passthru(h, argp); 1752 case CCISS_BIG_PASSTHRU: 1753 return cciss_bigpassthru(h, argp); 1754 1755 /* scsi_cmd_blk_ioctl handles these, below, though some are not */ 1756 /* very meaningful for cciss. SG_IO is the main one people want. */ 1757 1758 case SG_GET_VERSION_NUM: 1759 case SG_SET_TIMEOUT: 1760 case SG_GET_TIMEOUT: 1761 case SG_GET_RESERVED_SIZE: 1762 case SG_SET_RESERVED_SIZE: 1763 case SG_EMULATED_HOST: 1764 case SG_IO: 1765 case SCSI_IOCTL_SEND_COMMAND: 1766 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp); 1767 1768 /* scsi_cmd_blk_ioctl would normally handle these, below, but */ 1769 /* they aren't a good fit for cciss, as CD-ROMs are */ 1770 /* not supported, and we don't have any bus/target/lun */ 1771 /* which we present to the kernel. */ 1772 1773 case CDROM_SEND_PACKET: 1774 case CDROMCLOSETRAY: 1775 case CDROMEJECT: 1776 case SCSI_IOCTL_GET_IDLUN: 1777 case SCSI_IOCTL_GET_BUS_NUMBER: 1778 default: 1779 return -ENOTTY; 1780 } 1781} 1782 1783static void cciss_check_queues(ctlr_info_t *h) 1784{ 1785 int start_queue = h->next_to_run; 1786 int i; 1787 1788 /* check to see if we have maxed out the number of commands that can 1789 * be placed on the queue. If so then exit. We do this check here 1790 * in case the interrupt we serviced was from an ioctl and did not 1791 * free any new commands. 1792 */ 1793 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) 1794 return; 1795 1796 /* We have room on the queue for more commands. Now we need to queue 1797 * them up. We will also keep track of the next queue to run so 1798 * that every queue gets a chance to be started first. 1799 */ 1800 for (i = 0; i < h->highest_lun + 1; i++) { 1801 int curr_queue = (start_queue + i) % (h->highest_lun + 1); 1802 /* make sure the disk has been added and the drive is real 1803 * because this can be called from the middle of init_one. 1804 */ 1805 if (!h->drv[curr_queue]) 1806 continue; 1807 if (!(h->drv[curr_queue]->queue) || 1808 !(h->drv[curr_queue]->heads)) 1809 continue; 1810 blk_start_queue(h->gendisk[curr_queue]->queue); 1811 1812 /* check to see if we have maxed out the number of commands 1813 * that can be placed on the queue. 1814 */ 1815 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) { 1816 if (curr_queue == start_queue) { 1817 h->next_to_run = 1818 (start_queue + 1) % (h->highest_lun + 1); 1819 break; 1820 } else { 1821 h->next_to_run = curr_queue; 1822 break; 1823 } 1824 } 1825 } 1826} 1827 1828static void cciss_softirq_done(struct request *rq) 1829{ 1830 CommandList_struct *c = rq->completion_data; 1831 ctlr_info_t *h = hba[c->ctlr]; 1832 SGDescriptor_struct *curr_sg = c->SG; 1833 u64bit temp64; 1834 unsigned long flags; 1835 int i, ddir; 1836 int sg_index = 0; 1837 1838 if (c->Request.Type.Direction == XFER_READ) 1839 ddir = PCI_DMA_FROMDEVICE; 1840 else 1841 ddir = PCI_DMA_TODEVICE; 1842 1843 /* command did not need to be retried */ 1844 /* unmap the DMA mapping for all the scatter gather elements */ 1845 for (i = 0; i < c->Header.SGList; i++) { 1846 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) { 1847 cciss_unmap_sg_chain_block(h, c); 1848 /* Point to the next block */ 1849 curr_sg = h->cmd_sg_list[c->cmdindex]; 1850 sg_index = 0; 1851 } 1852 temp64.val32.lower = curr_sg[sg_index].Addr.lower; 1853 temp64.val32.upper = curr_sg[sg_index].Addr.upper; 1854 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len, 1855 ddir); 1856 ++sg_index; 1857 } 1858 1859 dev_dbg(&h->pdev->dev, "Done with %p\n", rq); 1860 1861 /* set the residual count for pc requests */ 1862 if (rq->cmd_type == REQ_TYPE_BLOCK_PC) 1863 rq->resid_len = c->err_info->ResidualCnt; 1864 1865 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO); 1866 1867 spin_lock_irqsave(&h->lock, flags); 1868 cmd_free(h, c); 1869 cciss_check_queues(h); 1870 spin_unlock_irqrestore(&h->lock, flags); 1871} 1872 1873static inline void log_unit_to_scsi3addr(ctlr_info_t *h, 1874 unsigned char scsi3addr[], uint32_t log_unit) 1875{ 1876 memcpy(scsi3addr, h->drv[log_unit]->LunID, 1877 sizeof(h->drv[log_unit]->LunID)); 1878} 1879 1880/* This function gets the SCSI vendor, model, and revision of a logical drive 1881 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if 1882 * they cannot be read. 1883 */ 1884static void cciss_get_device_descr(ctlr_info_t *h, int logvol, 1885 char *vendor, char *model, char *rev) 1886{ 1887 int rc; 1888 InquiryData_struct *inq_buf; 1889 unsigned char scsi3addr[8]; 1890 1891 *vendor = '\0'; 1892 *model = '\0'; 1893 *rev = '\0'; 1894 1895 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); 1896 if (!inq_buf) 1897 return; 1898 1899 log_unit_to_scsi3addr(h, scsi3addr, logvol); 1900 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0, 1901 scsi3addr, TYPE_CMD); 1902 if (rc == IO_OK) { 1903 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN); 1904 vendor[VENDOR_LEN] = '\0'; 1905 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN); 1906 model[MODEL_LEN] = '\0'; 1907 memcpy(rev, &inq_buf->data_byte[32], REV_LEN); 1908 rev[REV_LEN] = '\0'; 1909 } 1910 1911 kfree(inq_buf); 1912 return; 1913} 1914 1915/* This function gets the serial number of a logical drive via 1916 * inquiry page 0x83. Serial no. is 16 bytes. If the serial 1917 * number cannot be had, for whatever reason, 16 bytes of 0xff 1918 * are returned instead. 1919 */ 1920static void cciss_get_serial_no(ctlr_info_t *h, int logvol, 1921 unsigned char *serial_no, int buflen) 1922{ 1923#define PAGE_83_INQ_BYTES 64 1924 int rc; 1925 unsigned char *buf; 1926 unsigned char scsi3addr[8]; 1927 1928 if (buflen > 16) 1929 buflen = 16; 1930 memset(serial_no, 0xff, buflen); 1931 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL); 1932 if (!buf) 1933 return; 1934 memset(serial_no, 0, buflen); 1935 log_unit_to_scsi3addr(h, scsi3addr, logvol); 1936 rc = sendcmd_withirq(h, CISS_INQUIRY, buf, 1937 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD); 1938 if (rc == IO_OK) 1939 memcpy(serial_no, &buf[8], buflen); 1940 kfree(buf); 1941 return; 1942} 1943 1944/* 1945 * cciss_add_disk sets up the block device queue for a logical drive 1946 */ 1947static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk, 1948 int drv_index) 1949{ 1950 disk->queue = blk_init_queue(do_cciss_request, &h->lock); 1951 if (!disk->queue) 1952 goto init_queue_failure; 1953 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index); 1954 disk->major = h->major; 1955 disk->first_minor = drv_index << NWD_SHIFT; 1956 disk->fops = &cciss_fops; 1957 if (cciss_create_ld_sysfs_entry(h, drv_index)) 1958 goto cleanup_queue; 1959 disk->private_data = h->drv[drv_index]; 1960 disk->driverfs_dev = &h->drv[drv_index]->dev; 1961 1962 /* Set up queue information */ 1963 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask); 1964 1965 /* This is a hardware imposed limit. */ 1966 blk_queue_max_segments(disk->queue, h->maxsgentries); 1967 1968 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors); 1969 1970 blk_queue_softirq_done(disk->queue, cciss_softirq_done); 1971 1972 disk->queue->queuedata = h; 1973 1974 blk_queue_logical_block_size(disk->queue, 1975 h->drv[drv_index]->block_size); 1976 1977 /* Make sure all queue data is written out before */ 1978 /* setting h->drv[drv_index]->queue, as setting this */ 1979 /* allows the interrupt handler to start the queue */ 1980 wmb(); 1981 h->drv[drv_index]->queue = disk->queue; 1982 add_disk(disk); 1983 return 0; 1984 1985cleanup_queue: 1986 blk_cleanup_queue(disk->queue); 1987 disk->queue = NULL; 1988init_queue_failure: 1989 return -1; 1990} 1991 1992/* This function will check the usage_count of the drive to be updated/added. 1993 * If the usage_count is zero and it is a heretofore unknown drive, or, 1994 * the drive's capacity, geometry, or serial number has changed, 1995 * then the drive information will be updated and the disk will be 1996 * re-registered with the kernel. If these conditions don't hold, 1997 * then it will be left alone for the next reboot. The exception to this 1998 * is disk 0 which will always be left registered with the kernel since it 1999 * is also the controller node. Any changes to disk 0 will show up on 2000 * the next reboot. 2001 */ 2002static void cciss_update_drive_info(ctlr_info_t *h, int drv_index, 2003 int first_time, int via_ioctl) 2004{ 2005 struct gendisk *disk; 2006 InquiryData_struct *inq_buff = NULL; 2007 unsigned int block_size; 2008 sector_t total_size; 2009 unsigned long flags = 0; 2010 int ret = 0; 2011 drive_info_struct *drvinfo; 2012 2013 /* Get information about the disk and modify the driver structure */ 2014 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); 2015 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL); 2016 if (inq_buff == NULL || drvinfo == NULL) 2017 goto mem_msg; 2018 2019 /* testing to see if 16-byte CDBs are already being used */ 2020 if (h->cciss_read == CCISS_READ_16) { 2021 cciss_read_capacity_16(h, drv_index, 2022 &total_size, &block_size); 2023 2024 } else { 2025 cciss_read_capacity(h, drv_index, &total_size, &block_size); 2026 /* if read_capacity returns all F's this volume is >2TB */ 2027 /* in size so we switch to 16-byte CDB's for all */ 2028 /* read/write ops */ 2029 if (total_size == 0xFFFFFFFFULL) { 2030 cciss_read_capacity_16(h, drv_index, 2031 &total_size, &block_size); 2032 h->cciss_read = CCISS_READ_16; 2033 h->cciss_write = CCISS_WRITE_16; 2034 } else { 2035 h->cciss_read = CCISS_READ_10; 2036 h->cciss_write = CCISS_WRITE_10; 2037 } 2038 } 2039 2040 cciss_geometry_inquiry(h, drv_index, total_size, block_size, 2041 inq_buff, drvinfo); 2042 drvinfo->block_size = block_size; 2043 drvinfo->nr_blocks = total_size + 1; 2044 2045 cciss_get_device_descr(h, drv_index, drvinfo->vendor, 2046 drvinfo->model, drvinfo->rev); 2047 cciss_get_serial_no(h, drv_index, drvinfo->serial_no, 2048 sizeof(drvinfo->serial_no)); 2049 /* Save the lunid in case we deregister the disk, below. */ 2050 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID, 2051 sizeof(drvinfo->LunID)); 2052 2053 /* Is it the same disk we already know, and nothing's changed? */ 2054 if (h->drv[drv_index]->raid_level != -1 && 2055 ((memcmp(drvinfo->serial_no, 2056 h->drv[drv_index]->serial_no, 16) == 0) && 2057 drvinfo->block_size == h->drv[drv_index]->block_size && 2058 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks && 2059 drvinfo->heads == h->drv[drv_index]->heads && 2060 drvinfo->sectors == h->drv[drv_index]->sectors && 2061 drvinfo->cylinders == h->drv[drv_index]->cylinders)) 2062 /* The disk is unchanged, nothing to update */ 2063 goto freeret; 2064 2065 /* If we get here it's not the same disk, or something's changed, 2066 * so we need to * deregister it, and re-register it, if it's not 2067 * in use. 2068 * If the disk already exists then deregister it before proceeding 2069 * (unless it's the first disk (for the controller node). 2070 */ 2071 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) { 2072 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index); 2073 spin_lock_irqsave(&h->lock, flags); 2074 h->drv[drv_index]->busy_configuring = 1; 2075 spin_unlock_irqrestore(&h->lock, flags); 2076 2077 /* deregister_disk sets h->drv[drv_index]->queue = NULL 2078 * which keeps the interrupt handler from starting 2079 * the queue. 2080 */ 2081 ret = deregister_disk(h, drv_index, 0, via_ioctl); 2082 } 2083 2084 /* If the disk is in use return */ 2085 if (ret) 2086 goto freeret; 2087 2088 /* Save the new information from cciss_geometry_inquiry 2089 * and serial number inquiry. If the disk was deregistered 2090 * above, then h->drv[drv_index] will be NULL. 2091 */ 2092 if (h->drv[drv_index] == NULL) { 2093 drvinfo->device_initialized = 0; 2094 h->drv[drv_index] = drvinfo; 2095 drvinfo = NULL; /* so it won't be freed below. */ 2096 } else { 2097 /* special case for cxd0 */ 2098 h->drv[drv_index]->block_size = drvinfo->block_size; 2099 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks; 2100 h->drv[drv_index]->heads = drvinfo->heads; 2101 h->drv[drv_index]->sectors = drvinfo->sectors; 2102 h->drv[drv_index]->cylinders = drvinfo->cylinders; 2103 h->drv[drv_index]->raid_level = drvinfo->raid_level; 2104 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16); 2105 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor, 2106 VENDOR_LEN + 1); 2107 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1); 2108 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1); 2109 } 2110 2111 ++h->num_luns; 2112 disk = h->gendisk[drv_index]; 2113 set_capacity(disk, h->drv[drv_index]->nr_blocks); 2114 2115 /* If it's not disk 0 (drv_index != 0) 2116 * or if it was disk 0, but there was previously 2117 * no actual corresponding configured logical drive 2118 * (raid_leve == -1) then we want to update the 2119 * logical drive's information. 2120 */ 2121 if (drv_index || first_time) { 2122 if (cciss_add_disk(h, disk, drv_index) != 0) { 2123 cciss_free_gendisk(h, drv_index); 2124 cciss_free_drive_info(h, drv_index); 2125 dev_warn(&h->pdev->dev, "could not update disk %d\n", 2126 drv_index); 2127 --h->num_luns; 2128 } 2129 } 2130 2131freeret: 2132 kfree(inq_buff); 2133 kfree(drvinfo); 2134 return; 2135mem_msg: 2136 dev_err(&h->pdev->dev, "out of memory\n"); 2137 goto freeret; 2138} 2139 2140/* This function will find the first index of the controllers drive array 2141 * that has a null drv pointer and allocate the drive info struct and 2142 * will return that index This is where new drives will be added. 2143 * If the index to be returned is greater than the highest_lun index for 2144 * the controller then highest_lun is set * to this new index. 2145 * If there are no available indexes or if tha allocation fails, then -1 2146 * is returned. * "controller_node" is used to know if this is a real 2147 * logical drive, or just the controller node, which determines if this 2148 * counts towards highest_lun. 2149 */ 2150static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node) 2151{ 2152 int i; 2153 drive_info_struct *drv; 2154 2155 /* Search for an empty slot for our drive info */ 2156 for (i = 0; i < CISS_MAX_LUN; i++) { 2157 2158 /* if not cxd0 case, and it's occupied, skip it. */ 2159 if (h->drv[i] && i != 0) 2160 continue; 2161 /* 2162 * If it's cxd0 case, and drv is alloc'ed already, and a 2163 * disk is configured there, skip it. 2164 */ 2165 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1) 2166 continue; 2167 2168 /* 2169 * We've found an empty slot. Update highest_lun 2170 * provided this isn't just the fake cxd0 controller node. 2171 */ 2172 if (i > h->highest_lun && !controller_node) 2173 h->highest_lun = i; 2174 2175 /* If adding a real disk at cxd0, and it's already alloc'ed */ 2176 if (i == 0 && h->drv[i] != NULL) 2177 return i; 2178 2179 /* 2180 * Found an empty slot, not already alloc'ed. Allocate it. 2181 * Mark it with raid_level == -1, so we know it's new later on. 2182 */ 2183 drv = kzalloc(sizeof(*drv), GFP_KERNEL); 2184 if (!drv) 2185 return -1; 2186 drv->raid_level = -1; /* so we know it's new */ 2187 h->drv[i] = drv; 2188 return i; 2189 } 2190 return -1; 2191} 2192 2193static void cciss_free_drive_info(ctlr_info_t *h, int drv_index) 2194{ 2195 kfree(h->drv[drv_index]); 2196 h->drv[drv_index] = NULL; 2197} 2198 2199static void cciss_free_gendisk(ctlr_info_t *h, int drv_index) 2200{ 2201 put_disk(h->gendisk[drv_index]); 2202 h->gendisk[drv_index] = NULL; 2203} 2204 2205/* cciss_add_gendisk finds a free hba[]->drv structure 2206 * and allocates a gendisk if needed, and sets the lunid 2207 * in the drvinfo structure. It returns the index into 2208 * the ->drv[] array, or -1 if none are free. 2209 * is_controller_node indicates whether highest_lun should 2210 * count this disk, or if it's only being added to provide 2211 * a means to talk to the controller in case no logical 2212 * drives have yet been configured. 2213 */ 2214static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[], 2215 int controller_node) 2216{ 2217 int drv_index; 2218 2219 drv_index = cciss_alloc_drive_info(h, controller_node); 2220 if (drv_index == -1) 2221 return -1; 2222 2223 /*Check if the gendisk needs to be allocated */ 2224 if (!h->gendisk[drv_index]) { 2225 h->gendisk[drv_index] = 2226 alloc_disk(1 << NWD_SHIFT); 2227 if (!h->gendisk[drv_index]) { 2228 dev_err(&h->pdev->dev, 2229 "could not allocate a new disk %d\n", 2230 drv_index); 2231 goto err_free_drive_info; 2232 } 2233 } 2234 memcpy(h->drv[drv_index]->LunID, lunid, 2235 sizeof(h->drv[drv_index]->LunID)); 2236 if (cciss_create_ld_sysfs_entry(h, drv_index)) 2237 goto err_free_disk; 2238 /* Don't need to mark this busy because nobody */ 2239 /* else knows about this disk yet to contend */ 2240 /* for access to it. */ 2241 h->drv[drv_index]->busy_configuring = 0; 2242 wmb(); 2243 return drv_index; 2244 2245err_free_disk: 2246 cciss_free_gendisk(h, drv_index); 2247err_free_drive_info: 2248 cciss_free_drive_info(h, drv_index); 2249 return -1; 2250} 2251 2252/* This is for the special case of a controller which 2253 * has no logical drives. In this case, we still need 2254 * to register a disk so the controller can be accessed 2255 * by the Array Config Utility. 2256 */ 2257static void cciss_add_controller_node(ctlr_info_t *h) 2258{ 2259 struct gendisk *disk; 2260 int drv_index; 2261 2262 if (h->gendisk[0] != NULL) /* already did this? Then bail. */ 2263 return; 2264 2265 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1); 2266 if (drv_index == -1) 2267 goto error; 2268 h->drv[drv_index]->block_size = 512; 2269 h->drv[drv_index]->nr_blocks = 0; 2270 h->drv[drv_index]->heads = 0; 2271 h->drv[drv_index]->sectors = 0; 2272 h->drv[drv_index]->cylinders = 0; 2273 h->drv[drv_index]->raid_level = -1; 2274 memset(h->drv[drv_index]->serial_no, 0, 16); 2275 disk = h->gendisk[drv_index]; 2276 if (cciss_add_disk(h, disk, drv_index) == 0) 2277 return; 2278 cciss_free_gendisk(h, drv_index); 2279 cciss_free_drive_info(h, drv_index); 2280error: 2281 dev_warn(&h->pdev->dev, "could not add disk 0.\n"); 2282 return; 2283} 2284 2285/* This function will add and remove logical drives from the Logical 2286 * drive array of the controller and maintain persistency of ordering 2287 * so that mount points are preserved until the next reboot. This allows 2288 * for the removal of logical drives in the middle of the drive array 2289 * without a re-ordering of those drives. 2290 * INPUT 2291 * h = The controller to perform the operations on 2292 */ 2293static int rebuild_lun_table(ctlr_info_t *h, int first_time, 2294 int via_ioctl) 2295{ 2296 int num_luns; 2297 ReportLunData_struct *ld_buff = NULL; 2298 int return_code; 2299 int listlength = 0; 2300 int i; 2301 int drv_found; 2302 int drv_index = 0; 2303 unsigned char lunid[8] = CTLR_LUNID; 2304 unsigned long flags; 2305 2306 if (!capable(CAP_SYS_RAWIO)) 2307 return -EPERM; 2308 2309 /* Set busy_configuring flag for this operation */ 2310 spin_lock_irqsave(&h->lock, flags); 2311 if (h->busy_configuring) { 2312 spin_unlock_irqrestore(&h->lock, flags); 2313 return -EBUSY; 2314 } 2315 h->busy_configuring = 1; 2316 spin_unlock_irqrestore(&h->lock, flags); 2317 2318 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL); 2319 if (ld_buff == NULL) 2320 goto mem_msg; 2321 2322 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff, 2323 sizeof(ReportLunData_struct), 2324 0, CTLR_LUNID, TYPE_CMD); 2325 2326 if (return_code == IO_OK) 2327 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength); 2328 else { /* reading number of logical volumes failed */ 2329 dev_warn(&h->pdev->dev, 2330 "report logical volume command failed\n"); 2331 listlength = 0; 2332 goto freeret; 2333 } 2334 2335 num_luns = listlength / 8; /* 8 bytes per entry */ 2336 if (num_luns > CISS_MAX_LUN) { 2337 num_luns = CISS_MAX_LUN; 2338 dev_warn(&h->pdev->dev, "more luns configured" 2339 " on controller than can be handled by" 2340 " this driver.\n"); 2341 } 2342 2343 if (num_luns == 0) 2344 cciss_add_controller_node(h); 2345 2346 /* Compare controller drive array to driver's drive array 2347 * to see if any drives are missing on the controller due 2348 * to action of Array Config Utility (user deletes drive) 2349 * and deregister logical drives which have disappeared. 2350 */ 2351 for (i = 0; i <= h->highest_lun; i++) { 2352 int j; 2353 drv_found = 0; 2354 2355 /* skip holes in the array from already deleted drives */ 2356 if (h->drv[i] == NULL) 2357 continue; 2358 2359 for (j = 0; j < num_luns; j++) { 2360 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid)); 2361 if (memcmp(h->drv[i]->LunID, lunid, 2362 sizeof(lunid)) == 0) { 2363 drv_found = 1; 2364 break; 2365 } 2366 } 2367 if (!drv_found) { 2368 /* Deregister it from the OS, it's gone. */ 2369 spin_lock_irqsave(&h->lock, flags); 2370 h->drv[i]->busy_configuring = 1; 2371 spin_unlock_irqrestore(&h->lock, flags); 2372 return_code = deregister_disk(h, i, 1, via_ioctl); 2373 if (h->drv[i] != NULL) 2374 h->drv[i]->busy_configuring = 0; 2375 } 2376 } 2377 2378 /* Compare controller drive array to driver's drive array. 2379 * Check for updates in the drive information and any new drives 2380 * on the controller due to ACU adding logical drives, or changing 2381 * a logical drive's size, etc. Reregister any new/changed drives 2382 */ 2383 for (i = 0; i < num_luns; i++) { 2384 int j; 2385 2386 drv_found = 0; 2387 2388 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid)); 2389 /* Find if the LUN is already in the drive array 2390 * of the driver. If so then update its info 2391 * if not in use. If it does not exist then find 2392 * the first free index and add it. 2393 */ 2394 for (j = 0; j <= h->highest_lun; j++) { 2395 if (h->drv[j] != NULL && 2396 memcmp(h->drv[j]->LunID, lunid, 2397 sizeof(h->drv[j]->LunID)) == 0) { 2398 drv_index = j; 2399 drv_found = 1; 2400 break; 2401 } 2402 } 2403 2404 /* check if the drive was found already in the array */ 2405 if (!drv_found) { 2406 drv_index = cciss_add_gendisk(h, lunid, 0); 2407 if (drv_index == -1) 2408 goto freeret; 2409 } 2410 cciss_update_drive_info(h, drv_index, first_time, via_ioctl); 2411 } /* end for */ 2412 2413freeret: 2414 kfree(ld_buff); 2415 h->busy_configuring = 0; 2416 /* We return -1 here to tell the ACU that we have registered/updated 2417 * all of the drives that we can and to keep it from calling us 2418 * additional times. 2419 */ 2420 return -1; 2421mem_msg: 2422 dev_err(&h->pdev->dev, "out of memory\n"); 2423 h->busy_configuring = 0; 2424 goto freeret; 2425} 2426 2427static void cciss_clear_drive_info(drive_info_struct *drive_info) 2428{ 2429 /* zero out the disk size info */ 2430 drive_info->nr_blocks = 0; 2431 drive_info->block_size = 0; 2432 drive_info->heads = 0; 2433 drive_info->sectors = 0; 2434 drive_info->cylinders = 0; 2435 drive_info->raid_level = -1; 2436 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no)); 2437 memset(drive_info->model, 0, sizeof(drive_info->model)); 2438 memset(drive_info->rev, 0, sizeof(drive_info->rev)); 2439 memset(drive_info->vendor, 0, sizeof(drive_info->vendor)); 2440 /* 2441 * don't clear the LUNID though, we need to remember which 2442 * one this one is. 2443 */ 2444} 2445 2446/* This function will deregister the disk and it's queue from the 2447 * kernel. It must be called with the controller lock held and the 2448 * drv structures busy_configuring flag set. It's parameters are: 2449 * 2450 * disk = This is the disk to be deregistered 2451 * drv = This is the drive_info_struct associated with the disk to be 2452 * deregistered. It contains information about the disk used 2453 * by the driver. 2454 * clear_all = This flag determines whether or not the disk information 2455 * is going to be completely cleared out and the highest_lun 2456 * reset. Sometimes we want to clear out information about 2457 * the disk in preparation for re-adding it. In this case 2458 * the highest_lun should be left unchanged and the LunID 2459 * should not be cleared. 2460 * via_ioctl 2461 * This indicates whether we've reached this path via ioctl. 2462 * This affects the maximum usage count allowed for c0d0 to be messed with. 2463 * If this path is reached via ioctl(), then the max_usage_count will 2464 * be 1, as the process calling ioctl() has got to have the device open. 2465 * If we get here via sysfs, then the max usage count will be zero. 2466*/ 2467static int deregister_disk(ctlr_info_t *h, int drv_index, 2468 int clear_all, int via_ioctl) 2469{ 2470 int i; 2471 struct gendisk *disk; 2472 drive_info_struct *drv; 2473 int recalculate_highest_lun; 2474 2475 if (!capable(CAP_SYS_RAWIO)) 2476 return -EPERM; 2477 2478 drv = h->drv[drv_index]; 2479 disk = h->gendisk[drv_index]; 2480 2481 /* make sure logical volume is NOT is use */ 2482 if (clear_all || (h->gendisk[0] == disk)) { 2483 if (drv->usage_count > via_ioctl) 2484 return -EBUSY; 2485 } else if (drv->usage_count > 0) 2486 return -EBUSY; 2487 2488 recalculate_highest_lun = (drv == h->drv[h->highest_lun]); 2489 2490 /* invalidate the devices and deregister the disk. If it is disk 2491 * zero do not deregister it but just zero out it's values. This 2492 * allows us to delete disk zero but keep the controller registered. 2493 */ 2494 if (h->gendisk[0] != disk) { 2495 struct request_queue *q = disk->queue; 2496 if (disk->flags & GENHD_FL_UP) { 2497 cciss_destroy_ld_sysfs_entry(h, drv_index, 0); 2498 del_gendisk(disk); 2499 } 2500 if (q) 2501 blk_cleanup_queue(q); 2502 /* If clear_all is set then we are deleting the logical 2503 * drive, not just refreshing its info. For drives 2504 * other than disk 0 we will call put_disk. We do not 2505 * do this for disk 0 as we need it to be able to 2506 * configure the controller. 2507 */ 2508 if (clear_all){ 2509 /* This isn't pretty, but we need to find the 2510 * disk in our array and NULL our the pointer. 2511 * This is so that we will call alloc_disk if 2512 * this index is used again later. 2513 */ 2514 for (i=0; i < CISS_MAX_LUN; i++){ 2515 if (h->gendisk[i] == disk) { 2516 h->gendisk[i] = NULL; 2517 break; 2518 } 2519 } 2520 put_disk(disk); 2521 } 2522 } else { 2523 set_capacity(disk, 0); 2524 cciss_clear_drive_info(drv); 2525 } 2526 2527 --h->num_luns; 2528 2529 /* if it was the last disk, find the new hightest lun */ 2530 if (clear_all && recalculate_highest_lun) { 2531 int newhighest = -1; 2532 for (i = 0; i <= h->highest_lun; i++) { 2533 /* if the disk has size > 0, it is available */ 2534 if (h->drv[i] && h->drv[i]->heads) 2535 newhighest = i; 2536 } 2537 h->highest_lun = newhighest; 2538 } 2539 return 0; 2540} 2541 2542static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff, 2543 size_t size, __u8 page_code, unsigned char *scsi3addr, 2544 int cmd_type) 2545{ 2546 u64bit buff_dma_handle; 2547 int status = IO_OK; 2548 2549 c->cmd_type = CMD_IOCTL_PEND; 2550 c->Header.ReplyQueue = 0; 2551 if (buff != NULL) { 2552 c->Header.SGList = 1; 2553 c->Header.SGTotal = 1; 2554 } else { 2555 c->Header.SGList = 0; 2556 c->Header.SGTotal = 0; 2557 } 2558 c->Header.Tag.lower = c->busaddr; 2559 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 2560 2561 c->Request.Type.Type = cmd_type; 2562 if (cmd_type == TYPE_CMD) { 2563 switch (cmd) { 2564 case CISS_INQUIRY: 2565 /* are we trying to read a vital product page */ 2566 if (page_code != 0) { 2567 c->Request.CDB[1] = 0x01; 2568 c->Request.CDB[2] = page_code; 2569 } 2570 c->Request.CDBLen = 6; 2571 c->Request.Type.Attribute = ATTR_SIMPLE; 2572 c->Request.Type.Direction = XFER_READ; 2573 c->Request.Timeout = 0; 2574 c->Request.CDB[0] = CISS_INQUIRY; 2575 c->Request.CDB[4] = size & 0xFF; 2576 break; 2577 case CISS_REPORT_LOG: 2578 case CISS_REPORT_PHYS: 2579 /* Talking to controller so It's a physical command 2580 mode = 00 target = 0. Nothing to write. 2581 */ 2582 c->Request.CDBLen = 12; 2583 c->Request.Type.Attribute = ATTR_SIMPLE; 2584 c->Request.Type.Direction = XFER_READ; 2585 c->Request.Timeout = 0; 2586 c->Request.CDB[0] = cmd; 2587 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 2588 c->Request.CDB[7] = (size >> 16) & 0xFF; 2589 c->Request.CDB[8] = (size >> 8) & 0xFF; 2590 c->Request.CDB[9] = size & 0xFF; 2591 break; 2592 2593 case CCISS_READ_CAPACITY: 2594 c->Request.CDBLen = 10; 2595 c->Request.Type.Attribute = ATTR_SIMPLE; 2596 c->Request.Type.Direction = XFER_READ; 2597 c->Request.Timeout = 0; 2598 c->Request.CDB[0] = cmd; 2599 break; 2600 case CCISS_READ_CAPACITY_16: 2601 c->Request.CDBLen = 16; 2602 c->Request.Type.Attribute = ATTR_SIMPLE; 2603 c->Request.Type.Direction = XFER_READ; 2604 c->Request.Timeout = 0; 2605 c->Request.CDB[0] = cmd; 2606 c->Request.CDB[1] = 0x10; 2607 c->Request.CDB[10] = (size >> 24) & 0xFF; 2608 c->Request.CDB[11] = (size >> 16) & 0xFF; 2609 c->Request.CDB[12] = (size >> 8) & 0xFF; 2610 c->Request.CDB[13] = size & 0xFF; 2611 c->Request.Timeout = 0; 2612 c->Request.CDB[0] = cmd; 2613 break; 2614 case CCISS_CACHE_FLUSH: 2615 c->Request.CDBLen = 12; 2616 c->Request.Type.Attribute = ATTR_SIMPLE; 2617 c->Request.Type.Direction = XFER_WRITE; 2618 c->Request.Timeout = 0; 2619 c->Request.CDB[0] = BMIC_WRITE; 2620 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 2621 c->Request.CDB[7] = (size >> 8) & 0xFF; 2622 c->Request.CDB[8] = size & 0xFF; 2623 break; 2624 case TEST_UNIT_READY: 2625 c->Request.CDBLen = 6; 2626 c->Request.Type.Attribute = ATTR_SIMPLE; 2627 c->Request.Type.Direction = XFER_NONE; 2628 c->Request.Timeout = 0; 2629 break; 2630 default: 2631 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd); 2632 return IO_ERROR; 2633 } 2634 } else if (cmd_type == TYPE_MSG) { 2635 switch (cmd) { 2636 case CCISS_ABORT_MSG: 2637 c->Request.CDBLen = 12; 2638 c->Request.Type.Attribute = ATTR_SIMPLE; 2639 c->Request.Type.Direction = XFER_WRITE; 2640 c->Request.Timeout = 0; 2641 c->Request.CDB[0] = cmd; /* abort */ 2642 c->Request.CDB[1] = 0; /* abort a command */ 2643 /* buff contains the tag of the command to abort */ 2644 memcpy(&c->Request.CDB[4], buff, 8); 2645 break; 2646 case CCISS_RESET_MSG: 2647 c->Request.CDBLen = 16; 2648 c->Request.Type.Attribute = ATTR_SIMPLE; 2649 c->Request.Type.Direction = XFER_NONE; 2650 c->Request.Timeout = 0; 2651 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 2652 c->Request.CDB[0] = cmd; /* reset */ 2653 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET; 2654 break; 2655 case CCISS_NOOP_MSG: 2656 c->Request.CDBLen = 1; 2657 c->Request.Type.Attribute = ATTR_SIMPLE; 2658 c->Request.Type.Direction = XFER_WRITE; 2659 c->Request.Timeout = 0; 2660 c->Request.CDB[0] = cmd; 2661 break; 2662 default: 2663 dev_warn(&h->pdev->dev, 2664 "unknown message type %d\n", cmd); 2665 return IO_ERROR; 2666 } 2667 } else { 2668 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 2669 return IO_ERROR; 2670 } 2671 /* Fill in the scatter gather information */ 2672 if (size > 0) { 2673 buff_dma_handle.val = (__u64) pci_map_single(h->pdev, 2674 buff, size, 2675 PCI_DMA_BIDIRECTIONAL); 2676 c->SG[0].Addr.lower = buff_dma_handle.val32.lower; 2677 c->SG[0].Addr.upper = buff_dma_handle.val32.upper; 2678 c->SG[0].Len = size; 2679 c->SG[0].Ext = 0; /* we are not chaining */ 2680 } 2681 return status; 2682} 2683 2684static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr, 2685 u8 reset_type) 2686{ 2687 CommandList_struct *c; 2688 int return_status; 2689 2690 c = cmd_alloc(h); 2691 if (!c) 2692 return -ENOMEM; 2693 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0, 2694 CTLR_LUNID, TYPE_MSG); 2695 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 2696 if (return_status != IO_OK) { 2697 cmd_special_free(h, c); 2698 return return_status; 2699 } 2700 c->waiting = NULL; 2701 enqueue_cmd_and_start_io(h, c); 2702 /* Don't wait for completion, the reset won't complete. Don't free 2703 * the command either. This is the last command we will send before 2704 * re-initializing everything, so it doesn't matter and won't leak. 2705 */ 2706 return 0; 2707} 2708 2709static int check_target_status(ctlr_info_t *h, CommandList_struct *c) 2710{ 2711 switch (c->err_info->ScsiStatus) { 2712 case SAM_STAT_GOOD: 2713 return IO_OK; 2714 case SAM_STAT_CHECK_CONDITION: 2715 switch (0xf & c->err_info->SenseInfo[2]) { 2716 case 0: return IO_OK; /* no sense */ 2717 case 1: return IO_OK; /* recovered error */ 2718 default: 2719 if (check_for_unit_attention(h, c)) 2720 return IO_NEEDS_RETRY; 2721 dev_warn(&h->pdev->dev, "cmd 0x%02x " 2722 "check condition, sense key = 0x%02x\n", 2723 c->Request.CDB[0], c->err_info->SenseInfo[2]); 2724 } 2725 break; 2726 default: 2727 dev_warn(&h->pdev->dev, "cmd 0x%02x" 2728 "scsi status = 0x%02x\n", 2729 c->Request.CDB[0], c->err_info->ScsiStatus); 2730 break; 2731 } 2732 return IO_ERROR; 2733} 2734 2735static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c) 2736{ 2737 int return_status = IO_OK; 2738 2739 if (c->err_info->CommandStatus == CMD_SUCCESS) 2740 return IO_OK; 2741 2742 switch (c->err_info->CommandStatus) { 2743 case CMD_TARGET_STATUS: 2744 return_status = check_target_status(h, c); 2745 break; 2746 case CMD_DATA_UNDERRUN: 2747 case CMD_DATA_OVERRUN: 2748 /* expected for inquiry and report lun commands */ 2749 break; 2750 case CMD_INVALID: 2751 dev_warn(&h->pdev->dev, "cmd 0x%02x is " 2752 "reported invalid\n", c->Request.CDB[0]); 2753 return_status = IO_ERROR; 2754 break; 2755 case CMD_PROTOCOL_ERR: 2756 dev_warn(&h->pdev->dev, "cmd 0x%02x has " 2757 "protocol error\n", c->Request.CDB[0]); 2758 return_status = IO_ERROR; 2759 break; 2760 case CMD_HARDWARE_ERR: 2761 dev_warn(&h->pdev->dev, "cmd 0x%02x had " 2762 " hardware error\n", c->Request.CDB[0]); 2763 return_status = IO_ERROR; 2764 break; 2765 case CMD_CONNECTION_LOST: 2766 dev_warn(&h->pdev->dev, "cmd 0x%02x had " 2767 "connection lost\n", c->Request.CDB[0]); 2768 return_status = IO_ERROR; 2769 break; 2770 case CMD_ABORTED: 2771 dev_warn(&h->pdev->dev, "cmd 0x%02x was " 2772 "aborted\n", c->Request.CDB[0]); 2773 return_status = IO_ERROR; 2774 break; 2775 case CMD_ABORT_FAILED: 2776 dev_warn(&h->pdev->dev, "cmd 0x%02x reports " 2777 "abort failed\n", c->Request.CDB[0]); 2778 return_status = IO_ERROR; 2779 break; 2780 case CMD_UNSOLICITED_ABORT: 2781 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n", 2782 c->Request.CDB[0]); 2783 return_status = IO_NEEDS_RETRY; 2784 break; 2785 case CMD_UNABORTABLE: 2786 dev_warn(&h->pdev->dev, "cmd unabortable\n"); 2787 return_status = IO_ERROR; 2788 break; 2789 default: 2790 dev_warn(&h->pdev->dev, "cmd 0x%02x returned " 2791 "unknown status %x\n", c->Request.CDB[0], 2792 c->err_info->CommandStatus); 2793 return_status = IO_ERROR; 2794 } 2795 return return_status; 2796} 2797 2798static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, 2799 int attempt_retry) 2800{ 2801 DECLARE_COMPLETION_ONSTACK(wait); 2802 u64bit buff_dma_handle; 2803 int return_status = IO_OK; 2804 2805resend_cmd2: 2806 c->waiting = &wait; 2807 enqueue_cmd_and_start_io(h, c); 2808 2809 wait_for_completion(&wait); 2810 2811 if (c->err_info->CommandStatus == 0 || !attempt_retry) 2812 goto command_done; 2813 2814 return_status = process_sendcmd_error(h, c); 2815 2816 if (return_status == IO_NEEDS_RETRY && 2817 c->retry_count < MAX_CMD_RETRIES) { 2818 dev_warn(&h->pdev->dev, "retrying 0x%02x\n", 2819 c->Request.CDB[0]); 2820 c->retry_count++; 2821 /* erase the old error information */ 2822 memset(c->err_info, 0, sizeof(ErrorInfo_struct)); 2823 return_status = IO_OK; 2824 reinit_completion(&wait); 2825 goto resend_cmd2; 2826 } 2827 2828command_done: 2829 /* unlock the buffers from DMA */ 2830 buff_dma_handle.val32.lower = c->SG[0].Addr.lower; 2831 buff_dma_handle.val32.upper = c->SG[0].Addr.upper; 2832 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val, 2833 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL); 2834 return return_status; 2835} 2836 2837static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, 2838 __u8 page_code, unsigned char scsi3addr[], 2839 int cmd_type) 2840{ 2841 CommandList_struct *c; 2842 int return_status; 2843 2844 c = cmd_special_alloc(h); 2845 if (!c) 2846 return -ENOMEM; 2847 return_status = fill_cmd(h, c, cmd, buff, size, page_code, 2848 scsi3addr, cmd_type); 2849 if (return_status == IO_OK) 2850 return_status = sendcmd_withirq_core(h, c, 1); 2851 2852 cmd_special_free(h, c); 2853 return return_status; 2854} 2855 2856static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, 2857 sector_t total_size, 2858 unsigned int block_size, 2859 InquiryData_struct *inq_buff, 2860 drive_info_struct *drv) 2861{ 2862 int return_code; 2863 unsigned long t; 2864 unsigned char scsi3addr[8]; 2865 2866 memset(inq_buff, 0, sizeof(InquiryData_struct)); 2867 log_unit_to_scsi3addr(h, scsi3addr, logvol); 2868 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, 2869 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD); 2870 if (return_code == IO_OK) { 2871 if (inq_buff->data_byte[8] == 0xFF) { 2872 dev_warn(&h->pdev->dev, 2873 "reading geometry failed, volume " 2874 "does not support reading geometry\n"); 2875 drv->heads = 255; 2876 drv->sectors = 32; /* Sectors per track */ 2877 drv->cylinders = total_size + 1; 2878 drv->raid_level = RAID_UNKNOWN; 2879 } else { 2880 drv->heads = inq_buff->data_byte[6]; 2881 drv->sectors = inq_buff->data_byte[7]; 2882 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8; 2883 drv->cylinders += inq_buff->data_byte[5]; 2884 drv->raid_level = inq_buff->data_byte[8]; 2885 } 2886 drv->block_size = block_size; 2887 drv->nr_blocks = total_size + 1; 2888 t = drv->heads * drv->sectors; 2889 if (t > 1) { 2890 sector_t real_size = total_size + 1; 2891 unsigned long rem = sector_div(real_size, t); 2892 if (rem) 2893 real_size++; 2894 drv->cylinders = real_size; 2895 } 2896 } else { /* Get geometry failed */ 2897 dev_warn(&h->pdev->dev, "reading geometry failed\n"); 2898 } 2899} 2900 2901static void 2902cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size, 2903 unsigned int *block_size) 2904{ 2905 ReadCapdata_struct *buf; 2906 int return_code; 2907 unsigned char scsi3addr[8]; 2908 2909 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL); 2910 if (!buf) { 2911 dev_warn(&h->pdev->dev, "out of memory\n"); 2912 return; 2913 } 2914 2915 log_unit_to_scsi3addr(h, scsi3addr, logvol); 2916 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf, 2917 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD); 2918 if (return_code == IO_OK) { 2919 *total_size = be32_to_cpu(*(__be32 *) buf->total_size); 2920 *block_size = be32_to_cpu(*(__be32 *) buf->block_size); 2921 } else { /* read capacity command failed */ 2922 dev_warn(&h->pdev->dev, "read capacity failed\n"); 2923 *total_size = 0; 2924 *block_size = BLOCK_SIZE; 2925 } 2926 kfree(buf); 2927} 2928 2929static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, 2930 sector_t *total_size, unsigned int *block_size) 2931{ 2932 ReadCapdata_struct_16 *buf; 2933 int return_code; 2934 unsigned char scsi3addr[8]; 2935 2936 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL); 2937 if (!buf) { 2938 dev_warn(&h->pdev->dev, "out of memory\n"); 2939 return; 2940 } 2941 2942 log_unit_to_scsi3addr(h, scsi3addr, logvol); 2943 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16, 2944 buf, sizeof(ReadCapdata_struct_16), 2945 0, scsi3addr, TYPE_CMD); 2946 if (return_code == IO_OK) { 2947 *total_size = be64_to_cpu(*(__be64 *) buf->total_size); 2948 *block_size = be32_to_cpu(*(__be32 *) buf->block_size); 2949 } else { /* read capacity command failed */ 2950 dev_warn(&h->pdev->dev, "read capacity failed\n"); 2951 *total_size = 0; 2952 *block_size = BLOCK_SIZE; 2953 } 2954 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n", 2955 (unsigned long long)*total_size+1, *block_size); 2956 kfree(buf); 2957} 2958 2959static int cciss_revalidate(struct gendisk *disk) 2960{ 2961 ctlr_info_t *h = get_host(disk); 2962 drive_info_struct *drv = get_drv(disk); 2963 int logvol; 2964 int FOUND = 0; 2965 unsigned int block_size; 2966 sector_t total_size; 2967 InquiryData_struct *inq_buff = NULL; 2968 2969 for (logvol = 0; logvol <= h->highest_lun; logvol++) { 2970 if (!h->drv[logvol]) 2971 continue; 2972 if (memcmp(h->drv[logvol]->LunID, drv->LunID, 2973 sizeof(drv->LunID)) == 0) { 2974 FOUND = 1; 2975 break; 2976 } 2977 } 2978 2979 if (!FOUND) 2980 return 1; 2981 2982 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); 2983 if (inq_buff == NULL) { 2984 dev_warn(&h->pdev->dev, "out of memory\n"); 2985 return 1; 2986 } 2987 if (h->cciss_read == CCISS_READ_10) { 2988 cciss_read_capacity(h, logvol, 2989 &total_size, &block_size); 2990 } else { 2991 cciss_read_capacity_16(h, logvol, 2992 &total_size, &block_size); 2993 } 2994 cciss_geometry_inquiry(h, logvol, total_size, block_size, 2995 inq_buff, drv); 2996 2997 blk_queue_logical_block_size(drv->queue, drv->block_size); 2998 set_capacity(disk, drv->nr_blocks); 2999 3000 kfree(inq_buff); 3001 return 0; 3002} 3003 3004/* 3005 * Map (physical) PCI mem into (virtual) kernel space 3006 */ 3007static void __iomem *remap_pci_mem(ulong base, ulong size) 3008{ 3009 ulong page_base = ((ulong) base) & PAGE_MASK; 3010 ulong page_offs = ((ulong) base) - page_base; 3011 void __iomem *page_remapped = ioremap(page_base, page_offs + size); 3012 3013 return page_remapped ? (page_remapped + page_offs) : NULL; 3014} 3015 3016/* 3017 * Takes jobs of the Q and sends them to the hardware, then puts it on 3018 * the Q to wait for completion. 3019 */ 3020static void start_io(ctlr_info_t *h) 3021{ 3022 CommandList_struct *c; 3023 3024 while (!list_empty(&h->reqQ)) { 3025 c = list_entry(h->reqQ.next, CommandList_struct, list); 3026 /* can't do anything if fifo is full */ 3027 if ((h->access.fifo_full(h))) { 3028 dev_warn(&h->pdev->dev, "fifo full\n"); 3029 break; 3030 } 3031 3032 /* Get the first entry from the Request Q */ 3033 removeQ(c); 3034 h->Qdepth--; 3035 3036 /* Tell the controller execute command */ 3037 h->access.submit_command(h, c); 3038 3039 /* Put job onto the completed Q */ 3040 addQ(&h->cmpQ, c); 3041 } 3042} 3043 3044/* Assumes that h->lock is held. */ 3045/* Zeros out the error record and then resends the command back */ 3046/* to the controller */ 3047static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c) 3048{ 3049 /* erase the old error information */ 3050 memset(c->err_info, 0, sizeof(ErrorInfo_struct)); 3051 3052 /* add it to software queue and then send it to the controller */ 3053 addQ(&h->reqQ, c); 3054 h->Qdepth++; 3055 if (h->Qdepth > h->maxQsinceinit) 3056 h->maxQsinceinit = h->Qdepth; 3057 3058 start_io(h); 3059} 3060 3061static inline unsigned int make_status_bytes(unsigned int scsi_status_byte, 3062 unsigned int msg_byte, unsigned int host_byte, 3063 unsigned int driver_byte) 3064{ 3065 /* inverse of macros in scsi.h */ 3066 return (scsi_status_byte & 0xff) | 3067 ((msg_byte & 0xff) << 8) | 3068 ((host_byte & 0xff) << 16) | 3069 ((driver_byte & 0xff) << 24); 3070} 3071 3072static inline int evaluate_target_status(ctlr_info_t *h, 3073 CommandList_struct *cmd, int *retry_cmd) 3074{ 3075 unsigned char sense_key; 3076 unsigned char status_byte, msg_byte, host_byte, driver_byte; 3077 int error_value; 3078 3079 *retry_cmd = 0; 3080 /* If we get in here, it means we got "target status", that is, scsi status */ 3081 status_byte = cmd->err_info->ScsiStatus; 3082 driver_byte = DRIVER_OK; 3083 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */ 3084 3085 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) 3086 host_byte = DID_PASSTHROUGH; 3087 else 3088 host_byte = DID_OK; 3089 3090 error_value = make_status_bytes(status_byte, msg_byte, 3091 host_byte, driver_byte); 3092 3093 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) { 3094 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) 3095 dev_warn(&h->pdev->dev, "cmd %p " 3096 "has SCSI Status 0x%x\n", 3097 cmd, cmd->err_info->ScsiStatus); 3098 return error_value; 3099 } 3100 3101 /* check the sense key */ 3102 sense_key = 0xf & cmd->err_info->SenseInfo[2]; 3103 /* no status or recovered error */ 3104 if (((sense_key == 0x0) || (sense_key == 0x1)) && 3105 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)) 3106 error_value = 0; 3107 3108 if (check_for_unit_attention(h, cmd)) { 3109 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC); 3110 return 0; 3111 } 3112 3113 /* Not SG_IO or similar? */ 3114 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) { 3115 if (error_value != 0) 3116 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION" 3117 " sense key = 0x%x\n", cmd, sense_key); 3118 return error_value; 3119 } 3120 3121 /* SG_IO or similar, copy sense data back */ 3122 if (cmd->rq->sense) { 3123 if (cmd->rq->sense_len > cmd->err_info->SenseLen) 3124 cmd->rq->sense_len = cmd->err_info->SenseLen; 3125 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo, 3126 cmd->rq->sense_len); 3127 } else 3128 cmd->rq->sense_len = 0; 3129 3130 return error_value; 3131} 3132 3133/* checks the status of the job and calls complete buffers to mark all 3134 * buffers for the completed job. Note that this function does not need 3135 * to hold the hba/queue lock. 3136 */ 3137static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd, 3138 int timeout) 3139{ 3140 int retry_cmd = 0; 3141 struct request *rq = cmd->rq; 3142 3143 rq->errors = 0; 3144 3145 if (timeout) 3146 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT); 3147 3148 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */ 3149 goto after_error_processing; 3150 3151 switch (cmd->err_info->CommandStatus) { 3152 case CMD_TARGET_STATUS: 3153 rq->errors = evaluate_target_status(h, cmd, &retry_cmd); 3154 break; 3155 case CMD_DATA_UNDERRUN: 3156 if (cmd->rq->cmd_type == REQ_TYPE_FS) { 3157 dev_warn(&h->pdev->dev, "cmd %p has" 3158 " completed with data underrun " 3159 "reported\n", cmd); 3160 cmd->rq->resid_len = cmd->err_info->ResidualCnt; 3161 } 3162 break; 3163 case CMD_DATA_OVERRUN: 3164 if (cmd->rq->cmd_type == REQ_TYPE_FS) 3165 dev_warn(&h->pdev->dev, "cciss: cmd %p has" 3166 " completed with data overrun " 3167 "reported\n", cmd); 3168 break; 3169 case CMD_INVALID: 3170 dev_warn(&h->pdev->dev, "cciss: cmd %p is " 3171 "reported invalid\n", cmd); 3172 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3173 cmd->err_info->CommandStatus, DRIVER_OK, 3174 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3175 DID_PASSTHROUGH : DID_ERROR); 3176 break; 3177 case CMD_PROTOCOL_ERR: 3178 dev_warn(&h->pdev->dev, "cciss: cmd %p has " 3179 "protocol error\n", cmd); 3180 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3181 cmd->err_info->CommandStatus, DRIVER_OK, 3182 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3183 DID_PASSTHROUGH : DID_ERROR); 3184 break; 3185 case CMD_HARDWARE_ERR: 3186 dev_warn(&h->pdev->dev, "cciss: cmd %p had " 3187 " hardware error\n", cmd); 3188 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3189 cmd->err_info->CommandStatus, DRIVER_OK, 3190 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3191 DID_PASSTHROUGH : DID_ERROR); 3192 break; 3193 case CMD_CONNECTION_LOST: 3194 dev_warn(&h->pdev->dev, "cciss: cmd %p had " 3195 "connection lost\n", cmd); 3196 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3197 cmd->err_info->CommandStatus, DRIVER_OK, 3198 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3199 DID_PASSTHROUGH : DID_ERROR); 3200 break; 3201 case CMD_ABORTED: 3202 dev_warn(&h->pdev->dev, "cciss: cmd %p was " 3203 "aborted\n", cmd); 3204 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3205 cmd->err_info->CommandStatus, DRIVER_OK, 3206 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3207 DID_PASSTHROUGH : DID_ABORT); 3208 break; 3209 case CMD_ABORT_FAILED: 3210 dev_warn(&h->pdev->dev, "cciss: cmd %p reports " 3211 "abort failed\n", cmd); 3212 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3213 cmd->err_info->CommandStatus, DRIVER_OK, 3214 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3215 DID_PASSTHROUGH : DID_ERROR); 3216 break; 3217 case CMD_UNSOLICITED_ABORT: 3218 dev_warn(&h->pdev->dev, "cciss%d: unsolicited " 3219 "abort %p\n", h->ctlr, cmd); 3220 if (cmd->retry_count < MAX_CMD_RETRIES) { 3221 retry_cmd = 1; 3222 dev_warn(&h->pdev->dev, "retrying %p\n", cmd); 3223 cmd->retry_count++; 3224 } else 3225 dev_warn(&h->pdev->dev, 3226 "%p retried too many times\n", cmd); 3227 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3228 cmd->err_info->CommandStatus, DRIVER_OK, 3229 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3230 DID_PASSTHROUGH : DID_ABORT); 3231 break; 3232 case CMD_TIMEOUT: 3233 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd); 3234 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3235 cmd->err_info->CommandStatus, DRIVER_OK, 3236 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3237 DID_PASSTHROUGH : DID_ERROR); 3238 break; 3239 case CMD_UNABORTABLE: 3240 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd); 3241 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3242 cmd->err_info->CommandStatus, DRIVER_OK, 3243 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ? 3244 DID_PASSTHROUGH : DID_ERROR); 3245 break; 3246 default: 3247 dev_warn(&h->pdev->dev, "cmd %p returned " 3248 "unknown status %x\n", cmd, 3249 cmd->err_info->CommandStatus); 3250 rq->errors = make_status_bytes(SAM_STAT_GOOD, 3251 cmd->err_info->CommandStatus, DRIVER_OK, 3252 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? 3253 DID_PASSTHROUGH : DID_ERROR); 3254 } 3255 3256after_error_processing: 3257 3258 /* We need to return this command */ 3259 if (retry_cmd) { 3260 resend_cciss_cmd(h, cmd); 3261 return; 3262 } 3263 cmd->rq->completion_data = cmd; 3264 blk_complete_request(cmd->rq); 3265} 3266 3267static inline u32 cciss_tag_contains_index(u32 tag) 3268{ 3269#define DIRECT_LOOKUP_BIT 0x10 3270 return tag & DIRECT_LOOKUP_BIT; 3271} 3272 3273static inline u32 cciss_tag_to_index(u32 tag) 3274{ 3275#define DIRECT_LOOKUP_SHIFT 5 3276 return tag >> DIRECT_LOOKUP_SHIFT; 3277} 3278 3279static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag) 3280{ 3281#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) 3282#define CCISS_SIMPLE_ERROR_BITS 0x03 3283 if (likely(h->transMethod & CFGTBL_Trans_Performant)) 3284 return tag & ~CCISS_PERF_ERROR_BITS; 3285 return tag & ~CCISS_SIMPLE_ERROR_BITS; 3286} 3287 3288static inline void cciss_mark_tag_indexed(u32 *tag) 3289{ 3290 *tag |= DIRECT_LOOKUP_BIT; 3291} 3292 3293static inline void cciss_set_tag_index(u32 *tag, u32 index) 3294{ 3295 *tag |= (index << DIRECT_LOOKUP_SHIFT); 3296} 3297 3298/* 3299 * Get a request and submit it to the controller. 3300 */ 3301static void do_cciss_request(struct request_queue *q) 3302{ 3303 ctlr_info_t *h = q->queuedata; 3304 CommandList_struct *c; 3305 sector_t start_blk; 3306 int seg; 3307 struct request *creq; 3308 u64bit temp64; 3309 struct scatterlist *tmp_sg; 3310 SGDescriptor_struct *curr_sg; 3311 drive_info_struct *drv; 3312 int i, dir; 3313 int sg_index = 0; 3314 int chained = 0; 3315 3316 queue: 3317 creq = blk_peek_request(q); 3318 if (!creq) 3319 goto startio; 3320 3321 BUG_ON(creq->nr_phys_segments > h->maxsgentries); 3322 3323 c = cmd_alloc(h); 3324 if (!c) 3325 goto full; 3326 3327 blk_start_request(creq); 3328 3329 tmp_sg = h->scatter_list[c->cmdindex]; 3330 spin_unlock_irq(q->queue_lock); 3331 3332 c->cmd_type = CMD_RWREQ; 3333 c->rq = creq; 3334 3335 /* fill in the request */ 3336 drv = creq->rq_disk->private_data; 3337 c->Header.ReplyQueue = 0; /* unused in simple mode */ 3338 /* got command from pool, so use the command block index instead */ 3339 /* for direct lookups. */ 3340 /* The first 2 bits are reserved for controller error reporting. */ 3341 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex); 3342 cciss_mark_tag_indexed(&c->Header.Tag.lower); 3343 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID)); 3344 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */ 3345 c->Request.Type.Type = TYPE_CMD; /* It is a command. */ 3346 c->Request.Type.Attribute = ATTR_SIMPLE; 3347 c->Request.Type.Direction = 3348 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE; 3349 c->Request.Timeout = 0; /* Don't time out */ 3350 c->Request.CDB[0] = 3351 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write; 3352 start_blk = blk_rq_pos(creq); 3353 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n", 3354 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq)); 3355 sg_init_table(tmp_sg, h->maxsgentries); 3356 seg = blk_rq_map_sg(q, creq, tmp_sg); 3357 3358 /* get the DMA records for the setup */ 3359 if (c->Request.Type.Direction == XFER_READ) 3360 dir = PCI_DMA_FROMDEVICE; 3361 else 3362 dir = PCI_DMA_TODEVICE; 3363 3364 curr_sg = c->SG; 3365 sg_index = 0; 3366 chained = 0; 3367 3368 for (i = 0; i < seg; i++) { 3369 if (((sg_index+1) == (h->max_cmd_sgentries)) && 3370 !chained && ((seg - i) > 1)) { 3371 /* Point to next chain block. */ 3372 curr_sg = h->cmd_sg_list[c->cmdindex]; 3373 sg_index = 0; 3374 chained = 1; 3375 } 3376 curr_sg[sg_index].Len = tmp_sg[i].length; 3377 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]), 3378 tmp_sg[i].offset, 3379 tmp_sg[i].length, dir); 3380 curr_sg[sg_index].Addr.lower = temp64.val32.lower; 3381 curr_sg[sg_index].Addr.upper = temp64.val32.upper; 3382 curr_sg[sg_index].Ext = 0; /* we are not chaining */ 3383 ++sg_index; 3384 } 3385 if (chained) 3386 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex], 3387 (seg - (h->max_cmd_sgentries - 1)) * 3388 sizeof(SGDescriptor_struct)); 3389 3390 /* track how many SG entries we are using */ 3391 if (seg > h->maxSG) 3392 h->maxSG = seg; 3393 3394 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments " 3395 "chained[%d]\n", 3396 blk_rq_sectors(creq), seg, chained); 3397 3398 c->Header.SGTotal = seg + chained; 3399 if (seg <= h->max_cmd_sgentries) 3400 c->Header.SGList = c->Header.SGTotal; 3401 else 3402 c->Header.SGList = h->max_cmd_sgentries; 3403 set_performant_mode(h, c); 3404 3405 if (likely(creq->cmd_type == REQ_TYPE_FS)) { 3406 if(h->cciss_read == CCISS_READ_10) { 3407 c->Request.CDB[1] = 0; 3408 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */ 3409 c->Request.CDB[3] = (start_blk >> 16) & 0xff; 3410 c->Request.CDB[4] = (start_blk >> 8) & 0xff; 3411 c->Request.CDB[5] = start_blk & 0xff; 3412 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */ 3413 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff; 3414 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff; 3415 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0; 3416 } else { 3417 u32 upper32 = upper_32_bits(start_blk); 3418 3419 c->Request.CDBLen = 16; 3420 c->Request.CDB[1]= 0; 3421 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */ 3422 c->Request.CDB[3]= (upper32 >> 16) & 0xff; 3423 c->Request.CDB[4]= (upper32 >> 8) & 0xff; 3424 c->Request.CDB[5]= upper32 & 0xff; 3425 c->Request.CDB[6]= (start_blk >> 24) & 0xff; 3426 c->Request.CDB[7]= (start_blk >> 16) & 0xff; 3427 c->Request.CDB[8]= (start_blk >> 8) & 0xff; 3428 c->Request.CDB[9]= start_blk & 0xff; 3429 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff; 3430 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff; 3431 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff; 3432 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff; 3433 c->Request.CDB[14] = c->Request.CDB[15] = 0; 3434 } 3435 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) { 3436 c->Request.CDBLen = creq->cmd_len; 3437 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB); 3438 } else { 3439 dev_warn(&h->pdev->dev, "bad request type %d\n", 3440 creq->cmd_type); 3441 BUG(); 3442 } 3443 3444 spin_lock_irq(q->queue_lock); 3445 3446 addQ(&h->reqQ, c); 3447 h->Qdepth++; 3448 if (h->Qdepth > h->maxQsinceinit) 3449 h->maxQsinceinit = h->Qdepth; 3450 3451 goto queue; 3452full: 3453 blk_stop_queue(q); 3454startio: 3455 /* We will already have the driver lock here so not need 3456 * to lock it. 3457 */ 3458 start_io(h); 3459} 3460 3461static inline unsigned long get_next_completion(ctlr_info_t *h) 3462{ 3463 return h->access.command_completed(h); 3464} 3465 3466static inline int interrupt_pending(ctlr_info_t *h) 3467{ 3468 return h->access.intr_pending(h); 3469} 3470 3471static inline long interrupt_not_for_us(ctlr_info_t *h) 3472{ 3473 return ((h->access.intr_pending(h) == 0) || 3474 (h->interrupts_enabled == 0)); 3475} 3476 3477static inline int bad_tag(ctlr_info_t *h, u32 tag_index, 3478 u32 raw_tag) 3479{ 3480 if (unlikely(tag_index >= h->nr_cmds)) { 3481 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 3482 return 1; 3483 } 3484 return 0; 3485} 3486 3487static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c, 3488 u32 raw_tag) 3489{ 3490 removeQ(c); 3491 if (likely(c->cmd_type == CMD_RWREQ)) 3492 complete_command(h, c, 0); 3493 else if (c->cmd_type == CMD_IOCTL_PEND) 3494 complete(c->waiting); 3495#ifdef CONFIG_CISS_SCSI_TAPE 3496 else if (c->cmd_type == CMD_SCSI) 3497 complete_scsi_command(c, 0, raw_tag); 3498#endif 3499} 3500 3501static inline u32 next_command(ctlr_info_t *h) 3502{ 3503 u32 a; 3504 3505 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 3506 return h->access.command_completed(h); 3507 3508 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { 3509 a = *(h->reply_pool_head); /* Next cmd in ring buffer */ 3510 (h->reply_pool_head)++; 3511 h->commands_outstanding--; 3512 } else { 3513 a = FIFO_EMPTY; 3514 } 3515 /* Check for wraparound */ 3516 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { 3517 h->reply_pool_head = h->reply_pool; 3518 h->reply_pool_wraparound ^= 1; 3519 } 3520 return a; 3521} 3522 3523/* process completion of an indexed ("direct lookup") command */ 3524static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag) 3525{ 3526 u32 tag_index; 3527 CommandList_struct *c; 3528 3529 tag_index = cciss_tag_to_index(raw_tag); 3530 if (bad_tag(h, tag_index, raw_tag)) 3531 return next_command(h); 3532 c = h->cmd_pool + tag_index; 3533 finish_cmd(h, c, raw_tag); 3534 return next_command(h); 3535} 3536 3537/* process completion of a non-indexed command */ 3538static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag) 3539{ 3540 CommandList_struct *c = NULL; 3541 __u32 busaddr_masked, tag_masked; 3542 3543 tag_masked = cciss_tag_discard_error_bits(h, raw_tag); 3544 list_for_each_entry(c, &h->cmpQ, list) { 3545 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr); 3546 if (busaddr_masked == tag_masked) { 3547 finish_cmd(h, c, raw_tag); 3548 return next_command(h); 3549 } 3550 } 3551 bad_tag(h, h->nr_cmds + 1, raw_tag); 3552 return next_command(h); 3553} 3554 3555/* Some controllers, like p400, will give us one interrupt 3556 * after a soft reset, even if we turned interrupts off. 3557 * Only need to check for this in the cciss_xxx_discard_completions 3558 * functions. 3559 */ 3560static int ignore_bogus_interrupt(ctlr_info_t *h) 3561{ 3562 if (likely(!reset_devices)) 3563 return 0; 3564 3565 if (likely(h->interrupts_enabled)) 3566 return 0; 3567 3568 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 3569 "(known firmware bug.) Ignoring.\n"); 3570 3571 return 1; 3572} 3573 3574static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id) 3575{ 3576 ctlr_info_t *h = dev_id; 3577 unsigned long flags; 3578 u32 raw_tag; 3579 3580 if (ignore_bogus_interrupt(h)) 3581 return IRQ_NONE; 3582 3583 if (interrupt_not_for_us(h)) 3584 return IRQ_NONE; 3585 spin_lock_irqsave(&h->lock, flags); 3586 while (interrupt_pending(h)) { 3587 raw_tag = get_next_completion(h); 3588 while (raw_tag != FIFO_EMPTY) 3589 raw_tag = next_command(h); 3590 } 3591 spin_unlock_irqrestore(&h->lock, flags); 3592 return IRQ_HANDLED; 3593} 3594 3595static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id) 3596{ 3597 ctlr_info_t *h = dev_id; 3598 unsigned long flags; 3599 u32 raw_tag; 3600 3601 if (ignore_bogus_interrupt(h)) 3602 return IRQ_NONE; 3603 3604 spin_lock_irqsave(&h->lock, flags); 3605 raw_tag = get_next_completion(h); 3606 while (raw_tag != FIFO_EMPTY) 3607 raw_tag = next_command(h); 3608 spin_unlock_irqrestore(&h->lock, flags); 3609 return IRQ_HANDLED; 3610} 3611 3612static irqreturn_t do_cciss_intx(int irq, void *dev_id) 3613{ 3614 ctlr_info_t *h = dev_id; 3615 unsigned long flags; 3616 u32 raw_tag; 3617 3618 if (interrupt_not_for_us(h)) 3619 return IRQ_NONE; 3620 spin_lock_irqsave(&h->lock, flags); 3621 while (interrupt_pending(h)) { 3622 raw_tag = get_next_completion(h); 3623 while (raw_tag != FIFO_EMPTY) { 3624 if (cciss_tag_contains_index(raw_tag)) 3625 raw_tag = process_indexed_cmd(h, raw_tag); 3626 else 3627 raw_tag = process_nonindexed_cmd(h, raw_tag); 3628 } 3629 } 3630 spin_unlock_irqrestore(&h->lock, flags); 3631 return IRQ_HANDLED; 3632} 3633 3634/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never 3635 * check the interrupt pending register because it is not set. 3636 */ 3637static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id) 3638{ 3639 ctlr_info_t *h = dev_id; 3640 unsigned long flags; 3641 u32 raw_tag; 3642 3643 spin_lock_irqsave(&h->lock, flags); 3644 raw_tag = get_next_completion(h); 3645 while (raw_tag != FIFO_EMPTY) { 3646 if (cciss_tag_contains_index(raw_tag)) 3647 raw_tag = process_indexed_cmd(h, raw_tag); 3648 else 3649 raw_tag = process_nonindexed_cmd(h, raw_tag); 3650 } 3651 spin_unlock_irqrestore(&h->lock, flags); 3652 return IRQ_HANDLED; 3653} 3654 3655/** 3656 * add_to_scan_list() - add controller to rescan queue 3657 * @h: Pointer to the controller. 3658 * 3659 * Adds the controller to the rescan queue if not already on the queue. 3660 * 3661 * returns 1 if added to the queue, 0 if skipped (could be on the 3662 * queue already, or the controller could be initializing or shutting 3663 * down). 3664 **/ 3665static int add_to_scan_list(struct ctlr_info *h) 3666{ 3667 struct ctlr_info *test_h; 3668 int found = 0; 3669 int ret = 0; 3670 3671 if (h->busy_initializing) 3672 return 0; 3673 3674 if (!mutex_trylock(&h->busy_shutting_down)) 3675 return 0; 3676 3677 mutex_lock(&scan_mutex); 3678 list_for_each_entry(test_h, &scan_q, scan_list) { 3679 if (test_h == h) { 3680 found = 1; 3681 break; 3682 } 3683 } 3684 if (!found && !h->busy_scanning) { 3685 reinit_completion(&h->scan_wait); 3686 list_add_tail(&h->scan_list, &scan_q); 3687 ret = 1; 3688 } 3689 mutex_unlock(&scan_mutex); 3690 mutex_unlock(&h->busy_shutting_down); 3691 3692 return ret; 3693} 3694 3695/** 3696 * remove_from_scan_list() - remove controller from rescan queue 3697 * @h: Pointer to the controller. 3698 * 3699 * Removes the controller from the rescan queue if present. Blocks if 3700 * the controller is currently conducting a rescan. The controller 3701 * can be in one of three states: 3702 * 1. Doesn't need a scan 3703 * 2. On the scan list, but not scanning yet (we remove it) 3704 * 3. Busy scanning (and not on the list). In this case we want to wait for 3705 * the scan to complete to make sure the scanning thread for this 3706 * controller is completely idle. 3707 **/ 3708static void remove_from_scan_list(struct ctlr_info *h) 3709{ 3710 struct ctlr_info *test_h, *tmp_h; 3711 3712 mutex_lock(&scan_mutex); 3713 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) { 3714 if (test_h == h) { /* state 2. */ 3715 list_del(&h->scan_list); 3716 complete_all(&h->scan_wait); 3717 mutex_unlock(&scan_mutex); 3718 return; 3719 } 3720 } 3721 if (h->busy_scanning) { /* state 3. */ 3722 mutex_unlock(&scan_mutex); 3723 wait_for_completion(&h->scan_wait); 3724 } else { /* state 1, nothing to do. */ 3725 mutex_unlock(&scan_mutex); 3726 } 3727} 3728 3729/** 3730 * scan_thread() - kernel thread used to rescan controllers 3731 * @data: Ignored. 3732 * 3733 * A kernel thread used scan for drive topology changes on 3734 * controllers. The thread processes only one controller at a time 3735 * using a queue. Controllers are added to the queue using 3736 * add_to_scan_list() and removed from the queue either after done 3737 * processing or using remove_from_scan_list(). 3738 * 3739 * returns 0. 3740 **/ 3741static int scan_thread(void *data) 3742{ 3743 struct ctlr_info *h; 3744 3745 while (1) { 3746 set_current_state(TASK_INTERRUPTIBLE); 3747 schedule(); 3748 if (kthread_should_stop()) 3749 break; 3750 3751 while (1) { 3752 mutex_lock(&scan_mutex); 3753 if (list_empty(&scan_q)) { 3754 mutex_unlock(&scan_mutex); 3755 break; 3756 } 3757 3758 h = list_entry(scan_q.next, 3759 struct ctlr_info, 3760 scan_list); 3761 list_del(&h->scan_list); 3762 h->busy_scanning = 1; 3763 mutex_unlock(&scan_mutex); 3764 3765 rebuild_lun_table(h, 0, 0); 3766 complete_all(&h->scan_wait); 3767 mutex_lock(&scan_mutex); 3768 h->busy_scanning = 0; 3769 mutex_unlock(&scan_mutex); 3770 } 3771 } 3772 3773 return 0; 3774} 3775 3776static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c) 3777{ 3778 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) 3779 return 0; 3780 3781 switch (c->err_info->SenseInfo[12]) { 3782 case STATE_CHANGED: 3783 dev_warn(&h->pdev->dev, "a state change " 3784 "detected, command retried\n"); 3785 return 1; 3786 break; 3787 case LUN_FAILED: 3788 dev_warn(&h->pdev->dev, "LUN failure " 3789 "detected, action required\n"); 3790 return 1; 3791 break; 3792 case REPORT_LUNS_CHANGED: 3793 dev_warn(&h->pdev->dev, "report LUN data changed\n"); 3794 /* 3795 * Here, we could call add_to_scan_list and wake up the scan thread, 3796 * except that it's quite likely that we will get more than one 3797 * REPORT_LUNS_CHANGED condition in quick succession, which means 3798 * that those which occur after the first one will likely happen 3799 * *during* the scan_thread's rescan. And the rescan code is not 3800 * robust enough to restart in the middle, undoing what it has already 3801 * done, and it's not clear that it's even possible to do this, since 3802 * part of what it does is notify the block layer, which starts 3803 * doing it's own i/o to read partition tables and so on, and the 3804 * driver doesn't have visibility to know what might need undoing. 3805 * In any event, if possible, it is horribly complicated to get right 3806 * so we just don't do it for now. 3807 * 3808 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012. 3809 */ 3810 return 1; 3811 break; 3812 case POWER_OR_RESET: 3813 dev_warn(&h->pdev->dev, 3814 "a power on or device reset detected\n"); 3815 return 1; 3816 break; 3817 case UNIT_ATTENTION_CLEARED: 3818 dev_warn(&h->pdev->dev, 3819 "unit attention cleared by another initiator\n"); 3820 return 1; 3821 break; 3822 default: 3823 dev_warn(&h->pdev->dev, "unknown unit attention detected\n"); 3824 return 1; 3825 } 3826} 3827 3828/* 3829 * We cannot read the structure directly, for portability we must use 3830 * the io functions. 3831 * This is for debug only. 3832 */ 3833static void print_cfg_table(ctlr_info_t *h) 3834{ 3835 int i; 3836 char temp_name[17]; 3837 CfgTable_struct *tb = h->cfgtable; 3838 3839 dev_dbg(&h->pdev->dev, "Controller Configuration information\n"); 3840 dev_dbg(&h->pdev->dev, "------------------------------------\n"); 3841 for (i = 0; i < 4; i++) 3842 temp_name[i] = readb(&(tb->Signature[i])); 3843 temp_name[4] = '\0'; 3844 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name); 3845 dev_dbg(&h->pdev->dev, " Spec Number = %d\n", 3846 readl(&(tb->SpecValence))); 3847 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n", 3848 readl(&(tb->TransportSupport))); 3849 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n", 3850 readl(&(tb->TransportActive))); 3851 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n", 3852 readl(&(tb->HostWrite.TransportRequest))); 3853 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n", 3854 readl(&(tb->HostWrite.CoalIntDelay))); 3855 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n", 3856 readl(&(tb->HostWrite.CoalIntCount))); 3857 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n", 3858 readl(&(tb->CmdsOutMax))); 3859 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n", 3860 readl(&(tb->BusTypes))); 3861 for (i = 0; i < 16; i++) 3862 temp_name[i] = readb(&(tb->ServerName[i])); 3863 temp_name[16] = '\0'; 3864 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name); 3865 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n", 3866 readl(&(tb->HeartBeat))); 3867} 3868 3869static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 3870{ 3871 int i, offset, mem_type, bar_type; 3872 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 3873 return 0; 3874 offset = 0; 3875 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 3876 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 3877 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 3878 offset += 4; 3879 else { 3880 mem_type = pci_resource_flags(pdev, i) & 3881 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 3882 switch (mem_type) { 3883 case PCI_BASE_ADDRESS_MEM_TYPE_32: 3884 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 3885 offset += 4; /* 32 bit */ 3886 break; 3887 case PCI_BASE_ADDRESS_MEM_TYPE_64: 3888 offset += 8; 3889 break; 3890 default: /* reserved in PCI 2.2 */ 3891 dev_warn(&pdev->dev, 3892 "Base address is invalid\n"); 3893 return -1; 3894 break; 3895 } 3896 } 3897 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 3898 return i + 1; 3899 } 3900 return -1; 3901} 3902 3903/* Fill in bucket_map[], given nsgs (the max number of 3904 * scatter gather elements supported) and bucket[], 3905 * which is an array of 8 integers. The bucket[] array 3906 * contains 8 different DMA transfer sizes (in 16 3907 * byte increments) which the controller uses to fetch 3908 * commands. This function fills in bucket_map[], which 3909 * maps a given number of scatter gather elements to one of 3910 * the 8 DMA transfer sizes. The point of it is to allow the 3911 * controller to only do as much DMA as needed to fetch the 3912 * command, with the DMA transfer size encoded in the lower 3913 * bits of the command address. 3914 */ 3915static void calc_bucket_map(int bucket[], int num_buckets, 3916 int nsgs, int *bucket_map) 3917{ 3918 int i, j, b, size; 3919 3920 /* even a command with 0 SGs requires 4 blocks */ 3921#define MINIMUM_TRANSFER_BLOCKS 4 3922#define NUM_BUCKETS 8 3923 /* Note, bucket_map must have nsgs+1 entries. */ 3924 for (i = 0; i <= nsgs; i++) { 3925 /* Compute size of a command with i SG entries */ 3926 size = i + MINIMUM_TRANSFER_BLOCKS; 3927 b = num_buckets; /* Assume the biggest bucket */ 3928 /* Find the bucket that is just big enough */ 3929 for (j = 0; j < 8; j++) { 3930 if (bucket[j] >= size) { 3931 b = j; 3932 break; 3933 } 3934 } 3935 /* for a command with i SG entries, use bucket b. */ 3936 bucket_map[i] = b; 3937 } 3938} 3939 3940static void cciss_wait_for_mode_change_ack(ctlr_info_t *h) 3941{ 3942 int i; 3943 3944 /* under certain very rare conditions, this can take awhile. 3945 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 3946 * as we enter this code.) */ 3947 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 3948 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) 3949 break; 3950 usleep_range(10000, 20000); 3951 } 3952} 3953 3954static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags) 3955{ 3956 /* This is a bit complicated. There are 8 registers on 3957 * the controller which we write to to tell it 8 different 3958 * sizes of commands which there may be. It's a way of 3959 * reducing the DMA done to fetch each command. Encoded into 3960 * each command's tag are 3 bits which communicate to the controller 3961 * which of the eight sizes that command fits within. The size of 3962 * each command depends on how many scatter gather entries there are. 3963 * Each SG entry requires 16 bytes. The eight registers are programmed 3964 * with the number of 16-byte blocks a command of that size requires. 3965 * The smallest command possible requires 5 such 16 byte blocks. 3966 * the largest command possible requires MAXSGENTRIES + 4 16-byte 3967 * blocks. Note, this only extends to the SG entries contained 3968 * within the command block, and does not extend to chained blocks 3969 * of SG elements. bft[] contains the eight values we write to 3970 * the registers. They are not evenly distributed, but have more 3971 * sizes for small commands, and fewer sizes for larger commands. 3972 */ 3973 __u32 trans_offset; 3974 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4}; 3975 /* 3976 * 5 = 1 s/g entry or 4k 3977 * 6 = 2 s/g entry or 8k 3978 * 8 = 4 s/g entry or 16k 3979 * 10 = 6 s/g entry or 24k 3980 */ 3981 unsigned long register_value; 3982 BUILD_BUG_ON(28 > MAXSGENTRIES + 4); 3983 3984 h->reply_pool_wraparound = 1; /* spec: init to 1 */ 3985 3986 /* Controller spec: zero out this buffer. */ 3987 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64)); 3988 h->reply_pool_head = h->reply_pool; 3989 3990 trans_offset = readl(&(h->cfgtable->TransMethodOffset)); 3991 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries, 3992 h->blockFetchTable); 3993 writel(bft[0], &h->transtable->BlockFetch0); 3994 writel(bft[1], &h->transtable->BlockFetch1); 3995 writel(bft[2], &h->transtable->BlockFetch2); 3996 writel(bft[3], &h->transtable->BlockFetch3); 3997 writel(bft[4], &h->transtable->BlockFetch4); 3998 writel(bft[5], &h->transtable->BlockFetch5); 3999 writel(bft[6], &h->transtable->BlockFetch6); 4000 writel(bft[7], &h->transtable->BlockFetch7); 4001 4002 /* size of controller ring buffer */ 4003 writel(h->max_commands, &h->transtable->RepQSize); 4004 writel(1, &h->transtable->RepQCount); 4005 writel(0, &h->transtable->RepQCtrAddrLow32); 4006 writel(0, &h->transtable->RepQCtrAddrHigh32); 4007 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); 4008 writel(0, &h->transtable->RepQAddr0High32); 4009 writel(CFGTBL_Trans_Performant | use_short_tags, 4010 &(h->cfgtable->HostWrite.TransportRequest)); 4011 4012 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 4013 cciss_wait_for_mode_change_ack(h); 4014 register_value = readl(&(h->cfgtable->TransportActive)); 4015 if (!(register_value & CFGTBL_Trans_Performant)) 4016 dev_warn(&h->pdev->dev, "cciss: unable to get board into" 4017 " performant mode\n"); 4018} 4019 4020static void cciss_put_controller_into_performant_mode(ctlr_info_t *h) 4021{ 4022 __u32 trans_support; 4023 4024 if (cciss_simple_mode) 4025 return; 4026 4027 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n"); 4028 /* Attempt to put controller into performant mode if supported */ 4029 /* Does board support performant mode? */ 4030 trans_support = readl(&(h->cfgtable->TransportSupport)); 4031 if (!(trans_support & PERFORMANT_MODE)) 4032 return; 4033 4034 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n"); 4035 /* Performant mode demands commands on a 32 byte boundary 4036 * pci_alloc_consistent aligns on page boundarys already. 4037 * Just need to check if divisible by 32 4038 */ 4039 if ((sizeof(CommandList_struct) % 32) != 0) { 4040 dev_warn(&h->pdev->dev, "%s %d %s\n", 4041 "cciss info: command size[", 4042 (int)sizeof(CommandList_struct), 4043 "] not divisible by 32, no performant mode..\n"); 4044 return; 4045 } 4046 4047 /* Performant mode ring buffer and supporting data structures */ 4048 h->reply_pool = (__u64 *)pci_alloc_consistent( 4049 h->pdev, h->max_commands * sizeof(__u64), 4050 &(h->reply_pool_dhandle)); 4051 4052 /* Need a block fetch table for performant mode */ 4053 h->blockFetchTable = kmalloc(((h->maxsgentries+1) * 4054 sizeof(__u32)), GFP_KERNEL); 4055 4056 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL)) 4057 goto clean_up; 4058 4059 cciss_enter_performant_mode(h, 4060 trans_support & CFGTBL_Trans_use_short_tags); 4061 4062 /* Change the access methods to the performant access methods */ 4063 h->access = SA5_performant_access; 4064 h->transMethod = CFGTBL_Trans_Performant; 4065 4066 return; 4067clean_up: 4068 kfree(h->blockFetchTable); 4069 if (h->reply_pool) 4070 pci_free_consistent(h->pdev, 4071 h->max_commands * sizeof(__u64), 4072 h->reply_pool, 4073 h->reply_pool_dhandle); 4074 return; 4075 4076} /* cciss_put_controller_into_performant_mode */ 4077 4078/* If MSI/MSI-X is supported by the kernel we will try to enable it on 4079 * controllers that are capable. If not, we use IO-APIC mode. 4080 */ 4081 4082static void cciss_interrupt_mode(ctlr_info_t *h) 4083{ 4084#ifdef CONFIG_PCI_MSI 4085 int err; 4086 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1}, 4087 {0, 2}, {0, 3} 4088 }; 4089 4090 /* Some boards advertise MSI but don't really support it */ 4091 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 4092 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 4093 goto default_int_mode; 4094 4095 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 4096 err = pci_enable_msix_exact(h->pdev, cciss_msix_entries, 4); 4097 if (!err) { 4098 h->intr[0] = cciss_msix_entries[0].vector; 4099 h->intr[1] = cciss_msix_entries[1].vector; 4100 h->intr[2] = cciss_msix_entries[2].vector; 4101 h->intr[3] = cciss_msix_entries[3].vector; 4102 h->msix_vector = 1; 4103 return; 4104 } else { 4105 dev_warn(&h->pdev->dev, 4106 "MSI-X init failed %d\n", err); 4107 } 4108 } 4109 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 4110 if (!pci_enable_msi(h->pdev)) 4111 h->msi_vector = 1; 4112 else 4113 dev_warn(&h->pdev->dev, "MSI init failed\n"); 4114 } 4115default_int_mode: 4116#endif /* CONFIG_PCI_MSI */ 4117 /* if we get here we're going to use the default interrupt mode */ 4118 h->intr[h->intr_mode] = h->pdev->irq; 4119 return; 4120} 4121 4122static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 4123{ 4124 int i; 4125 u32 subsystem_vendor_id, subsystem_device_id; 4126 4127 subsystem_vendor_id = pdev->subsystem_vendor; 4128 subsystem_device_id = pdev->subsystem_device; 4129 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 4130 subsystem_vendor_id; 4131 4132 for (i = 0; i < ARRAY_SIZE(products); i++) { 4133 /* Stand aside for hpsa driver on request */ 4134 if (cciss_allow_hpsa) 4135 return -ENODEV; 4136 if (*board_id == products[i].board_id) 4137 return i; 4138 } 4139 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n", 4140 *board_id); 4141 return -ENODEV; 4142} 4143 4144static inline bool cciss_board_disabled(ctlr_info_t *h) 4145{ 4146 u16 command; 4147 4148 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command); 4149 return ((command & PCI_COMMAND_MEMORY) == 0); 4150} 4151 4152static int cciss_pci_find_memory_BAR(struct pci_dev *pdev, 4153 unsigned long *memory_bar) 4154{ 4155 int i; 4156 4157 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 4158 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 4159 /* addressing mode bits already removed */ 4160 *memory_bar = pci_resource_start(pdev, i); 4161 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 4162 *memory_bar); 4163 return 0; 4164 } 4165 dev_warn(&pdev->dev, "no memory BAR found\n"); 4166 return -ENODEV; 4167} 4168 4169static int cciss_wait_for_board_state(struct pci_dev *pdev, 4170 void __iomem *vaddr, int wait_for_ready) 4171#define BOARD_READY 1 4172#define BOARD_NOT_READY 0 4173{ 4174 int i, iterations; 4175 u32 scratchpad; 4176 4177 if (wait_for_ready) 4178 iterations = CCISS_BOARD_READY_ITERATIONS; 4179 else 4180 iterations = CCISS_BOARD_NOT_READY_ITERATIONS; 4181 4182 for (i = 0; i < iterations; i++) { 4183 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 4184 if (wait_for_ready) { 4185 if (scratchpad == CCISS_FIRMWARE_READY) 4186 return 0; 4187 } else { 4188 if (scratchpad != CCISS_FIRMWARE_READY) 4189 return 0; 4190 } 4191 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS); 4192 } 4193 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 4194 return -ENODEV; 4195} 4196 4197static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 4198 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 4199 u64 *cfg_offset) 4200{ 4201 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 4202 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 4203 *cfg_base_addr &= (u32) 0x0000ffff; 4204 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 4205 if (*cfg_base_addr_index == -1) { 4206 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, " 4207 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr); 4208 return -ENODEV; 4209 } 4210 return 0; 4211} 4212 4213static int cciss_find_cfgtables(ctlr_info_t *h) 4214{ 4215 u64 cfg_offset; 4216 u32 cfg_base_addr; 4217 u64 cfg_base_addr_index; 4218 u32 trans_offset; 4219 int rc; 4220 4221 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 4222 &cfg_base_addr_index, &cfg_offset); 4223 if (rc) 4224 return rc; 4225 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 4226 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 4227 if (!h->cfgtable) 4228 return -ENOMEM; 4229 rc = write_driver_ver_to_cfgtable(h->cfgtable); 4230 if (rc) 4231 return rc; 4232 /* Find performant mode table. */ 4233 trans_offset = readl(&h->cfgtable->TransMethodOffset); 4234 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 4235 cfg_base_addr_index)+cfg_offset+trans_offset, 4236 sizeof(*h->transtable)); 4237 if (!h->transtable) 4238 return -ENOMEM; 4239 return 0; 4240} 4241 4242static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h) 4243{ 4244 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); 4245 4246 /* Limit commands in memory limited kdump scenario. */ 4247 if (reset_devices && h->max_commands > 32) 4248 h->max_commands = 32; 4249 4250 if (h->max_commands < 16) { 4251 dev_warn(&h->pdev->dev, "Controller reports " 4252 "max supported commands of %d, an obvious lie. " 4253 "Using 16. Ensure that firmware is up to date.\n", 4254 h->max_commands); 4255 h->max_commands = 16; 4256 } 4257} 4258 4259/* Interrogate the hardware for some limits: 4260 * max commands, max SG elements without chaining, and with chaining, 4261 * SG chain block size, etc. 4262 */ 4263static void cciss_find_board_params(ctlr_info_t *h) 4264{ 4265 cciss_get_max_perf_mode_cmds(h); 4266 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds; 4267 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements)); 4268 /* 4269 * The P600 may exhibit poor performnace under some workloads 4270 * if we use the value in the configuration table. Limit this 4271 * controller to MAXSGENTRIES (32) instead. 4272 */ 4273 if (h->board_id == 0x3225103C) 4274 h->maxsgentries = MAXSGENTRIES; 4275 /* 4276 * Limit in-command s/g elements to 32 save dma'able memory. 4277 * Howvever spec says if 0, use 31 4278 */ 4279 h->max_cmd_sgentries = 31; 4280 if (h->maxsgentries > 512) { 4281 h->max_cmd_sgentries = 32; 4282 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1; 4283 h->maxsgentries--; /* save one for chain pointer */ 4284 } else { 4285 h->maxsgentries = 31; /* default to traditional values */ 4286 h->chainsize = 0; 4287 } 4288} 4289 4290static inline bool CISS_signature_present(ctlr_info_t *h) 4291{ 4292 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 4293 dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); 4294 return false; 4295 } 4296 return true; 4297} 4298 4299/* Need to enable prefetch in the SCSI core for 6400 in x86 */ 4300static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h) 4301{ 4302#ifdef CONFIG_X86 4303 u32 prefetch; 4304 4305 prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); 4306 prefetch |= 0x100; 4307 writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); 4308#endif 4309} 4310 4311/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 4312 * in a prefetch beyond physical memory. 4313 */ 4314static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h) 4315{ 4316 u32 dma_prefetch; 4317 __u32 dma_refetch; 4318 4319 if (h->board_id != 0x3225103C) 4320 return; 4321 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 4322 dma_prefetch |= 0x8000; 4323 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 4324 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch); 4325 dma_refetch |= 0x1; 4326 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch); 4327} 4328 4329static int cciss_pci_init(ctlr_info_t *h) 4330{ 4331 int prod_index, err; 4332 4333 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id); 4334 if (prod_index < 0) 4335 return -ENODEV; 4336 h->product_name = products[prod_index].product_name; 4337 h->access = *(products[prod_index].access); 4338 4339 if (cciss_board_disabled(h)) { 4340 dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); 4341 return -ENODEV; 4342 } 4343 4344 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 4345 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 4346 4347 err = pci_enable_device(h->pdev); 4348 if (err) { 4349 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n"); 4350 return err; 4351 } 4352 4353 err = pci_request_regions(h->pdev, "cciss"); 4354 if (err) { 4355 dev_warn(&h->pdev->dev, 4356 "Cannot obtain PCI resources, aborting\n"); 4357 return err; 4358 } 4359 4360 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq); 4361 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id); 4362 4363/* If the kernel supports MSI/MSI-X we will try to enable that functionality, 4364 * else we use the IO-APIC interrupt assigned to us by system ROM. 4365 */ 4366 cciss_interrupt_mode(h); 4367 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr); 4368 if (err) 4369 goto err_out_free_res; 4370 h->vaddr = remap_pci_mem(h->paddr, 0x250); 4371 if (!h->vaddr) { 4372 err = -ENOMEM; 4373 goto err_out_free_res; 4374 } 4375 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 4376 if (err) 4377 goto err_out_free_res; 4378 err = cciss_find_cfgtables(h); 4379 if (err) 4380 goto err_out_free_res; 4381 print_cfg_table(h); 4382 cciss_find_board_params(h); 4383 4384 if (!CISS_signature_present(h)) { 4385 err = -ENODEV; 4386 goto err_out_free_res; 4387 } 4388 cciss_enable_scsi_prefetch(h); 4389 cciss_p600_dma_prefetch_quirk(h); 4390 err = cciss_enter_simple_mode(h); 4391 if (err) 4392 goto err_out_free_res; 4393 cciss_put_controller_into_performant_mode(h); 4394 return 0; 4395 4396err_out_free_res: 4397 /* 4398 * Deliberately omit pci_disable_device(): it does something nasty to 4399 * Smart Array controllers that pci_enable_device does not undo 4400 */ 4401 if (h->transtable) 4402 iounmap(h->transtable); 4403 if (h->cfgtable) 4404 iounmap(h->cfgtable); 4405 if (h->vaddr) 4406 iounmap(h->vaddr); 4407 pci_release_regions(h->pdev); 4408 return err; 4409} 4410 4411/* Function to find the first free pointer into our hba[] array 4412 * Returns -1 if no free entries are left. 4413 */ 4414static int alloc_cciss_hba(struct pci_dev *pdev) 4415{ 4416 int i; 4417 4418 for (i = 0; i < MAX_CTLR; i++) { 4419 if (!hba[i]) { 4420 ctlr_info_t *h; 4421 4422 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL); 4423 if (!h) 4424 goto Enomem; 4425 hba[i] = h; 4426 return i; 4427 } 4428 } 4429 dev_warn(&pdev->dev, "This driver supports a maximum" 4430 " of %d controllers.\n", MAX_CTLR); 4431 return -1; 4432Enomem: 4433 dev_warn(&pdev->dev, "out of memory.\n"); 4434 return -1; 4435} 4436 4437static void free_hba(ctlr_info_t *h) 4438{ 4439 int i; 4440 4441 hba[h->ctlr] = NULL; 4442 for (i = 0; i < h->highest_lun + 1; i++) 4443 if (h->gendisk[i] != NULL) 4444 put_disk(h->gendisk[i]); 4445 kfree(h); 4446} 4447 4448/* Send a message CDB to the firmware. */ 4449static int cciss_message(struct pci_dev *pdev, unsigned char opcode, 4450 unsigned char type) 4451{ 4452 typedef struct { 4453 CommandListHeader_struct CommandHeader; 4454 RequestBlock_struct Request; 4455 ErrDescriptor_struct ErrorDescriptor; 4456 } Command; 4457 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct); 4458 Command *cmd; 4459 dma_addr_t paddr64; 4460 uint32_t paddr32, tag; 4461 void __iomem *vaddr; 4462 int i, err; 4463 4464 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 4465 if (vaddr == NULL) 4466 return -ENOMEM; 4467 4468 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 4469 CCISS commands, so they must be allocated from the lower 4GiB of 4470 memory. */ 4471 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 4472 if (err) { 4473 iounmap(vaddr); 4474 return -ENOMEM; 4475 } 4476 4477 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 4478 if (cmd == NULL) { 4479 iounmap(vaddr); 4480 return -ENOMEM; 4481 } 4482 4483 /* This must fit, because of the 32-bit consistent DMA mask. Also, 4484 although there's no guarantee, we assume that the address is at 4485 least 4-byte aligned (most likely, it's page-aligned). */ 4486 paddr32 = paddr64; 4487 4488 cmd->CommandHeader.ReplyQueue = 0; 4489 cmd->CommandHeader.SGList = 0; 4490 cmd->CommandHeader.SGTotal = 0; 4491 cmd->CommandHeader.Tag.lower = paddr32; 4492 cmd->CommandHeader.Tag.upper = 0; 4493 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 4494 4495 cmd->Request.CDBLen = 16; 4496 cmd->Request.Type.Type = TYPE_MSG; 4497 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; 4498 cmd->Request.Type.Direction = XFER_NONE; 4499 cmd->Request.Timeout = 0; /* Don't time out */ 4500 cmd->Request.CDB[0] = opcode; 4501 cmd->Request.CDB[1] = type; 4502 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */ 4503 4504 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command); 4505 cmd->ErrorDescriptor.Addr.upper = 0; 4506 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct); 4507 4508 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); 4509 4510 for (i = 0; i < 10; i++) { 4511 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 4512 if ((tag & ~3) == paddr32) 4513 break; 4514 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS); 4515 } 4516 4517 iounmap(vaddr); 4518 4519 /* we leak the DMA buffer here ... no choice since the controller could 4520 still complete the command. */ 4521 if (i == 10) { 4522 dev_err(&pdev->dev, 4523 "controller message %02x:%02x timed out\n", 4524 opcode, type); 4525 return -ETIMEDOUT; 4526 } 4527 4528 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 4529 4530 if (tag & 2) { 4531 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 4532 opcode, type); 4533 return -EIO; 4534 } 4535 4536 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 4537 opcode, type); 4538 return 0; 4539} 4540 4541#define cciss_noop(p) cciss_message(p, 3, 0) 4542 4543static int cciss_controller_hard_reset(struct pci_dev *pdev, 4544 void * __iomem vaddr, u32 use_doorbell) 4545{ 4546 u16 pmcsr; 4547 int pos; 4548 4549 if (use_doorbell) { 4550 /* For everything after the P600, the PCI power state method 4551 * of resetting the controller doesn't work, so we have this 4552 * other way using the doorbell register. 4553 */ 4554 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 4555 writel(use_doorbell, vaddr + SA5_DOORBELL); 4556 } else { /* Try to do it the PCI power state way */ 4557 4558 /* Quoting from the Open CISS Specification: "The Power 4559 * Management Control/Status Register (CSR) controls the power 4560 * state of the device. The normal operating state is D0, 4561 * CSR=00h. The software off state is D3, CSR=03h. To reset 4562 * the controller, place the interface device in D3 then to D0, 4563 * this causes a secondary PCI reset which will reset the 4564 * controller." */ 4565 4566 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 4567 if (pos == 0) { 4568 dev_err(&pdev->dev, 4569 "cciss_controller_hard_reset: " 4570 "PCI PM not supported\n"); 4571 return -ENODEV; 4572 } 4573 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 4574 /* enter the D3hot power management state */ 4575 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); 4576 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 4577 pmcsr |= PCI_D3hot; 4578 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 4579 4580 msleep(500); 4581 4582 /* enter the D0 power management state */ 4583 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 4584 pmcsr |= PCI_D0; 4585 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 4586 4587 /* 4588 * The P600 requires a small delay when changing states. 4589 * Otherwise we may think the board did not reset and we bail. 4590 * This for kdump only and is particular to the P600. 4591 */ 4592 msleep(500); 4593 } 4594 return 0; 4595} 4596 4597static void init_driver_version(char *driver_version, int len) 4598{ 4599 memset(driver_version, 0, len); 4600 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1); 4601} 4602 4603static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable) 4604{ 4605 char *driver_version; 4606 int i, size = sizeof(cfgtable->driver_version); 4607 4608 driver_version = kmalloc(size, GFP_KERNEL); 4609 if (!driver_version) 4610 return -ENOMEM; 4611 4612 init_driver_version(driver_version, size); 4613 for (i = 0; i < size; i++) 4614 writeb(driver_version[i], &cfgtable->driver_version[i]); 4615 kfree(driver_version); 4616 return 0; 4617} 4618 4619static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable, 4620 unsigned char *driver_ver) 4621{ 4622 int i; 4623 4624 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 4625 driver_ver[i] = readb(&cfgtable->driver_version[i]); 4626} 4627 4628static int controller_reset_failed(CfgTable_struct __iomem *cfgtable) 4629{ 4630 4631 char *driver_ver, *old_driver_ver; 4632 int rc, size = sizeof(cfgtable->driver_version); 4633 4634 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 4635 if (!old_driver_ver) 4636 return -ENOMEM; 4637 driver_ver = old_driver_ver + size; 4638 4639 /* After a reset, the 32 bytes of "driver version" in the cfgtable 4640 * should have been changed, otherwise we know the reset failed. 4641 */ 4642 init_driver_version(old_driver_ver, size); 4643 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 4644 rc = !memcmp(driver_ver, old_driver_ver, size); 4645 kfree(old_driver_ver); 4646 return rc; 4647} 4648 4649/* This does a hard reset of the controller using PCI power management 4650 * states or using the doorbell register. */ 4651static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev) 4652{ 4653 u64 cfg_offset; 4654 u32 cfg_base_addr; 4655 u64 cfg_base_addr_index; 4656 void __iomem *vaddr; 4657 unsigned long paddr; 4658 u32 misc_fw_support; 4659 int rc; 4660 CfgTable_struct __iomem *cfgtable; 4661 u32 use_doorbell; 4662 u32 board_id; 4663 u16 command_register; 4664 4665 /* For controllers as old a the p600, this is very nearly 4666 * the same thing as 4667 * 4668 * pci_save_state(pci_dev); 4669 * pci_set_power_state(pci_dev, PCI_D3hot); 4670 * pci_set_power_state(pci_dev, PCI_D0); 4671 * pci_restore_state(pci_dev); 4672 * 4673 * For controllers newer than the P600, the pci power state 4674 * method of resetting doesn't work so we have another way 4675 * using the doorbell register. 4676 */ 4677 4678 /* Exclude 640x boards. These are two pci devices in one slot 4679 * which share a battery backed cache module. One controls the 4680 * cache, the other accesses the cache through the one that controls 4681 * it. If we reset the one controlling the cache, the other will 4682 * likely not be happy. Just forbid resetting this conjoined mess. 4683 */ 4684 cciss_lookup_board_id(pdev, &board_id); 4685 if (!ctlr_is_resettable(board_id)) { 4686 dev_warn(&pdev->dev, "Controller not resettable\n"); 4687 return -ENODEV; 4688 } 4689 4690 /* if controller is soft- but not hard resettable... */ 4691 if (!ctlr_is_hard_resettable(board_id)) 4692 return -ENOTSUPP; /* try soft reset later. */ 4693 4694 /* Save the PCI command register */ 4695 pci_read_config_word(pdev, 4, &command_register); 4696 /* Turn the board off. This is so that later pci_restore_state() 4697 * won't turn the board on before the rest of config space is ready. 4698 */ 4699 pci_disable_device(pdev); 4700 pci_save_state(pdev); 4701 4702 /* find the first memory BAR, so we can find the cfg table */ 4703 rc = cciss_pci_find_memory_BAR(pdev, &paddr); 4704 if (rc) 4705 return rc; 4706 vaddr = remap_pci_mem(paddr, 0x250); 4707 if (!vaddr) 4708 return -ENOMEM; 4709 4710 /* find cfgtable in order to check if reset via doorbell is supported */ 4711 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 4712 &cfg_base_addr_index, &cfg_offset); 4713 if (rc) 4714 goto unmap_vaddr; 4715 cfgtable = remap_pci_mem(pci_resource_start(pdev, 4716 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 4717 if (!cfgtable) { 4718 rc = -ENOMEM; 4719 goto unmap_vaddr; 4720 } 4721 rc = write_driver_ver_to_cfgtable(cfgtable); 4722 if (rc) 4723 goto unmap_vaddr; 4724 4725 /* If reset via doorbell register is supported, use that. 4726 * There are two such methods. Favor the newest method. 4727 */ 4728 misc_fw_support = readl(&cfgtable->misc_fw_support); 4729 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 4730 if (use_doorbell) { 4731 use_doorbell = DOORBELL_CTLR_RESET2; 4732 } else { 4733 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 4734 if (use_doorbell) { 4735 dev_warn(&pdev->dev, "Controller claims that " 4736 "'Bit 2 doorbell reset' is " 4737 "supported, but not 'bit 5 doorbell reset'. " 4738 "Firmware update is recommended.\n"); 4739 rc = -ENOTSUPP; /* use the soft reset */ 4740 goto unmap_cfgtable; 4741 } 4742 } 4743 4744 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell); 4745 if (rc) 4746 goto unmap_cfgtable; 4747 pci_restore_state(pdev); 4748 rc = pci_enable_device(pdev); 4749 if (rc) { 4750 dev_warn(&pdev->dev, "failed to enable device.\n"); 4751 goto unmap_cfgtable; 4752 } 4753 pci_write_config_word(pdev, 4, command_register); 4754 4755 /* Some devices (notably the HP Smart Array 5i Controller) 4756 need a little pause here */ 4757 msleep(CCISS_POST_RESET_PAUSE_MSECS); 4758 4759 /* Wait for board to become not ready, then ready. */ 4760 dev_info(&pdev->dev, "Waiting for board to reset.\n"); 4761 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); 4762 if (rc) { 4763 dev_warn(&pdev->dev, "Failed waiting for board to hard reset." 4764 " Will try soft reset.\n"); 4765 rc = -ENOTSUPP; /* Not expected, but try soft reset later */ 4766 goto unmap_cfgtable; 4767 } 4768 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY); 4769 if (rc) { 4770 dev_warn(&pdev->dev, 4771 "failed waiting for board to become ready " 4772 "after hard reset\n"); 4773 goto unmap_cfgtable; 4774 } 4775 4776 rc = controller_reset_failed(vaddr); 4777 if (rc < 0) 4778 goto unmap_cfgtable; 4779 if (rc) { 4780 dev_warn(&pdev->dev, "Unable to successfully hard reset " 4781 "controller. Will try soft reset.\n"); 4782 rc = -ENOTSUPP; /* Not expected, but try soft reset later */ 4783 } else { 4784 dev_info(&pdev->dev, "Board ready after hard reset.\n"); 4785 } 4786 4787unmap_cfgtable: 4788 iounmap(cfgtable); 4789 4790unmap_vaddr: 4791 iounmap(vaddr); 4792 return rc; 4793} 4794 4795static int cciss_init_reset_devices(struct pci_dev *pdev) 4796{ 4797 int rc, i; 4798 4799 if (!reset_devices) 4800 return 0; 4801 4802 /* Reset the controller with a PCI power-cycle or via doorbell */ 4803 rc = cciss_kdump_hard_reset_controller(pdev); 4804 4805 /* -ENOTSUPP here means we cannot reset the controller 4806 * but it's already (and still) up and running in 4807 * "performant mode". Or, it might be 640x, which can't reset 4808 * due to concerns about shared bbwc between 6402/6404 pair. 4809 */ 4810 if (rc == -ENOTSUPP) 4811 return rc; /* just try to do the kdump anyhow. */ 4812 if (rc) 4813 return -ENODEV; 4814 4815 /* Now try to get the controller to respond to a no-op */ 4816 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); 4817 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) { 4818 if (cciss_noop(pdev) == 0) 4819 break; 4820 else 4821 dev_warn(&pdev->dev, "no-op failed%s\n", 4822 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ? 4823 "; re-trying" : "")); 4824 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS); 4825 } 4826 return 0; 4827} 4828 4829static int cciss_allocate_cmd_pool(ctlr_info_t *h) 4830{ 4831 h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) * 4832 sizeof(unsigned long), GFP_KERNEL); 4833 h->cmd_pool = pci_alloc_consistent(h->pdev, 4834 h->nr_cmds * sizeof(CommandList_struct), 4835 &(h->cmd_pool_dhandle)); 4836 h->errinfo_pool = pci_alloc_consistent(h->pdev, 4837 h->nr_cmds * sizeof(ErrorInfo_struct), 4838 &(h->errinfo_pool_dhandle)); 4839 if ((h->cmd_pool_bits == NULL) 4840 || (h->cmd_pool == NULL) 4841 || (h->errinfo_pool == NULL)) { 4842 dev_err(&h->pdev->dev, "out of memory"); 4843 return -ENOMEM; 4844 } 4845 return 0; 4846} 4847 4848static int cciss_allocate_scatterlists(ctlr_info_t *h) 4849{ 4850 int i; 4851 4852 /* zero it, so that on free we need not know how many were alloc'ed */ 4853 h->scatter_list = kzalloc(h->max_commands * 4854 sizeof(struct scatterlist *), GFP_KERNEL); 4855 if (!h->scatter_list) 4856 return -ENOMEM; 4857 4858 for (i = 0; i < h->nr_cmds; i++) { 4859 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) * 4860 h->maxsgentries, GFP_KERNEL); 4861 if (h->scatter_list[i] == NULL) { 4862 dev_err(&h->pdev->dev, "could not allocate " 4863 "s/g lists\n"); 4864 return -ENOMEM; 4865 } 4866 } 4867 return 0; 4868} 4869 4870static void cciss_free_scatterlists(ctlr_info_t *h) 4871{ 4872 int i; 4873 4874 if (h->scatter_list) { 4875 for (i = 0; i < h->nr_cmds; i++) 4876 kfree(h->scatter_list[i]); 4877 kfree(h->scatter_list); 4878 } 4879} 4880 4881static void cciss_free_cmd_pool(ctlr_info_t *h) 4882{ 4883 kfree(h->cmd_pool_bits); 4884 if (h->cmd_pool) 4885 pci_free_consistent(h->pdev, 4886 h->nr_cmds * sizeof(CommandList_struct), 4887 h->cmd_pool, h->cmd_pool_dhandle); 4888 if (h->errinfo_pool) 4889 pci_free_consistent(h->pdev, 4890 h->nr_cmds * sizeof(ErrorInfo_struct), 4891 h->errinfo_pool, h->errinfo_pool_dhandle); 4892} 4893 4894static int cciss_request_irq(ctlr_info_t *h, 4895 irqreturn_t (*msixhandler)(int, void *), 4896 irqreturn_t (*intxhandler)(int, void *)) 4897{ 4898 if (h->msix_vector || h->msi_vector) { 4899 if (!request_irq(h->intr[h->intr_mode], msixhandler, 4900 0, h->devname, h)) 4901 return 0; 4902 dev_err(&h->pdev->dev, "Unable to get msi irq %d" 4903 " for %s\n", h->intr[h->intr_mode], 4904 h->devname); 4905 return -1; 4906 } 4907 4908 if (!request_irq(h->intr[h->intr_mode], intxhandler, 4909 IRQF_SHARED, h->devname, h)) 4910 return 0; 4911 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", 4912 h->intr[h->intr_mode], h->devname); 4913 return -1; 4914} 4915 4916static int cciss_kdump_soft_reset(ctlr_info_t *h) 4917{ 4918 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) { 4919 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); 4920 return -EIO; 4921 } 4922 4923 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 4924 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { 4925 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 4926 return -1; 4927 } 4928 4929 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 4930 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { 4931 dev_warn(&h->pdev->dev, "Board failed to become ready " 4932 "after soft reset.\n"); 4933 return -1; 4934 } 4935 4936 return 0; 4937} 4938 4939static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h) 4940{ 4941 int ctlr = h->ctlr; 4942 4943 free_irq(h->intr[h->intr_mode], h); 4944#ifdef CONFIG_PCI_MSI 4945 if (h->msix_vector) 4946 pci_disable_msix(h->pdev); 4947 else if (h->msi_vector) 4948 pci_disable_msi(h->pdev); 4949#endif /* CONFIG_PCI_MSI */ 4950 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); 4951 cciss_free_scatterlists(h); 4952 cciss_free_cmd_pool(h); 4953 kfree(h->blockFetchTable); 4954 if (h->reply_pool) 4955 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64), 4956 h->reply_pool, h->reply_pool_dhandle); 4957 if (h->transtable) 4958 iounmap(h->transtable); 4959 if (h->cfgtable) 4960 iounmap(h->cfgtable); 4961 if (h->vaddr) 4962 iounmap(h->vaddr); 4963 unregister_blkdev(h->major, h->devname); 4964 cciss_destroy_hba_sysfs_entry(h); 4965 pci_release_regions(h->pdev); 4966 kfree(h); 4967 hba[ctlr] = NULL; 4968} 4969 4970/* 4971 * This is it. Find all the controllers and register them. I really hate 4972 * stealing all these major device numbers. 4973 * returns the number of block devices registered. 4974 */ 4975static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 4976{ 4977 int i; 4978 int j = 0; 4979 int rc; 4980 int try_soft_reset = 0; 4981 int dac, return_code; 4982 InquiryData_struct *inq_buff; 4983 ctlr_info_t *h; 4984 unsigned long flags; 4985 4986 /* 4987 * By default the cciss driver is used for all older HP Smart Array 4988 * controllers. There are module paramaters that allow a user to 4989 * override this behavior and instead use the hpsa SCSI driver. If 4990 * this is the case cciss may be loaded first from the kdump initrd 4991 * image and cause a kernel panic. So if reset_devices is true and 4992 * cciss_allow_hpsa is set just bail. 4993 */ 4994 if ((reset_devices) && (cciss_allow_hpsa == 1)) 4995 return -ENODEV; 4996 rc = cciss_init_reset_devices(pdev); 4997 if (rc) { 4998 if (rc != -ENOTSUPP) 4999 return rc; 5000 /* If the reset fails in a particular way (it has no way to do 5001 * a proper hard reset, so returns -ENOTSUPP) we can try to do 5002 * a soft reset once we get the controller configured up to the 5003 * point that it can accept a command. 5004 */ 5005 try_soft_reset = 1; 5006 rc = 0; 5007 } 5008 5009reinit_after_soft_reset: 5010 5011 i = alloc_cciss_hba(pdev); 5012 if (i < 0) 5013 return -ENOMEM; 5014 5015 h = hba[i]; 5016 h->pdev = pdev; 5017 h->busy_initializing = 1; 5018 h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 5019 INIT_LIST_HEAD(&h->cmpQ); 5020 INIT_LIST_HEAD(&h->reqQ); 5021 mutex_init(&h->busy_shutting_down); 5022 5023 if (cciss_pci_init(h) != 0) 5024 goto clean_no_release_regions; 5025 5026 sprintf(h->devname, "cciss%d", i); 5027 h->ctlr = i; 5028 5029 if (cciss_tape_cmds < 2) 5030 cciss_tape_cmds = 2; 5031 if (cciss_tape_cmds > 16) 5032 cciss_tape_cmds = 16; 5033 5034 init_completion(&h->scan_wait); 5035 5036 if (cciss_create_hba_sysfs_entry(h)) 5037 goto clean0; 5038 5039 /* configure PCI DMA stuff */ 5040 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) 5041 dac = 1; 5042 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) 5043 dac = 0; 5044 else { 5045 dev_err(&h->pdev->dev, "no suitable DMA available\n"); 5046 goto clean1; 5047 } 5048 5049 /* 5050 * register with the major number, or get a dynamic major number 5051 * by passing 0 as argument. This is done for greater than 5052 * 8 controller support. 5053 */ 5054 if (i < MAX_CTLR_ORIG) 5055 h->major = COMPAQ_CISS_MAJOR + i; 5056 rc = register_blkdev(h->major, h->devname); 5057 if (rc == -EBUSY || rc == -EINVAL) { 5058 dev_err(&h->pdev->dev, 5059 "Unable to get major number %d for %s " 5060 "on hba %d\n", h->major, h->devname, i); 5061 goto clean1; 5062 } else { 5063 if (i >= MAX_CTLR_ORIG) 5064 h->major = rc; 5065 } 5066 5067 /* make sure the board interrupts are off */ 5068 h->access.set_intr_mask(h, CCISS_INTR_OFF); 5069 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx); 5070 if (rc) 5071 goto clean2; 5072 5073 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n", 5074 h->devname, pdev->device, pci_name(pdev), 5075 h->intr[h->intr_mode], dac ? "" : " not"); 5076 5077 if (cciss_allocate_cmd_pool(h)) 5078 goto clean4; 5079 5080 if (cciss_allocate_scatterlists(h)) 5081 goto clean4; 5082 5083 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h, 5084 h->chainsize, h->nr_cmds); 5085 if (!h->cmd_sg_list && h->chainsize > 0) 5086 goto clean4; 5087 5088 spin_lock_init(&h->lock); 5089 5090 /* Initialize the pdev driver private data. 5091 have it point to h. */ 5092 pci_set_drvdata(pdev, h); 5093 /* command and error info recs zeroed out before 5094 they are used */ 5095 bitmap_zero(h->cmd_pool_bits, h->nr_cmds); 5096 5097 h->num_luns = 0; 5098 h->highest_lun = -1; 5099 for (j = 0; j < CISS_MAX_LUN; j++) { 5100 h->drv[j] = NULL; 5101 h->gendisk[j] = NULL; 5102 } 5103 5104 /* At this point, the controller is ready to take commands. 5105 * Now, if reset_devices and the hard reset didn't work, try 5106 * the soft reset and see if that works. 5107 */ 5108 if (try_soft_reset) { 5109 5110 /* This is kind of gross. We may or may not get a completion 5111 * from the soft reset command, and if we do, then the value 5112 * from the fifo may or may not be valid. So, we wait 10 secs 5113 * after the reset throwing away any completions we get during 5114 * that time. Unregister the interrupt handler and register 5115 * fake ones to scoop up any residual completions. 5116 */ 5117 spin_lock_irqsave(&h->lock, flags); 5118 h->access.set_intr_mask(h, CCISS_INTR_OFF); 5119 spin_unlock_irqrestore(&h->lock, flags); 5120 free_irq(h->intr[h->intr_mode], h); 5121 rc = cciss_request_irq(h, cciss_msix_discard_completions, 5122 cciss_intx_discard_completions); 5123 if (rc) { 5124 dev_warn(&h->pdev->dev, "Failed to request_irq after " 5125 "soft reset.\n"); 5126 goto clean4; 5127 } 5128 5129 rc = cciss_kdump_soft_reset(h); 5130 if (rc) { 5131 dev_warn(&h->pdev->dev, "Soft reset failed.\n"); 5132 goto clean4; 5133 } 5134 5135 dev_info(&h->pdev->dev, "Board READY.\n"); 5136 dev_info(&h->pdev->dev, 5137 "Waiting for stale completions to drain.\n"); 5138 h->access.set_intr_mask(h, CCISS_INTR_ON); 5139 msleep(10000); 5140 h->access.set_intr_mask(h, CCISS_INTR_OFF); 5141 5142 rc = controller_reset_failed(h->cfgtable); 5143 if (rc) 5144 dev_info(&h->pdev->dev, 5145 "Soft reset appears to have failed.\n"); 5146 5147 /* since the controller's reset, we have to go back and re-init 5148 * everything. Easiest to just forget what we've done and do it 5149 * all over again. 5150 */ 5151 cciss_undo_allocations_after_kdump_soft_reset(h); 5152 try_soft_reset = 0; 5153 if (rc) 5154 /* don't go to clean4, we already unallocated */ 5155 return -ENODEV; 5156 5157 goto reinit_after_soft_reset; 5158 } 5159 5160 cciss_scsi_setup(h); 5161 5162 /* Turn the interrupts on so we can service requests */ 5163 h->access.set_intr_mask(h, CCISS_INTR_ON); 5164 5165 /* Get the firmware version */ 5166 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); 5167 if (inq_buff == NULL) { 5168 dev_err(&h->pdev->dev, "out of memory\n"); 5169 goto clean4; 5170 } 5171 5172 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, 5173 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD); 5174 if (return_code == IO_OK) { 5175 h->firm_ver[0] = inq_buff->data_byte[32]; 5176 h->firm_ver[1] = inq_buff->data_byte[33]; 5177 h->firm_ver[2] = inq_buff->data_byte[34]; 5178 h->firm_ver[3] = inq_buff->data_byte[35]; 5179 } else { /* send command failed */ 5180 dev_warn(&h->pdev->dev, "unable to determine firmware" 5181 " version of controller\n"); 5182 } 5183 kfree(inq_buff); 5184 5185 cciss_procinit(h); 5186 5187 h->cciss_max_sectors = 8192; 5188 5189 rebuild_lun_table(h, 1, 0); 5190 cciss_engage_scsi(h); 5191 h->busy_initializing = 0; 5192 return 0; 5193 5194clean4: 5195 cciss_free_cmd_pool(h); 5196 cciss_free_scatterlists(h); 5197 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); 5198 free_irq(h->intr[h->intr_mode], h); 5199clean2: 5200 unregister_blkdev(h->major, h->devname); 5201clean1: 5202 cciss_destroy_hba_sysfs_entry(h); 5203clean0: 5204 pci_release_regions(pdev); 5205clean_no_release_regions: 5206 h->busy_initializing = 0; 5207 5208 /* 5209 * Deliberately omit pci_disable_device(): it does something nasty to 5210 * Smart Array controllers that pci_enable_device does not undo 5211 */ 5212 pci_set_drvdata(pdev, NULL); 5213 free_hba(h); 5214 return -ENODEV; 5215} 5216 5217static void cciss_shutdown(struct pci_dev *pdev) 5218{ 5219 ctlr_info_t *h; 5220 char *flush_buf; 5221 int return_code; 5222 5223 h = pci_get_drvdata(pdev); 5224 flush_buf = kzalloc(4, GFP_KERNEL); 5225 if (!flush_buf) { 5226 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n"); 5227 return; 5228 } 5229 /* write all data in the battery backed cache to disk */ 5230 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf, 5231 4, 0, CTLR_LUNID, TYPE_CMD); 5232 kfree(flush_buf); 5233 if (return_code != IO_OK) 5234 dev_warn(&h->pdev->dev, "Error flushing cache\n"); 5235 h->access.set_intr_mask(h, CCISS_INTR_OFF); 5236 free_irq(h->intr[h->intr_mode], h); 5237} 5238 5239static int cciss_enter_simple_mode(struct ctlr_info *h) 5240{ 5241 u32 trans_support; 5242 5243 trans_support = readl(&(h->cfgtable->TransportSupport)); 5244 if (!(trans_support & SIMPLE_MODE)) 5245 return -ENOTSUPP; 5246 5247 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 5248 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 5249 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 5250 cciss_wait_for_mode_change_ack(h); 5251 print_cfg_table(h); 5252 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { 5253 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n"); 5254 return -ENODEV; 5255 } 5256 h->transMethod = CFGTBL_Trans_Simple; 5257 return 0; 5258} 5259 5260 5261static void cciss_remove_one(struct pci_dev *pdev) 5262{ 5263 ctlr_info_t *h; 5264 int i, j; 5265 5266 if (pci_get_drvdata(pdev) == NULL) { 5267 dev_err(&pdev->dev, "Unable to remove device\n"); 5268 return; 5269 } 5270 5271 h = pci_get_drvdata(pdev); 5272 i = h->ctlr; 5273 if (hba[i] == NULL) { 5274 dev_err(&pdev->dev, "device appears to already be removed\n"); 5275 return; 5276 } 5277 5278 mutex_lock(&h->busy_shutting_down); 5279 5280 remove_from_scan_list(h); 5281 remove_proc_entry(h->devname, proc_cciss); 5282 unregister_blkdev(h->major, h->devname); 5283 5284 /* remove it from the disk list */ 5285 for (j = 0; j < CISS_MAX_LUN; j++) { 5286 struct gendisk *disk = h->gendisk[j]; 5287 if (disk) { 5288 struct request_queue *q = disk->queue; 5289 5290 if (disk->flags & GENHD_FL_UP) { 5291 cciss_destroy_ld_sysfs_entry(h, j, 1); 5292 del_gendisk(disk); 5293 } 5294 if (q) 5295 blk_cleanup_queue(q); 5296 } 5297 } 5298 5299#ifdef CONFIG_CISS_SCSI_TAPE 5300 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */ 5301#endif 5302 5303 cciss_shutdown(pdev); 5304 5305#ifdef CONFIG_PCI_MSI 5306 if (h->msix_vector) 5307 pci_disable_msix(h->pdev); 5308 else if (h->msi_vector) 5309 pci_disable_msi(h->pdev); 5310#endif /* CONFIG_PCI_MSI */ 5311 5312 iounmap(h->transtable); 5313 iounmap(h->cfgtable); 5314 iounmap(h->vaddr); 5315 5316 cciss_free_cmd_pool(h); 5317 /* Free up sg elements */ 5318 for (j = 0; j < h->nr_cmds; j++) 5319 kfree(h->scatter_list[j]); 5320 kfree(h->scatter_list); 5321 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); 5322 kfree(h->blockFetchTable); 5323 if (h->reply_pool) 5324 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64), 5325 h->reply_pool, h->reply_pool_dhandle); 5326 /* 5327 * Deliberately omit pci_disable_device(): it does something nasty to 5328 * Smart Array controllers that pci_enable_device does not undo 5329 */ 5330 pci_release_regions(pdev); 5331 pci_set_drvdata(pdev, NULL); 5332 cciss_destroy_hba_sysfs_entry(h); 5333 mutex_unlock(&h->busy_shutting_down); 5334 free_hba(h); 5335} 5336 5337static struct pci_driver cciss_pci_driver = { 5338 .name = "cciss", 5339 .probe = cciss_init_one, 5340 .remove = cciss_remove_one, 5341 .id_table = cciss_pci_device_id, /* id_table */ 5342 .shutdown = cciss_shutdown, 5343}; 5344 5345/* 5346 * This is it. Register the PCI driver information for the cards we control 5347 * the OS will call our registered routines when it finds one of our cards. 5348 */ 5349static int __init cciss_init(void) 5350{ 5351 int err; 5352 5353 /* 5354 * The hardware requires that commands are aligned on a 64-bit 5355 * boundary. Given that we use pci_alloc_consistent() to allocate an 5356 * array of them, the size must be a multiple of 8 bytes. 5357 */ 5358 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT); 5359 printk(KERN_INFO DRIVER_NAME "\n"); 5360 5361 err = bus_register(&cciss_bus_type); 5362 if (err) 5363 return err; 5364 5365 /* Start the scan thread */ 5366 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan"); 5367 if (IS_ERR(cciss_scan_thread)) { 5368 err = PTR_ERR(cciss_scan_thread); 5369 goto err_bus_unregister; 5370 } 5371 5372 /* Register for our PCI devices */ 5373 err = pci_register_driver(&cciss_pci_driver); 5374 if (err) 5375 goto err_thread_stop; 5376 5377 return err; 5378 5379err_thread_stop: 5380 kthread_stop(cciss_scan_thread); 5381err_bus_unregister: 5382 bus_unregister(&cciss_bus_type); 5383 5384 return err; 5385} 5386 5387static void __exit cciss_cleanup(void) 5388{ 5389 int i; 5390 5391 pci_unregister_driver(&cciss_pci_driver); 5392 /* double check that all controller entrys have been removed */ 5393 for (i = 0; i < MAX_CTLR; i++) { 5394 if (hba[i] != NULL) { 5395 dev_warn(&hba[i]->pdev->dev, 5396 "had to remove controller\n"); 5397 cciss_remove_one(hba[i]->pdev); 5398 } 5399 } 5400 kthread_stop(cciss_scan_thread); 5401 if (proc_cciss) 5402 remove_proc_entry("driver/cciss", NULL); 5403 bus_unregister(&cciss_bus_type); 5404} 5405 5406module_init(cciss_init); 5407module_exit(cciss_cleanup); 5408