1/* 2 * intel_mid_sfi.c: Intel MID SFI initialization code 3 * 4 * (C) Copyright 2013 Intel Corporation 5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 13#include <linux/init.h> 14#include <linux/kernel.h> 15#include <linux/interrupt.h> 16#include <linux/scatterlist.h> 17#include <linux/sfi.h> 18#include <linux/intel_pmic_gpio.h> 19#include <linux/spi/spi.h> 20#include <linux/i2c.h> 21#include <linux/skbuff.h> 22#include <linux/gpio.h> 23#include <linux/gpio_keys.h> 24#include <linux/input.h> 25#include <linux/platform_device.h> 26#include <linux/irq.h> 27#include <linux/module.h> 28#include <linux/notifier.h> 29#include <linux/mmc/core.h> 30#include <linux/mmc/card.h> 31#include <linux/blkdev.h> 32 33#include <asm/setup.h> 34#include <asm/mpspec_def.h> 35#include <asm/hw_irq.h> 36#include <asm/apic.h> 37#include <asm/io_apic.h> 38#include <asm/intel-mid.h> 39#include <asm/intel_mid_vrtc.h> 40#include <asm/io.h> 41#include <asm/i8259.h> 42#include <asm/intel_scu_ipc.h> 43#include <asm/apb_timer.h> 44#include <asm/reboot.h> 45 46#define SFI_SIG_OEM0 "OEM0" 47#define MAX_IPCDEVS 24 48#define MAX_SCU_SPI 24 49#define MAX_SCU_I2C 24 50 51static struct platform_device *ipc_devs[MAX_IPCDEVS]; 52static struct spi_board_info *spi_devs[MAX_SCU_SPI]; 53static struct i2c_board_info *i2c_devs[MAX_SCU_I2C]; 54static struct sfi_gpio_table_entry *gpio_table; 55static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM]; 56static int ipc_next_dev; 57static int spi_next_dev; 58static int i2c_next_dev; 59static int i2c_bus[MAX_SCU_I2C]; 60static int gpio_num_entry; 61static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM]; 62int sfi_mrtc_num; 63int sfi_mtimer_num; 64 65struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX]; 66EXPORT_SYMBOL_GPL(sfi_mrtc_array); 67 68struct blocking_notifier_head intel_scu_notifier = 69 BLOCKING_NOTIFIER_INIT(intel_scu_notifier); 70EXPORT_SYMBOL_GPL(intel_scu_notifier); 71 72#define intel_mid_sfi_get_pdata(dev, priv) \ 73 ((dev)->get_platform_data ? (dev)->get_platform_data(priv) : NULL) 74 75/* parse all the mtimer info to a static mtimer array */ 76int __init sfi_parse_mtmr(struct sfi_table_header *table) 77{ 78 struct sfi_table_simple *sb; 79 struct sfi_timer_table_entry *pentry; 80 struct mpc_intsrc mp_irq; 81 int totallen; 82 83 sb = (struct sfi_table_simple *)table; 84 if (!sfi_mtimer_num) { 85 sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb, 86 struct sfi_timer_table_entry); 87 pentry = (struct sfi_timer_table_entry *) sb->pentry; 88 totallen = sfi_mtimer_num * sizeof(*pentry); 89 memcpy(sfi_mtimer_array, pentry, totallen); 90 } 91 92 pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num); 93 pentry = sfi_mtimer_array; 94 for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) { 95 pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n", 96 totallen, (u32)pentry->phys_addr, 97 pentry->freq_hz, pentry->irq); 98 mp_irq.type = MP_INTSRC; 99 mp_irq.irqtype = mp_INT; 100 /* triggering mode edge bit 2-3, active high polarity bit 0-1 */ 101 mp_irq.irqflag = 5; 102 mp_irq.srcbus = MP_BUS_ISA; 103 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 104 mp_irq.dstapic = MP_APIC_ALL; 105 mp_irq.dstirq = pentry->irq; 106 mp_save_irq(&mp_irq); 107 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL); 108 } 109 110 return 0; 111} 112 113struct sfi_timer_table_entry *sfi_get_mtmr(int hint) 114{ 115 int i; 116 if (hint < sfi_mtimer_num) { 117 if (!sfi_mtimer_usage[hint]) { 118 pr_debug("hint taken for timer %d irq %d\n", 119 hint, sfi_mtimer_array[hint].irq); 120 sfi_mtimer_usage[hint] = 1; 121 return &sfi_mtimer_array[hint]; 122 } 123 } 124 /* take the first timer available */ 125 for (i = 0; i < sfi_mtimer_num;) { 126 if (!sfi_mtimer_usage[i]) { 127 sfi_mtimer_usage[i] = 1; 128 return &sfi_mtimer_array[i]; 129 } 130 i++; 131 } 132 return NULL; 133} 134 135void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr) 136{ 137 int i; 138 for (i = 0; i < sfi_mtimer_num;) { 139 if (mtmr->irq == sfi_mtimer_array[i].irq) { 140 sfi_mtimer_usage[i] = 0; 141 return; 142 } 143 i++; 144 } 145} 146 147/* parse all the mrtc info to a global mrtc array */ 148int __init sfi_parse_mrtc(struct sfi_table_header *table) 149{ 150 struct sfi_table_simple *sb; 151 struct sfi_rtc_table_entry *pentry; 152 struct mpc_intsrc mp_irq; 153 154 int totallen; 155 156 sb = (struct sfi_table_simple *)table; 157 if (!sfi_mrtc_num) { 158 sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb, 159 struct sfi_rtc_table_entry); 160 pentry = (struct sfi_rtc_table_entry *)sb->pentry; 161 totallen = sfi_mrtc_num * sizeof(*pentry); 162 memcpy(sfi_mrtc_array, pentry, totallen); 163 } 164 165 pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num); 166 pentry = sfi_mrtc_array; 167 for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) { 168 pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n", 169 totallen, (u32)pentry->phys_addr, pentry->irq); 170 mp_irq.type = MP_INTSRC; 171 mp_irq.irqtype = mp_INT; 172 mp_irq.irqflag = 0xf; /* level trigger and active low */ 173 mp_irq.srcbus = MP_BUS_ISA; 174 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 175 mp_irq.dstapic = MP_APIC_ALL; 176 mp_irq.dstirq = pentry->irq; 177 mp_save_irq(&mp_irq); 178 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL); 179 } 180 return 0; 181} 182 183 184/* 185 * Parsing GPIO table first, since the DEVS table will need this table 186 * to map the pin name to the actual pin. 187 */ 188static int __init sfi_parse_gpio(struct sfi_table_header *table) 189{ 190 struct sfi_table_simple *sb; 191 struct sfi_gpio_table_entry *pentry; 192 int num, i; 193 194 if (gpio_table) 195 return 0; 196 sb = (struct sfi_table_simple *)table; 197 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry); 198 pentry = (struct sfi_gpio_table_entry *)sb->pentry; 199 200 gpio_table = kmemdup(pentry, num * sizeof(*pentry), GFP_KERNEL); 201 if (!gpio_table) 202 return -1; 203 gpio_num_entry = num; 204 205 pr_debug("GPIO pin info:\n"); 206 for (i = 0; i < num; i++, pentry++) 207 pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s," 208 " pin = %d\n", i, 209 pentry->controller_name, 210 pentry->pin_name, 211 pentry->pin_no); 212 return 0; 213} 214 215int get_gpio_by_name(const char *name) 216{ 217 struct sfi_gpio_table_entry *pentry = gpio_table; 218 int i; 219 220 if (!pentry) 221 return -1; 222 for (i = 0; i < gpio_num_entry; i++, pentry++) { 223 if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN)) 224 return pentry->pin_no; 225 } 226 return -EINVAL; 227} 228 229void __init intel_scu_device_register(struct platform_device *pdev) 230{ 231 if (ipc_next_dev == MAX_IPCDEVS) 232 pr_err("too many SCU IPC devices"); 233 else 234 ipc_devs[ipc_next_dev++] = pdev; 235} 236 237static void __init intel_scu_spi_device_register(struct spi_board_info *sdev) 238{ 239 struct spi_board_info *new_dev; 240 241 if (spi_next_dev == MAX_SCU_SPI) { 242 pr_err("too many SCU SPI devices"); 243 return; 244 } 245 246 new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL); 247 if (!new_dev) { 248 pr_err("failed to alloc mem for delayed spi dev %s\n", 249 sdev->modalias); 250 return; 251 } 252 *new_dev = *sdev; 253 254 spi_devs[spi_next_dev++] = new_dev; 255} 256 257static void __init intel_scu_i2c_device_register(int bus, 258 struct i2c_board_info *idev) 259{ 260 struct i2c_board_info *new_dev; 261 262 if (i2c_next_dev == MAX_SCU_I2C) { 263 pr_err("too many SCU I2C devices"); 264 return; 265 } 266 267 new_dev = kzalloc(sizeof(*idev), GFP_KERNEL); 268 if (!new_dev) { 269 pr_err("failed to alloc mem for delayed i2c dev %s\n", 270 idev->type); 271 return; 272 } 273 *new_dev = *idev; 274 275 i2c_bus[i2c_next_dev] = bus; 276 i2c_devs[i2c_next_dev++] = new_dev; 277} 278 279/* Called by IPC driver */ 280void intel_scu_devices_create(void) 281{ 282 int i; 283 284 for (i = 0; i < ipc_next_dev; i++) 285 platform_device_add(ipc_devs[i]); 286 287 for (i = 0; i < spi_next_dev; i++) 288 spi_register_board_info(spi_devs[i], 1); 289 290 for (i = 0; i < i2c_next_dev; i++) { 291 struct i2c_adapter *adapter; 292 struct i2c_client *client; 293 294 adapter = i2c_get_adapter(i2c_bus[i]); 295 if (adapter) { 296 client = i2c_new_device(adapter, i2c_devs[i]); 297 if (!client) 298 pr_err("can't create i2c device %s\n", 299 i2c_devs[i]->type); 300 } else 301 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1); 302 } 303 intel_scu_notifier_post(SCU_AVAILABLE, NULL); 304} 305EXPORT_SYMBOL_GPL(intel_scu_devices_create); 306 307/* Called by IPC driver */ 308void intel_scu_devices_destroy(void) 309{ 310 int i; 311 312 intel_scu_notifier_post(SCU_DOWN, NULL); 313 314 for (i = 0; i < ipc_next_dev; i++) 315 platform_device_del(ipc_devs[i]); 316} 317EXPORT_SYMBOL_GPL(intel_scu_devices_destroy); 318 319static void __init install_irq_resource(struct platform_device *pdev, int irq) 320{ 321 /* Single threaded */ 322 static struct resource res __initdata = { 323 .name = "IRQ", 324 .flags = IORESOURCE_IRQ, 325 }; 326 res.start = irq; 327 platform_device_add_resources(pdev, &res, 1); 328} 329 330static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *pentry, 331 struct devs_id *dev) 332{ 333 struct platform_device *pdev; 334 void *pdata = NULL; 335 336 pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n", 337 pentry->name, pentry->irq); 338 pdata = intel_mid_sfi_get_pdata(dev, pentry); 339 if (IS_ERR(pdata)) 340 return; 341 342 pdev = platform_device_alloc(pentry->name, 0); 343 if (pdev == NULL) { 344 pr_err("out of memory for SFI platform device '%s'.\n", 345 pentry->name); 346 return; 347 } 348 install_irq_resource(pdev, pentry->irq); 349 350 pdev->dev.platform_data = pdata; 351 platform_device_add(pdev); 352} 353 354static void __init sfi_handle_spi_dev(struct sfi_device_table_entry *pentry, 355 struct devs_id *dev) 356{ 357 struct spi_board_info spi_info; 358 void *pdata = NULL; 359 360 memset(&spi_info, 0, sizeof(spi_info)); 361 strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN); 362 spi_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq); 363 spi_info.bus_num = pentry->host_num; 364 spi_info.chip_select = pentry->addr; 365 spi_info.max_speed_hz = pentry->max_freq; 366 pr_debug("SPI bus=%d, name=%16.16s, irq=0x%2x, max_freq=%d, cs=%d\n", 367 spi_info.bus_num, 368 spi_info.modalias, 369 spi_info.irq, 370 spi_info.max_speed_hz, 371 spi_info.chip_select); 372 373 pdata = intel_mid_sfi_get_pdata(dev, &spi_info); 374 if (IS_ERR(pdata)) 375 return; 376 377 spi_info.platform_data = pdata; 378 if (dev->delay) 379 intel_scu_spi_device_register(&spi_info); 380 else 381 spi_register_board_info(&spi_info, 1); 382} 383 384static void __init sfi_handle_i2c_dev(struct sfi_device_table_entry *pentry, 385 struct devs_id *dev) 386{ 387 struct i2c_board_info i2c_info; 388 void *pdata = NULL; 389 390 memset(&i2c_info, 0, sizeof(i2c_info)); 391 strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN); 392 i2c_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq); 393 i2c_info.addr = pentry->addr; 394 pr_debug("I2C bus = %d, name = %16.16s, irq = 0x%2x, addr = 0x%x\n", 395 pentry->host_num, 396 i2c_info.type, 397 i2c_info.irq, 398 i2c_info.addr); 399 pdata = intel_mid_sfi_get_pdata(dev, &i2c_info); 400 i2c_info.platform_data = pdata; 401 if (IS_ERR(pdata)) 402 return; 403 404 if (dev->delay) 405 intel_scu_i2c_device_register(pentry->host_num, &i2c_info); 406 else 407 i2c_register_board_info(pentry->host_num, &i2c_info, 1); 408} 409 410extern struct devs_id *const __x86_intel_mid_dev_start[], 411 *const __x86_intel_mid_dev_end[]; 412 413static struct devs_id __init *get_device_id(u8 type, char *name) 414{ 415 struct devs_id *const *dev_table; 416 417 for (dev_table = __x86_intel_mid_dev_start; 418 dev_table < __x86_intel_mid_dev_end; dev_table++) { 419 struct devs_id *dev = *dev_table; 420 if (dev->type == type && 421 !strncmp(dev->name, name, SFI_NAME_LEN)) { 422 return dev; 423 } 424 } 425 426 return NULL; 427} 428 429static int __init sfi_parse_devs(struct sfi_table_header *table) 430{ 431 struct sfi_table_simple *sb; 432 struct sfi_device_table_entry *pentry; 433 struct devs_id *dev = NULL; 434 int num, i, ret; 435 int polarity; 436 struct irq_alloc_info info; 437 438 sb = (struct sfi_table_simple *)table; 439 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry); 440 pentry = (struct sfi_device_table_entry *)sb->pentry; 441 442 for (i = 0; i < num; i++, pentry++) { 443 int irq = pentry->irq; 444 445 if (irq != (u8)0xff) { /* native RTE case */ 446 /* these SPI2 devices are not exposed to system as PCI 447 * devices, but they have separate RTE entry in IOAPIC 448 * so we have to enable them one by one here 449 */ 450 if (intel_mid_identify_cpu() == 451 INTEL_MID_CPU_CHIP_TANGIER) { 452 if (!strncmp(pentry->name, "r69001-ts-i2c", 13)) 453 /* active low */ 454 polarity = 1; 455 else if (!strncmp(pentry->name, 456 "synaptics_3202", 14)) 457 /* active low */ 458 polarity = 1; 459 else if (irq == 41) 460 /* fast_int_1 */ 461 polarity = 1; 462 else 463 /* active high */ 464 polarity = 0; 465 } else { 466 /* PNW and CLV go with active low */ 467 polarity = 1; 468 } 469 470 ioapic_set_alloc_attr(&info, NUMA_NO_NODE, 1, polarity); 471 ret = mp_map_gsi_to_irq(irq, IOAPIC_MAP_ALLOC, &info); 472 WARN_ON(ret < 0); 473 } 474 475 dev = get_device_id(pentry->type, pentry->name); 476 477 if (!dev) 478 continue; 479 480 if (dev->device_handler) { 481 dev->device_handler(pentry, dev); 482 } else { 483 switch (pentry->type) { 484 case SFI_DEV_TYPE_IPC: 485 sfi_handle_ipc_dev(pentry, dev); 486 break; 487 case SFI_DEV_TYPE_SPI: 488 sfi_handle_spi_dev(pentry, dev); 489 break; 490 case SFI_DEV_TYPE_I2C: 491 sfi_handle_i2c_dev(pentry, dev); 492 break; 493 case SFI_DEV_TYPE_UART: 494 case SFI_DEV_TYPE_HSI: 495 default: 496 break; 497 } 498 } 499 } 500 return 0; 501} 502 503static int __init intel_mid_platform_init(void) 504{ 505 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio); 506 sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs); 507 return 0; 508} 509arch_initcall(intel_mid_platform_init); 510