1/* Sparc SS1000/SC2000 SMP support.
2 *
3 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
4 *
5 * Based on sun4m's smp.c, which is:
6 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
7 */
8
9#include <linux/clockchips.h>
10#include <linux/interrupt.h>
11#include <linux/profile.h>
12#include <linux/delay.h>
13#include <linux/sched.h>
14#include <linux/cpu.h>
15
16#include <asm/cacheflush.h>
17#include <asm/switch_to.h>
18#include <asm/tlbflush.h>
19#include <asm/timer.h>
20#include <asm/oplib.h>
21#include <asm/sbi.h>
22#include <asm/mmu.h>
23
24#include "kernel.h"
25#include "irq.h"
26
27#define IRQ_CROSS_CALL		15
28
29static volatile int smp_processors_ready;
30static int smp_highest_cpu;
31
32static inline unsigned long sun4d_swap(volatile unsigned long *ptr, unsigned long val)
33{
34	__asm__ __volatile__("swap [%1], %0\n\t" :
35			     "=&r" (val), "=&r" (ptr) :
36			     "0" (val), "1" (ptr));
37	return val;
38}
39
40static void smp4d_ipi_init(void);
41
42static unsigned char cpu_leds[32];
43
44static inline void show_leds(int cpuid)
45{
46	cpuid &= 0x1e;
47	__asm__ __volatile__ ("stba %0, [%1] %2" : :
48			      "r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]),
49			      "r" (ECSR_BASE(cpuid) | BB_LEDS),
50			      "i" (ASI_M_CTL));
51}
52
53void sun4d_cpu_pre_starting(void *arg)
54{
55	int cpuid = hard_smp_processor_id();
56
57	/* Show we are alive */
58	cpu_leds[cpuid] = 0x6;
59	show_leds(cpuid);
60
61	/* Enable level15 interrupt, disable level14 interrupt for now */
62	cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
63}
64
65void sun4d_cpu_pre_online(void *arg)
66{
67	unsigned long flags;
68	int cpuid;
69
70	cpuid = hard_smp_processor_id();
71
72	/* Unblock the master CPU _only_ when the scheduler state
73	 * of all secondary CPUs will be up-to-date, so after
74	 * the SMP initialization the master will be just allowed
75	 * to call the scheduler code.
76	 */
77	sun4d_swap((unsigned long *)&cpu_callin_map[cpuid], 1);
78	local_ops->cache_all();
79	local_ops->tlb_all();
80
81	while ((unsigned long)current_set[cpuid] < PAGE_OFFSET)
82		barrier();
83
84	while (current_set[cpuid]->cpu != cpuid)
85		barrier();
86
87	/* Fix idle thread fields. */
88	__asm__ __volatile__("ld [%0], %%g6\n\t"
89			     : : "r" (&current_set[cpuid])
90			     : "memory" /* paranoid */);
91
92	cpu_leds[cpuid] = 0x9;
93	show_leds(cpuid);
94
95	/* Attach to the address space of init_task. */
96	atomic_inc(&init_mm.mm_count);
97	current->active_mm = &init_mm;
98
99	local_ops->cache_all();
100	local_ops->tlb_all();
101
102	while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
103		barrier();
104
105	spin_lock_irqsave(&sun4d_imsk_lock, flags);
106	cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
107	spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
108}
109
110/*
111 *	Cycle through the processors asking the PROM to start each one.
112 */
113void __init smp4d_boot_cpus(void)
114{
115	smp4d_ipi_init();
116	if (boot_cpu_id)
117		current_set[0] = NULL;
118	local_ops->cache_all();
119}
120
121int smp4d_boot_one_cpu(int i, struct task_struct *idle)
122{
123	unsigned long *entry = &sun4d_cpu_startup;
124	int timeout;
125	int cpu_node;
126
127	cpu_find_by_instance(i, &cpu_node, NULL);
128	current_set[i] = task_thread_info(idle);
129	/*
130	 * Initialize the contexts table
131	 * Since the call to prom_startcpu() trashes the structure,
132	 * we need to re-initialize it for each cpu
133	 */
134	smp_penguin_ctable.which_io = 0;
135	smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
136	smp_penguin_ctable.reg_size = 0;
137
138	/* whirrr, whirrr, whirrrrrrrrr... */
139	printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);
140	local_ops->cache_all();
141	prom_startcpu(cpu_node,
142		      &smp_penguin_ctable, 0, (char *)entry);
143
144	printk(KERN_INFO "prom_startcpu returned :)\n");
145
146	/* wheee... it's going... */
147	for (timeout = 0; timeout < 10000; timeout++) {
148		if (cpu_callin_map[i])
149			break;
150		udelay(200);
151	}
152
153	if (!(cpu_callin_map[i])) {
154		printk(KERN_ERR "Processor %d is stuck.\n", i);
155		return -ENODEV;
156
157	}
158	local_ops->cache_all();
159	return 0;
160}
161
162void __init smp4d_smp_done(void)
163{
164	int i, first;
165	int *prev;
166
167	/* setup cpu list for irq rotation */
168	first = 0;
169	prev = &first;
170	for_each_online_cpu(i) {
171		*prev = i;
172		prev = &cpu_data(i).next;
173	}
174	*prev = first;
175	local_ops->cache_all();
176
177	/* Ok, they are spinning and ready to go. */
178	smp_processors_ready = 1;
179	sun4d_distribute_irqs();
180}
181
182/* Memory structure giving interrupt handler information about IPI generated */
183struct sun4d_ipi_work {
184	int single;
185	int msk;
186	int resched;
187};
188
189static DEFINE_PER_CPU_SHARED_ALIGNED(struct sun4d_ipi_work, sun4d_ipi_work);
190
191/* Initialize IPIs on the SUN4D SMP machine */
192static void __init smp4d_ipi_init(void)
193{
194	int cpu;
195	struct sun4d_ipi_work *work;
196
197	printk(KERN_INFO "smp4d: setup IPI at IRQ %d\n", SUN4D_IPI_IRQ);
198
199	for_each_possible_cpu(cpu) {
200		work = &per_cpu(sun4d_ipi_work, cpu);
201		work->single = work->msk = work->resched = 0;
202	}
203}
204
205void sun4d_ipi_interrupt(void)
206{
207	struct sun4d_ipi_work *work = this_cpu_ptr(&sun4d_ipi_work);
208
209	if (work->single) {
210		work->single = 0;
211		smp_call_function_single_interrupt();
212	}
213	if (work->msk) {
214		work->msk = 0;
215		smp_call_function_interrupt();
216	}
217	if (work->resched) {
218		work->resched = 0;
219		smp_resched_interrupt();
220	}
221}
222
223/* +-------+-------------+-----------+------------------------------------+
224 * | bcast |  devid      |   sid     |              levels mask           |
225 * +-------+-------------+-----------+------------------------------------+
226 *  31      30         23 22       15 14                                 0
227 */
228#define IGEN_MESSAGE(bcast, devid, sid, levels) \
229	(((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels))
230
231static void sun4d_send_ipi(int cpu, int level)
232{
233	cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1)));
234}
235
236static void sun4d_ipi_single(int cpu)
237{
238	struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
239
240	/* Mark work */
241	work->single = 1;
242
243	/* Generate IRQ on the CPU */
244	sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
245}
246
247static void sun4d_ipi_mask_one(int cpu)
248{
249	struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
250
251	/* Mark work */
252	work->msk = 1;
253
254	/* Generate IRQ on the CPU */
255	sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
256}
257
258static void sun4d_ipi_resched(int cpu)
259{
260	struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
261
262	/* Mark work */
263	work->resched = 1;
264
265	/* Generate IRQ on the CPU (any IRQ will cause resched) */
266	sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
267}
268
269static struct smp_funcall {
270	smpfunc_t func;
271	unsigned long arg1;
272	unsigned long arg2;
273	unsigned long arg3;
274	unsigned long arg4;
275	unsigned long arg5;
276	unsigned char processors_in[NR_CPUS];  /* Set when ipi entered. */
277	unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
278} ccall_info __attribute__((aligned(8)));
279
280static DEFINE_SPINLOCK(cross_call_lock);
281
282/* Cross calls must be serialized, at least currently. */
283static void sun4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
284			     unsigned long arg2, unsigned long arg3,
285			     unsigned long arg4)
286{
287	if (smp_processors_ready) {
288		register int high = smp_highest_cpu;
289		unsigned long flags;
290
291		spin_lock_irqsave(&cross_call_lock, flags);
292
293		{
294			/*
295			 * If you make changes here, make sure
296			 * gcc generates proper code...
297			 */
298			register smpfunc_t f asm("i0") = func;
299			register unsigned long a1 asm("i1") = arg1;
300			register unsigned long a2 asm("i2") = arg2;
301			register unsigned long a3 asm("i3") = arg3;
302			register unsigned long a4 asm("i4") = arg4;
303			register unsigned long a5 asm("i5") = 0;
304
305			__asm__ __volatile__(
306				"std %0, [%6]\n\t"
307				"std %2, [%6 + 8]\n\t"
308				"std %4, [%6 + 16]\n\t" : :
309				"r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
310				"r" (&ccall_info.func));
311		}
312
313		/* Init receive/complete mapping, plus fire the IPI's off. */
314		{
315			register int i;
316
317			cpumask_clear_cpu(smp_processor_id(), &mask);
318			cpumask_and(&mask, cpu_online_mask, &mask);
319			for (i = 0; i <= high; i++) {
320				if (cpumask_test_cpu(i, &mask)) {
321					ccall_info.processors_in[i] = 0;
322					ccall_info.processors_out[i] = 0;
323					sun4d_send_ipi(i, IRQ_CROSS_CALL);
324				}
325			}
326		}
327
328		{
329			register int i;
330
331			i = 0;
332			do {
333				if (!cpumask_test_cpu(i, &mask))
334					continue;
335				while (!ccall_info.processors_in[i])
336					barrier();
337			} while (++i <= high);
338
339			i = 0;
340			do {
341				if (!cpumask_test_cpu(i, &mask))
342					continue;
343				while (!ccall_info.processors_out[i])
344					barrier();
345			} while (++i <= high);
346		}
347
348		spin_unlock_irqrestore(&cross_call_lock, flags);
349	}
350}
351
352/* Running cross calls. */
353void smp4d_cross_call_irq(void)
354{
355	int i = hard_smp_processor_id();
356
357	ccall_info.processors_in[i] = 1;
358	ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
359			ccall_info.arg4, ccall_info.arg5);
360	ccall_info.processors_out[i] = 1;
361}
362
363void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
364{
365	struct pt_regs *old_regs;
366	int cpu = hard_smp_processor_id();
367	struct clock_event_device *ce;
368	static int cpu_tick[NR_CPUS];
369	static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
370
371	old_regs = set_irq_regs(regs);
372	bw_get_prof_limit(cpu);
373	bw_clear_intr_mask(0, 1);	/* INTR_TABLE[0] & 1 is Profile IRQ */
374
375	cpu_tick[cpu]++;
376	if (!(cpu_tick[cpu] & 15)) {
377		if (cpu_tick[cpu] == 0x60)
378			cpu_tick[cpu] = 0;
379		cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
380		show_leds(cpu);
381	}
382
383	ce = &per_cpu(sparc32_clockevent, cpu);
384
385	irq_enter();
386	ce->event_handler(ce);
387	irq_exit();
388
389	set_irq_regs(old_regs);
390}
391
392static const struct sparc32_ipi_ops sun4d_ipi_ops = {
393	.cross_call = sun4d_cross_call,
394	.resched    = sun4d_ipi_resched,
395	.single     = sun4d_ipi_single,
396	.mask_one   = sun4d_ipi_mask_one,
397};
398
399void __init sun4d_init_smp(void)
400{
401	int i;
402
403	/* Patch ipi15 trap table */
404	t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
405
406	sparc32_ipi_ops = &sun4d_ipi_ops;
407
408	for (i = 0; i < NR_CPUS; i++) {
409		ccall_info.processors_in[i] = 1;
410		ccall_info.processors_out[i] = 1;
411	}
412}
413