1/*
2 * This header provides clock numbers for the ingenic,jz4740-cgu DT binding.
3 *
4 * They are roughly ordered as:
5 *   - external clocks
6 *   - PLLs
7 *   - muxes/dividers in the order they appear in the jz4740 programmers manual
8 *   - gates in order of their bit in the CLKGR* registers
9 */
10
11#ifndef __DT_BINDINGS_CLOCK_JZ4740_CGU_H__
12#define __DT_BINDINGS_CLOCK_JZ4740_CGU_H__
13
14#define JZ4740_CLK_EXT		0
15#define JZ4740_CLK_RTC		1
16#define JZ4740_CLK_PLL		2
17#define JZ4740_CLK_PLL_HALF	3
18#define JZ4740_CLK_CCLK		4
19#define JZ4740_CLK_HCLK		5
20#define JZ4740_CLK_PCLK		6
21#define JZ4740_CLK_MCLK		7
22#define JZ4740_CLK_LCD		8
23#define JZ4740_CLK_LCD_PCLK	9
24#define JZ4740_CLK_I2S		10
25#define JZ4740_CLK_SPI		11
26#define JZ4740_CLK_MMC		12
27#define JZ4740_CLK_UHC		13
28#define JZ4740_CLK_UDC		14
29#define JZ4740_CLK_UART0	15
30#define JZ4740_CLK_UART1	16
31#define JZ4740_CLK_DMA		17
32#define JZ4740_CLK_IPU		18
33#define JZ4740_CLK_ADC		19
34#define JZ4740_CLK_I2C		20
35#define JZ4740_CLK_AIC		21
36
37#endif /* __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ */
38