1/*
2 * Atheros DB120 reference board support
3 *
4 * Copyright (c) 2011 Qualcomm Atheros
5 * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 */
20
21#include <linux/pci.h>
22#include <linux/ath9k_platform.h>
23
24#include "machtypes.h"
25#include "dev-gpio-buttons.h"
26#include "dev-leds-gpio.h"
27#include "dev-spi.h"
28#include "dev-usb.h"
29#include "dev-wmac.h"
30#include "pci.h"
31
32#define DB120_GPIO_LED_WLAN_5G		12
33#define DB120_GPIO_LED_WLAN_2G		13
34#define DB120_GPIO_LED_STATUS		14
35#define DB120_GPIO_LED_WPS		15
36
37#define DB120_GPIO_BTN_WPS		16
38
39#define DB120_KEYS_POLL_INTERVAL	20	/* msecs */
40#define DB120_KEYS_DEBOUNCE_INTERVAL	(3 * DB120_KEYS_POLL_INTERVAL)
41
42#define DB120_WMAC_CALDATA_OFFSET 0x1000
43#define DB120_PCIE_CALDATA_OFFSET 0x5000
44
45static struct gpio_led db120_leds_gpio[] __initdata = {
46	{
47		.name		= "db120:green:status",
48		.gpio		= DB120_GPIO_LED_STATUS,
49		.active_low	= 1,
50	},
51	{
52		.name		= "db120:green:wps",
53		.gpio		= DB120_GPIO_LED_WPS,
54		.active_low	= 1,
55	},
56	{
57		.name		= "db120:green:wlan-5g",
58		.gpio		= DB120_GPIO_LED_WLAN_5G,
59		.active_low	= 1,
60	},
61	{
62		.name		= "db120:green:wlan-2g",
63		.gpio		= DB120_GPIO_LED_WLAN_2G,
64		.active_low	= 1,
65	},
66};
67
68static struct gpio_keys_button db120_gpio_keys[] __initdata = {
69	{
70		.desc		= "WPS button",
71		.type		= EV_KEY,
72		.code		= KEY_WPS_BUTTON,
73		.debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL,
74		.gpio		= DB120_GPIO_BTN_WPS,
75		.active_low	= 1,
76	},
77};
78
79static struct spi_board_info db120_spi_info[] = {
80	{
81		.bus_num	= 0,
82		.chip_select	= 0,
83		.max_speed_hz	= 25000000,
84		.modalias	= "s25sl064a",
85	}
86};
87
88static struct ath79_spi_platform_data db120_spi_data = {
89	.bus_num	= 0,
90	.num_chipselect = 1,
91};
92
93#ifdef CONFIG_PCI
94static struct ath9k_platform_data db120_ath9k_data;
95
96static int db120_pci_plat_dev_init(struct pci_dev *dev)
97{
98	switch (PCI_SLOT(dev->devfn)) {
99	case 0:
100		dev->dev.platform_data = &db120_ath9k_data;
101		break;
102	}
103
104	return 0;
105}
106
107static void __init db120_pci_init(u8 *eeprom)
108{
109	memcpy(db120_ath9k_data.eeprom_data, eeprom,
110	       sizeof(db120_ath9k_data.eeprom_data));
111
112	ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);
113	ath79_register_pci();
114}
115#else
116static inline void db120_pci_init(u8 *eeprom) {}
117#endif /* CONFIG_PCI */
118
119static void __init db120_setup(void)
120{
121	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
122
123	ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
124				 db120_leds_gpio);
125	ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
126					ARRAY_SIZE(db120_gpio_keys),
127					db120_gpio_keys);
128	ath79_register_spi(&db120_spi_data, db120_spi_info,
129			   ARRAY_SIZE(db120_spi_info));
130	ath79_register_usb();
131	ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
132	db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
133}
134
135MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board",
136	     db120_setup);
137