1/*****************************************************************************/
2
3/*
4 *	head.S -- common startup code for ColdFire CPUs.
5 *
6 *	(C) Copyright 1999-2011, Greg Ungerer <gerg@snapgear.com>.
7 */
8
9/*****************************************************************************/
10
11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/asm-offsets.h>
14#include <asm/coldfire.h>
15#include <asm/mcfsim.h>
16#include <asm/mcfmmu.h>
17#include <asm/thread_info.h>
18
19/*****************************************************************************/
20
21/*
22 *	If we don't have a fixed memory size, then lets build in code
23 *	to auto detect the DRAM size. Obviously this is the preferred
24 *	method, and should work for most boards. It won't work for those
25 *	that do not have their RAM starting at address 0, and it only
26 *	works on SDRAM (not boards fitted with SRAM).
27 */
28#if CONFIG_RAMSIZE != 0
29.macro GET_MEM_SIZE
30	movel	#CONFIG_RAMSIZE,%d0	/* hard coded memory size */
31.endm
32
33#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
34      defined(CONFIG_M5249) || defined(CONFIG_M525x) || \
35      defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
36      defined(CONFIG_M5307) || defined(CONFIG_M5407)
37/*
38 *	Not all these devices have exactly the same DRAM controller,
39 *	but the DCMR register is virtually identical - give or take
40 *	a couple of bits. The only exception is the 5272 devices, their
41 *	DRAM controller is quite different.
42 */
43.macro GET_MEM_SIZE
44	movel	MCFSIM_DMR0,%d0		/* get mask for 1st bank */
45	btst	#0,%d0			/* check if region enabled */
46	beq	1f
47	andl	#0xfffc0000,%d0
48	beq	1f
49	addl	#0x00040000,%d0		/* convert mask to size */
501:
51	movel	MCFSIM_DMR1,%d1		/* get mask for 2nd bank */
52	btst	#0,%d1			/* check if region enabled */
53	beq	2f
54	andl	#0xfffc0000,%d1
55	beq	2f
56	addl	#0x00040000,%d1
57	addl	%d1,%d0			/* total mem size in d0 */
582:
59.endm
60
61#elif defined(CONFIG_M5272)
62.macro GET_MEM_SIZE
63	movel	MCFSIM_CSOR7,%d0	/* get SDRAM address mask */
64	andil	#0xfffff000,%d0		/* mask out chip select options */
65	negl	%d0			/* negate bits */
66.endm
67
68#elif defined(CONFIG_M520x)
69.macro GET_MEM_SIZE
70	clrl	%d0
71	movel	MCFSIM_SDCS0, %d2	/* Get SDRAM chip select 0 config */
72	andl	#0x1f, %d2		/* Get only the chip select size */
73	beq	3f			/* Check if it is enabled */
74	addql	#1, %d2			/* Form exponent */
75	moveql	#1, %d0
76	lsll	%d2, %d0		/* 2 ^ exponent */
773:
78	movel	MCFSIM_SDCS1, %d2	/* Get SDRAM chip select 1 config */
79	andl	#0x1f, %d2		/* Get only the chip select size */
80	beq	4f			/* Check if it is enabled */
81	addql	#1, %d2			/* Form exponent */
82	moveql	#1, %d1
83	lsll	%d2, %d1		/* 2 ^ exponent */
84	addl	%d1, %d0		/* Total size of SDRAM in d0 */
854:
86.endm
87
88#else
89#error "ERROR: I don't know how to probe your boards memory size?"
90#endif
91
92/*****************************************************************************/
93
94/*
95 *	Boards and platforms can do specific early hardware setup if
96 *	they need to. Most don't need this, define away if not required.
97 */
98#ifndef PLATFORM_SETUP
99#define	PLATFORM_SETUP
100#endif
101
102/*****************************************************************************/
103
104.global	_start
105.global _rambase
106.global _ramvec
107.global	_ramstart
108.global	_ramend
109#if defined(CONFIG_UBOOT)
110.global	_init_sp
111#endif
112
113/*****************************************************************************/
114
115.data
116
117/*
118 *	During startup we store away the RAM setup. These are not in the
119 *	bss, since their values are determined and written before the bss
120 *	has been cleared.
121 */
122_rambase:
123.long	0
124_ramvec:
125.long	0
126_ramstart:
127.long	0
128_ramend:
129.long	0
130#if defined(CONFIG_UBOOT)
131_init_sp:
132.long	0
133#endif
134
135/*****************************************************************************/
136
137__HEAD
138
139#ifdef CONFIG_MMU
140_start0:
141	jmp	_start
142.global kernel_pg_dir
143.equ	kernel_pg_dir,_start0
144.equ	.,_start0+0x1000
145#endif
146
147/*
148 *	This is the codes first entry point. This is where it all
149 *	begins...
150 */
151
152_start:
153	nop					/* filler */
154	movew	#0x2700, %sr			/* no interrupts */
155	movel	#CACHE_INIT,%d0			/* disable cache */
156	movec	%d0,%CACR
157	nop
158#if defined(CONFIG_UBOOT)
159	movel	%sp,_init_sp			/* save initial stack pointer */
160#endif
161#ifdef CONFIG_MBAR
162	movel	#CONFIG_MBAR+1,%d0		/* configured MBAR address */
163	movec	%d0,%MBAR			/* set it */
164#endif
165
166	/*
167	 *	Do any platform or board specific setup now. Most boards
168	 *	don't need anything. Those exceptions are define this in
169	 *	their board specific includes.
170	 */
171	PLATFORM_SETUP
172
173	/*
174	 *	Create basic memory configuration. Set VBR accordingly,
175	 *	and size memory.
176	 */
177	movel	#CONFIG_VECTORBASE,%a7
178	movec   %a7,%VBR			/* set vectors addr */
179	movel	%a7,_ramvec
180
181	movel	#CONFIG_RAMBASE,%a7		/* mark the base of RAM */
182	movel	%a7,_rambase
183
184	GET_MEM_SIZE				/* macro code determines size */
185	addl	%a7,%d0
186	movel	%d0,_ramend			/* set end ram addr */
187
188	/*
189	 *	Now that we know what the memory is, lets enable cache
190	 *	and get things moving. This is Coldfire CPU specific. Not
191	 *	all version cores have identical cache register setup. But
192	 *	it is very similar. Define the exact settings in the headers
193	 *	then the code here is the same for all.
194	 */
195	movel	#ACR0_MODE,%d0			/* set RAM region for caching */
196	movec	%d0,%ACR0
197	movel	#ACR1_MODE,%d0			/* anything else to cache? */
198	movec	%d0,%ACR1
199#ifdef ACR2_MODE
200	movel	#ACR2_MODE,%d0
201	movec	%d0,%ACR2
202	movel	#ACR3_MODE,%d0
203	movec	%d0,%ACR3
204#endif
205	movel	#CACHE_MODE,%d0			/* enable cache */
206	movec	%d0,%CACR
207	nop
208
209#ifdef CONFIG_MMU
210	/*
211	 *	Identity mapping for the kernel region.
212	 */
213	movel	#(MMUBASE+1),%d0		/* enable MMUBAR registers */
214	movec	%d0,%MMUBAR
215	movel	#MMUOR_CA,%d0			/* clear TLB entries */
216	movel	%d0,MMUOR
217	movel	#0,%d0				/* set ASID to 0 */
218	movec	%d0,%asid
219
220	movel	#MMUCR_EN,%d0			/* Enable the identity map */
221	movel	%d0,MMUCR
222	nop					/* sync i-pipeline */
223
224	movel	#_vstart,%a0			/* jump to "virtual" space */
225	jmp	%a0@
226_vstart:
227#endif /* CONFIG_MMU */
228
229#ifdef CONFIG_ROMFS_FS
230	/*
231	 *	Move ROM filesystem above bss :-)
232	 */
233	lea	__bss_start,%a0			/* get start of bss */
234	lea	__bss_stop,%a1			/* set up destination  */
235	movel	%a0,%a2				/* copy of bss start */
236
237	movel	8(%a0),%d0			/* get size of ROMFS */
238	addql	#8,%d0				/* allow for rounding */
239	andl	#0xfffffffc, %d0		/* whole words */
240
241	addl	%d0,%a0				/* copy from end */
242	addl	%d0,%a1				/* copy from end */
243	movel	%a1,_ramstart			/* set start of ram */
244
245_copy_romfs:
246	movel	-(%a0),%d0			/* copy dword */
247	movel	%d0,-(%a1)
248	cmpl	%a0,%a2				/* check if at end */
249	bne	_copy_romfs
250
251#else /* CONFIG_ROMFS_FS */
252	lea	__bss_stop,%a1
253	movel	%a1,_ramstart
254#endif /* CONFIG_ROMFS_FS */
255
256
257	/*
258	 *	Zero out the bss region.
259	 */
260	lea	__bss_start,%a0			/* get start of bss */
261	lea	__bss_stop,%a1			/* get end of bss */
262	clrl	%d0				/* set value */
263_clear_bss:
264	movel	%d0,(%a0)+			/* clear each word */
265	cmpl	%a0,%a1				/* check if at end */
266	bne	_clear_bss
267
268	/*
269	 *	Load the current task pointer and stack.
270	 */
271	lea	init_thread_union,%a0
272	lea	THREAD_SIZE(%a0),%sp
273
274#ifdef CONFIG_MMU
275.global m68k_cputype
276.global m68k_mmutype
277.global m68k_fputype
278.global m68k_machtype
279	movel	#CPU_COLDFIRE,%d0
280	movel	%d0,m68k_cputype		/* Mark us as a ColdFire */
281	movel	#MMU_COLDFIRE,%d0
282	movel	%d0,m68k_mmutype
283	movel	#FPU_COLDFIRE,%d0
284	movel	%d0,m68k_fputype
285	movel	#MACH_M54XX,%d0
286	movel	%d0,m68k_machtype		/* Mark us as a 54xx machine */
287	lea	init_task,%a2			/* Set "current" init task */
288#endif
289
290	/*
291	 *	Assember start up done, start code proper.
292	 */
293	jsr	start_kernel			/* start Linux kernel */
294
295_exit:
296	jmp	_exit				/* should never get here */
297
298/*****************************************************************************/
299