1/ {
2	#address-cells = <1>;
3	#size-cells = <1>;
4	interrupt-parent = <&intc>;
5
6	cpus {
7		#address-cells = <1>;
8		#size-cells = <0>;
9
10		cpu@0 {
11			device_type = "cpu";
12			model = "axis,crisv32";
13			reg = <0>;
14		};
15	};
16
17	soc {
18		compatible = "simple-bus";
19		model = "artpec3";
20		#address-cells = <1>;
21		#size-cells = <1>;
22		ranges;
23
24		intc: interrupt-controller {
25			compatible = "axis,crisv32-intc";
26			reg = <0xb002a000 0x1000>;
27			interrupt-controller;
28			#interrupt-cells = <1>;
29		};
30
31		gio: gpio@b0020000 {
32			compatible = "axis,artpec3-gio";
33			reg = <0xb0020000 0x1000>;
34			interrupts = <61>;
35			gpio-controller;
36			#gpio-cells = <3>;
37		};
38
39		serial@b003e000 {
40			compatible = "axis,etraxfs-uart";
41			reg = <0xb003e000 0x1000>;
42			interrupts = <64>;
43			status = "disabled";
44		};
45	};
46};
47