1/*
2 *  Port on Texas Instruments TMS320C6x architecture
3 *
4 *  Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
5 *  Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 *  This program is free software; you can redistribute it and/or modify
8 *  it under the terms of the GNU General Public License version 2 as
9 *  published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_SPECIAL_INSNS_H
12#define _ASM_C6X_SPECIAL_INSNS_H
13
14
15#define get_creg(reg) \
16	({ unsigned int __x; \
17	   asm volatile ("mvc .s2 " #reg ",%0\n" : "=b"(__x)); __x; })
18
19#define set_creg(reg, v) \
20	do { unsigned int __x = (unsigned int)(v); \
21		asm volatile ("mvc .s2 %0," #reg "\n" : : "b"(__x)); \
22	} while (0)
23
24#define or_creg(reg, n) \
25	do { unsigned __x, __n = (unsigned)(n);		  \
26		asm volatile ("mvc .s2 " #reg ",%0\n"	  \
27			      "or  .l2 %1,%0,%0\n"	  \
28			      "mvc .s2 %0," #reg "\n"	  \
29			      "nop\n"			  \
30			      : "=&b"(__x) : "b"(__n));	  \
31	} while (0)
32
33#define and_creg(reg, n) \
34	do { unsigned __x, __n = (unsigned)(n);		  \
35		asm volatile ("mvc .s2 " #reg ",%0\n"	  \
36			      "and .l2 %1,%0,%0\n"	  \
37			      "mvc .s2 %0," #reg "\n"	  \
38			      "nop\n"    \
39			      : "=&b"(__x) : "b"(__n));	  \
40	} while (0)
41
42#define get_coreid() (get_creg(DNUM) & 0xff)
43
44/* Set/get IST */
45#define set_ist(x)	set_creg(ISTP, x)
46#define get_ist()       get_creg(ISTP)
47
48/*
49 * Exception management
50 */
51#define disable_exception()
52#define get_except_type()        get_creg(EFR)
53#define ack_exception(type)      set_creg(ECR, 1 << (type))
54#define get_iexcept()            get_creg(IERR)
55#define set_iexcept(mask)        set_creg(IERR, (mask))
56
57#define _extu(x, s, e)							\
58	({      unsigned int __x;					\
59		asm volatile ("extu .S2 %3,%1,%2,%0\n" :		\
60			      "=b"(__x) : "n"(s), "n"(e), "b"(x));	\
61	       __x; })
62
63#endif /* _ASM_C6X_SPECIAL_INSNS_H */
64