1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
17 #include <linux/usb/isp1362.h>
18 #endif
19 #include <linux/ata_platform.h>
20 #include <linux/irq.h>
21 #include <linux/gpio.h>
22 #include <asm/dma.h>
23 #include <asm/bfin5xx_spi.h>
24 #include <asm/portmux.h>
25 #include <asm/dpmc.h>
26 #include <linux/mtd/physmap.h>
27
28 /*
29 * Name the Board for the /proc/cpuinfo
30 */
31 const char bfin_board_name[] = "Bluetechnix CM BF561";
32
33 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
34 /* all SPI peripherals info goes here */
35
36 #if IS_ENABLED(CONFIG_MTD_M25P80)
37 static struct mtd_partition bfin_spi_flash_partitions[] = {
38 {
39 .name = "bootloader(spi)",
40 .size = 0x00020000,
41 .offset = 0,
42 .mask_flags = MTD_CAP_ROM
43 }, {
44 .name = "linux kernel(spi)",
45 .size = 0xe0000,
46 .offset = 0x20000
47 }, {
48 .name = "file system(spi)",
49 .size = 0x700000,
50 .offset = 0x00100000,
51 }
52 };
53
54 static struct flash_platform_data bfin_spi_flash_data = {
55 .name = "m25p80",
56 .parts = bfin_spi_flash_partitions,
57 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
58 .type = "m25p64",
59 };
60
61 /* SPI flash chip (m25p64) */
62 static struct bfin5xx_spi_chip spi_flash_chip_info = {
63 .enable_dma = 0, /* use dma transfer with this chip*/
64 };
65 #endif
66
67 static struct spi_board_info bfin_spi_board_info[] __initdata = {
68 #if IS_ENABLED(CONFIG_MTD_M25P80)
69 {
70 /* the modalias must be the same as spi device driver name */
71 .modalias = "m25p80", /* Name of spi_driver for this device */
72 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
73 .bus_num = 0, /* Framework bus number */
74 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
75 .platform_data = &bfin_spi_flash_data,
76 .controller_data = &spi_flash_chip_info,
77 .mode = SPI_MODE_3,
78 },
79 #endif
80
81 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
82 {
83 .modalias = "ad183x",
84 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
85 .bus_num = 0,
86 .chip_select = 4,
87 },
88 #endif
89 #if IS_ENABLED(CONFIG_MMC_SPI)
90 {
91 .modalias = "mmc_spi",
92 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
93 .bus_num = 0,
94 .chip_select = 1,
95 .mode = SPI_MODE_3,
96 },
97 #endif
98 };
99
100 /* SPI (0) */
101 static struct resource bfin_spi0_resource[] = {
102 [0] = {
103 .start = SPI0_REGBASE,
104 .end = SPI0_REGBASE + 0xFF,
105 .flags = IORESOURCE_MEM,
106 },
107 [1] = {
108 .start = CH_SPI,
109 .end = CH_SPI,
110 .flags = IORESOURCE_DMA,
111 },
112 [2] = {
113 .start = IRQ_SPI,
114 .end = IRQ_SPI,
115 .flags = IORESOURCE_IRQ,
116 },
117 };
118
119 /* SPI controller data */
120 static struct bfin5xx_spi_master bfin_spi0_info = {
121 .num_chipselect = 8,
122 .enable_dma = 1, /* master has the ability to do dma transfer */
123 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
124 };
125
126 static struct platform_device bfin_spi0_device = {
127 .name = "bfin-spi",
128 .id = 0, /* Bus number */
129 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
130 .resource = bfin_spi0_resource,
131 .dev = {
132 .platform_data = &bfin_spi0_info, /* Passed to driver */
133 },
134 };
135 #endif /* spi master and devices */
136
137
138 #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
139 static struct platform_device hitachi_fb_device = {
140 .name = "hitachi-tx09",
141 };
142 #endif
143
144
145 #if IS_ENABLED(CONFIG_SMC91X)
146 #include <linux/smc91x.h>
147
148 static struct smc91x_platdata smc91x_info = {
149 .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
150 .leda = RPC_LED_100_10,
151 .ledb = RPC_LED_TX_RX,
152 };
153
154 static struct resource smc91x_resources[] = {
155 {
156 .name = "smc91x-regs",
157 .start = 0x28000300,
158 .end = 0x28000300 + 16,
159 .flags = IORESOURCE_MEM,
160 }, {
161 .start = IRQ_PF0,
162 .end = IRQ_PF0,
163 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
164 },
165 };
166 static struct platform_device smc91x_device = {
167 .name = "smc91x",
168 .id = 0,
169 .num_resources = ARRAY_SIZE(smc91x_resources),
170 .resource = smc91x_resources,
171 .dev = {
172 .platform_data = &smc91x_info,
173 },
174 };
175 #endif
176
177 #if IS_ENABLED(CONFIG_SMSC911X)
178 #include <linux/smsc911x.h>
179
180 static struct resource smsc911x_resources[] = {
181 {
182 .name = "smsc911x-memory",
183 .start = 0x24008000,
184 .end = 0x24008000 + 0xFF,
185 .flags = IORESOURCE_MEM,
186 },
187 {
188 .start = IRQ_PF43,
189 .end = IRQ_PF43,
190 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
191 },
192 };
193
194 static struct smsc911x_platform_config smsc911x_config = {
195 .flags = SMSC911X_USE_16BIT,
196 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
197 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
198 .phy_interface = PHY_INTERFACE_MODE_MII,
199 };
200
201 static struct platform_device smsc911x_device = {
202 .name = "smsc911x",
203 .id = 0,
204 .num_resources = ARRAY_SIZE(smsc911x_resources),
205 .resource = smsc911x_resources,
206 .dev = {
207 .platform_data = &smsc911x_config,
208 },
209 };
210 #endif
211
212 #if IS_ENABLED(CONFIG_USB_NET2272)
213 static struct resource net2272_bfin_resources[] = {
214 {
215 .start = 0x24000000,
216 .end = 0x24000000 + 0x100,
217 .flags = IORESOURCE_MEM,
218 }, {
219 .start = IRQ_PF45,
220 .end = IRQ_PF45,
221 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
222 },
223 };
224
225 static struct platform_device net2272_bfin_device = {
226 .name = "net2272",
227 .id = -1,
228 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
229 .resource = net2272_bfin_resources,
230 };
231 #endif
232
233 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
234 static struct resource isp1362_hcd_resources[] = {
235 {
236 .start = 0x24008000,
237 .end = 0x24008000,
238 .flags = IORESOURCE_MEM,
239 }, {
240 .start = 0x24008004,
241 .end = 0x24008004,
242 .flags = IORESOURCE_MEM,
243 }, {
244 .start = IRQ_PF47,
245 .end = IRQ_PF47,
246 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
247 },
248 };
249
250 static struct isp1362_platform_data isp1362_priv = {
251 .sel15Kres = 1,
252 .clknotstop = 0,
253 .oc_enable = 0,
254 .int_act_high = 0,
255 .int_edge_triggered = 0,
256 .remote_wakeup_connected = 0,
257 .no_power_switching = 1,
258 .power_switching_mode = 0,
259 };
260
261 static struct platform_device isp1362_hcd_device = {
262 .name = "isp1362-hcd",
263 .id = 0,
264 .dev = {
265 .platform_data = &isp1362_priv,
266 },
267 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
268 .resource = isp1362_hcd_resources,
269 };
270 #endif
271
272 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
273 #ifdef CONFIG_SERIAL_BFIN_UART0
274 static struct resource bfin_uart0_resources[] = {
275 {
276 .start = BFIN_UART_THR,
277 .end = BFIN_UART_GCTL+2,
278 .flags = IORESOURCE_MEM,
279 },
280 {
281 .start = IRQ_UART_TX,
282 .end = IRQ_UART_TX,
283 .flags = IORESOURCE_IRQ,
284 },
285 {
286 .start = IRQ_UART_RX,
287 .end = IRQ_UART_RX,
288 .flags = IORESOURCE_IRQ,
289 },
290 {
291 .start = IRQ_UART_ERROR,
292 .end = IRQ_UART_ERROR,
293 .flags = IORESOURCE_IRQ,
294 },
295 {
296 .start = CH_UART_TX,
297 .end = CH_UART_TX,
298 .flags = IORESOURCE_DMA,
299 },
300 {
301 .start = CH_UART_RX,
302 .end = CH_UART_RX,
303 .flags = IORESOURCE_DMA,
304 },
305 };
306
307 static unsigned short bfin_uart0_peripherals[] = {
308 P_UART0_TX, P_UART0_RX, 0
309 };
310
311 static struct platform_device bfin_uart0_device = {
312 .name = "bfin-uart",
313 .id = 0,
314 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
315 .resource = bfin_uart0_resources,
316 .dev = {
317 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
318 },
319 };
320 #endif
321 #endif
322
323 #if IS_ENABLED(CONFIG_BFIN_SIR)
324 #ifdef CONFIG_BFIN_SIR0
325 static struct resource bfin_sir0_resources[] = {
326 {
327 .start = 0xFFC00400,
328 .end = 0xFFC004FF,
329 .flags = IORESOURCE_MEM,
330 },
331 {
332 .start = IRQ_UART0_RX,
333 .end = IRQ_UART0_RX+1,
334 .flags = IORESOURCE_IRQ,
335 },
336 {
337 .start = CH_UART0_RX,
338 .end = CH_UART0_RX+1,
339 .flags = IORESOURCE_DMA,
340 },
341 };
342
343 static struct platform_device bfin_sir0_device = {
344 .name = "bfin_sir",
345 .id = 0,
346 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
347 .resource = bfin_sir0_resources,
348 };
349 #endif
350 #endif
351
352 #if IS_ENABLED(CONFIG_PATA_PLATFORM)
353 #define PATA_INT IRQ_PF46
354
355 static struct pata_platform_info bfin_pata_platform_data = {
356 .ioport_shift = 2,
357 };
358
359 static struct resource bfin_pata_resources[] = {
360 {
361 .start = 0x2400C000,
362 .end = 0x2400C001F,
363 .flags = IORESOURCE_MEM,
364 },
365 {
366 .start = 0x2400D018,
367 .end = 0x2400D01B,
368 .flags = IORESOURCE_MEM,
369 },
370 {
371 .start = PATA_INT,
372 .end = PATA_INT,
373 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
374 },
375 };
376
377 static struct platform_device bfin_pata_device = {
378 .name = "pata_platform",
379 .id = -1,
380 .num_resources = ARRAY_SIZE(bfin_pata_resources),
381 .resource = bfin_pata_resources,
382 .dev = {
383 .platform_data = &bfin_pata_platform_data,
384 }
385 };
386 #endif
387
388 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
389 static struct mtd_partition para_partitions[] = {
390 {
391 .name = "bootloader(nor)",
392 .size = 0x40000,
393 .offset = 0,
394 }, {
395 .name = "linux kernel(nor)",
396 .size = 0x100000,
397 .offset = MTDPART_OFS_APPEND,
398 }, {
399 .name = "file system(nor)",
400 .size = MTDPART_SIZ_FULL,
401 .offset = MTDPART_OFS_APPEND,
402 }
403 };
404
405 static struct physmap_flash_data para_flash_data = {
406 .width = 2,
407 .parts = para_partitions,
408 .nr_parts = ARRAY_SIZE(para_partitions),
409 };
410
411 static struct resource para_flash_resource = {
412 .start = 0x20000000,
413 .end = 0x207fffff,
414 .flags = IORESOURCE_MEM,
415 };
416
417 static struct platform_device para_flash_device = {
418 .name = "physmap-flash",
419 .id = 0,
420 .dev = {
421 .platform_data = ¶_flash_data,
422 },
423 .num_resources = 1,
424 .resource = ¶_flash_resource,
425 };
426 #endif
427
428 static const unsigned int cclk_vlev_datasheet[] =
429 {
430 VRPAIR(VLEV_085, 250000000),
431 VRPAIR(VLEV_090, 300000000),
432 VRPAIR(VLEV_095, 313000000),
433 VRPAIR(VLEV_100, 350000000),
434 VRPAIR(VLEV_105, 400000000),
435 VRPAIR(VLEV_110, 444000000),
436 VRPAIR(VLEV_115, 450000000),
437 VRPAIR(VLEV_120, 475000000),
438 VRPAIR(VLEV_125, 500000000),
439 VRPAIR(VLEV_130, 600000000),
440 };
441
442 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
443 .tuple_tab = cclk_vlev_datasheet,
444 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
445 .vr_settling_time = 25 /* us */,
446 };
447
448 static struct platform_device bfin_dpmc = {
449 .name = "bfin dpmc",
450 .dev = {
451 .platform_data = &bfin_dmpc_vreg_data,
452 },
453 };
454
455 static struct platform_device *cm_bf561_devices[] __initdata = {
456
457 &bfin_dpmc,
458
459 #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
460 &hitachi_fb_device,
461 #endif
462
463 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
464 #ifdef CONFIG_SERIAL_BFIN_UART0
465 &bfin_uart0_device,
466 #endif
467 #endif
468
469 #if IS_ENABLED(CONFIG_BFIN_SIR)
470 #ifdef CONFIG_BFIN_SIR0
471 &bfin_sir0_device,
472 #endif
473 #endif
474
475 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
476 &isp1362_hcd_device,
477 #endif
478
479 #if IS_ENABLED(CONFIG_SMC91X)
480 &smc91x_device,
481 #endif
482
483 #if IS_ENABLED(CONFIG_SMSC911X)
484 &smsc911x_device,
485 #endif
486
487 #if IS_ENABLED(CONFIG_USB_NET2272)
488 &net2272_bfin_device,
489 #endif
490
491 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
492 &bfin_spi0_device,
493 #endif
494
495 #if IS_ENABLED(CONFIG_PATA_PLATFORM)
496 &bfin_pata_device,
497 #endif
498
499 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
500 ¶_flash_device,
501 #endif
502 };
503
net2272_init(void)504 static int __init net2272_init(void)
505 {
506 #if IS_ENABLED(CONFIG_USB_NET2272)
507 int ret;
508
509 ret = gpio_request(GPIO_PF46, "net2272");
510 if (ret)
511 return ret;
512
513 /* Reset USB Chip, PF46 */
514 gpio_direction_output(GPIO_PF46, 0);
515 mdelay(2);
516 gpio_set_value(GPIO_PF46, 1);
517 #endif
518
519 return 0;
520 }
521
cm_bf561_init(void)522 static int __init cm_bf561_init(void)
523 {
524 printk(KERN_INFO "%s(): registering device resources\n", __func__);
525 platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
526 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
527 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
528 #endif
529
530 #if IS_ENABLED(CONFIG_PATA_PLATFORM)
531 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
532 #endif
533
534 if (net2272_init())
535 pr_warning("unable to configure net2272; it probably won't work\n");
536
537 return 0;
538 }
539
540 arch_initcall(cm_bf561_init);
541
542 static struct platform_device *cm_bf561_early_devices[] __initdata = {
543 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
544 #ifdef CONFIG_SERIAL_BFIN_UART0
545 &bfin_uart0_device,
546 #endif
547 #endif
548 };
549
native_machine_early_platform_add_devices(void)550 void __init native_machine_early_platform_add_devices(void)
551 {
552 printk(KERN_INFO "register early platform devices\n");
553 early_platform_add_devices(cm_bf561_early_devices,
554 ARRAY_SIZE(cm_bf561_early_devices));
555 }
556