1/*
2 * Copyright (C) 2012,2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * Based on arch/arm/kvm/coproc_a15.c:
6 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
7 * Authors: Rusty Russell <rusty@rustcorp.au>
8 *          Christoffer Dall <c.dall@virtualopensystems.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
21 */
22#include <linux/kvm_host.h>
23#include <asm/cputype.h>
24#include <asm/kvm_arm.h>
25#include <asm/kvm_asm.h>
26#include <asm/kvm_host.h>
27#include <asm/kvm_emulate.h>
28#include <asm/kvm_coproc.h>
29#include <linux/init.h>
30
31#include "sys_regs.h"
32
33static bool access_actlr(struct kvm_vcpu *vcpu,
34			 struct sys_reg_params *p,
35			 const struct sys_reg_desc *r)
36{
37	if (p->is_write)
38		return ignore_write(vcpu, p);
39
40	p->regval = vcpu_sys_reg(vcpu, ACTLR_EL1);
41	return true;
42}
43
44static void reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
45{
46	u64 actlr;
47
48	asm volatile("mrs %0, actlr_el1\n" : "=r" (actlr));
49	vcpu_sys_reg(vcpu, ACTLR_EL1) = actlr;
50}
51
52/*
53 * Implementation specific sys-reg registers.
54 * Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
55 */
56static const struct sys_reg_desc genericv8_sys_regs[] = {
57	/* ACTLR_EL1 */
58	{ Op0(0b11), Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
59	  access_actlr, reset_actlr, ACTLR_EL1 },
60};
61
62static const struct sys_reg_desc genericv8_cp15_regs[] = {
63	/* ACTLR */
64	{ Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
65	  access_actlr },
66};
67
68static struct kvm_sys_reg_target_table genericv8_target_table = {
69	.table64 = {
70		.table = genericv8_sys_regs,
71		.num = ARRAY_SIZE(genericv8_sys_regs),
72	},
73	.table32 = {
74		.table = genericv8_cp15_regs,
75		.num = ARRAY_SIZE(genericv8_cp15_regs),
76	},
77};
78
79static int __init sys_reg_genericv8_init(void)
80{
81	unsigned int i;
82
83	for (i = 1; i < ARRAY_SIZE(genericv8_sys_regs); i++)
84		BUG_ON(cmp_sys_reg(&genericv8_sys_regs[i-1],
85			       &genericv8_sys_regs[i]) >= 0);
86
87	kvm_register_target_sys_reg_table(KVM_ARM_TARGET_AEM_V8,
88					  &genericv8_target_table);
89	kvm_register_target_sys_reg_table(KVM_ARM_TARGET_FOUNDATION_V8,
90					  &genericv8_target_table);
91	kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A53,
92					  &genericv8_target_table);
93	kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57,
94					  &genericv8_target_table);
95	kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA,
96					  &genericv8_target_table);
97	kvm_register_target_sys_reg_table(KVM_ARM_TARGET_GENERIC_V8,
98					  &genericv8_target_table);
99
100	return 0;
101}
102late_initcall(sys_reg_genericv8_init);
103