1/* 2 * arch/arm/plat-orion/common.c 3 * 4 * Marvell Orion SoC common setup code used by multiple mach-/common.c 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11#include <linux/kernel.h> 12#include <linux/init.h> 13#include <linux/platform_device.h> 14#include <linux/dma-mapping.h> 15#include <linux/serial_8250.h> 16#include <linux/ata_platform.h> 17#include <linux/clk.h> 18#include <linux/clkdev.h> 19#include <linux/mv643xx_eth.h> 20#include <linux/mv643xx_i2c.h> 21#include <net/dsa.h> 22#include <linux/platform_data/dma-mv_xor.h> 23#include <linux/platform_data/usb-ehci-orion.h> 24#include <mach/bridge-regs.h> 25#include <plat/common.h> 26 27/* Create a clkdev entry for a given device/clk */ 28void __init orion_clkdev_add(const char *con_id, const char *dev_id, 29 struct clk *clk) 30{ 31 clkdev_create(clk, con_id, "%s", dev_id); 32} 33 34/* Create clkdev entries for all orion platforms except kirkwood. 35 Kirkwood has gated clocks for some of its peripherals, so creates 36 its own clkdev entries. For all the other orion devices, create 37 clkdev entries to the tclk. */ 38void __init orion_clkdev_init(struct clk *tclk) 39{ 40 orion_clkdev_add(NULL, "orion_spi.0", tclk); 41 orion_clkdev_add(NULL, "orion_spi.1", tclk); 42 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); 43 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); 44 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); 45 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); 46 orion_clkdev_add(NULL, "orion_wdt", tclk); 47 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); 48} 49 50/* Fill in the resources structure and link it into the platform 51 device structure. There is always a memory region, and nearly 52 always an interrupt.*/ 53static void fill_resources(struct platform_device *device, 54 struct resource *resources, 55 resource_size_t mapbase, 56 resource_size_t size, 57 unsigned int irq) 58{ 59 device->resource = resources; 60 device->num_resources = 1; 61 resources[0].flags = IORESOURCE_MEM; 62 resources[0].start = mapbase; 63 resources[0].end = mapbase + size; 64 65 if (irq != NO_IRQ) { 66 device->num_resources++; 67 resources[1].flags = IORESOURCE_IRQ; 68 resources[1].start = irq; 69 resources[1].end = irq; 70 } 71} 72 73/***************************************************************************** 74 * UART 75 ****************************************************************************/ 76static unsigned long __init uart_get_clk_rate(struct clk *clk) 77{ 78 clk_prepare_enable(clk); 79 return clk_get_rate(clk); 80} 81 82static void __init uart_complete( 83 struct platform_device *orion_uart, 84 struct plat_serial8250_port *data, 85 struct resource *resources, 86 void __iomem *membase, 87 resource_size_t mapbase, 88 unsigned int irq, 89 struct clk *clk) 90{ 91 data->mapbase = mapbase; 92 data->membase = membase; 93 data->irq = irq; 94 data->uartclk = uart_get_clk_rate(clk); 95 orion_uart->dev.platform_data = data; 96 97 fill_resources(orion_uart, resources, mapbase, 0xff, irq); 98 platform_device_register(orion_uart); 99} 100 101/***************************************************************************** 102 * UART0 103 ****************************************************************************/ 104static struct plat_serial8250_port orion_uart0_data[] = { 105 { 106 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 107 .iotype = UPIO_MEM, 108 .regshift = 2, 109 }, { 110 }, 111}; 112 113static struct resource orion_uart0_resources[2]; 114 115static struct platform_device orion_uart0 = { 116 .name = "serial8250", 117 .id = PLAT8250_DEV_PLATFORM, 118}; 119 120void __init orion_uart0_init(void __iomem *membase, 121 resource_size_t mapbase, 122 unsigned int irq, 123 struct clk *clk) 124{ 125 uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, 126 membase, mapbase, irq, clk); 127} 128 129/***************************************************************************** 130 * UART1 131 ****************************************************************************/ 132static struct plat_serial8250_port orion_uart1_data[] = { 133 { 134 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 135 .iotype = UPIO_MEM, 136 .regshift = 2, 137 }, { 138 }, 139}; 140 141static struct resource orion_uart1_resources[2]; 142 143static struct platform_device orion_uart1 = { 144 .name = "serial8250", 145 .id = PLAT8250_DEV_PLATFORM1, 146}; 147 148void __init orion_uart1_init(void __iomem *membase, 149 resource_size_t mapbase, 150 unsigned int irq, 151 struct clk *clk) 152{ 153 uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, 154 membase, mapbase, irq, clk); 155} 156 157/***************************************************************************** 158 * UART2 159 ****************************************************************************/ 160static struct plat_serial8250_port orion_uart2_data[] = { 161 { 162 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 163 .iotype = UPIO_MEM, 164 .regshift = 2, 165 }, { 166 }, 167}; 168 169static struct resource orion_uart2_resources[2]; 170 171static struct platform_device orion_uart2 = { 172 .name = "serial8250", 173 .id = PLAT8250_DEV_PLATFORM2, 174}; 175 176void __init orion_uart2_init(void __iomem *membase, 177 resource_size_t mapbase, 178 unsigned int irq, 179 struct clk *clk) 180{ 181 uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, 182 membase, mapbase, irq, clk); 183} 184 185/***************************************************************************** 186 * UART3 187 ****************************************************************************/ 188static struct plat_serial8250_port orion_uart3_data[] = { 189 { 190 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 191 .iotype = UPIO_MEM, 192 .regshift = 2, 193 }, { 194 }, 195}; 196 197static struct resource orion_uart3_resources[2]; 198 199static struct platform_device orion_uart3 = { 200 .name = "serial8250", 201 .id = 3, 202}; 203 204void __init orion_uart3_init(void __iomem *membase, 205 resource_size_t mapbase, 206 unsigned int irq, 207 struct clk *clk) 208{ 209 uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, 210 membase, mapbase, irq, clk); 211} 212 213/***************************************************************************** 214 * SoC RTC 215 ****************************************************************************/ 216static struct resource orion_rtc_resource[2]; 217 218void __init orion_rtc_init(unsigned long mapbase, 219 unsigned long irq) 220{ 221 orion_rtc_resource[0].start = mapbase; 222 orion_rtc_resource[0].end = mapbase + SZ_32 - 1; 223 orion_rtc_resource[0].flags = IORESOURCE_MEM; 224 orion_rtc_resource[1].start = irq; 225 orion_rtc_resource[1].end = irq; 226 orion_rtc_resource[1].flags = IORESOURCE_IRQ; 227 228 platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2); 229} 230 231/***************************************************************************** 232 * GE 233 ****************************************************************************/ 234static __init void ge_complete( 235 struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, 236 struct resource *orion_ge_resource, unsigned long irq, 237 struct platform_device *orion_ge_shared, 238 struct platform_device *orion_ge_mvmdio, 239 struct mv643xx_eth_platform_data *eth_data, 240 struct platform_device *orion_ge) 241{ 242 orion_ge_resource->start = irq; 243 orion_ge_resource->end = irq; 244 eth_data->shared = orion_ge_shared; 245 orion_ge->dev.platform_data = eth_data; 246 247 platform_device_register(orion_ge_shared); 248 if (orion_ge_mvmdio) 249 platform_device_register(orion_ge_mvmdio); 250 platform_device_register(orion_ge); 251} 252 253/***************************************************************************** 254 * GE00 255 ****************************************************************************/ 256static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; 257 258static struct resource orion_ge00_shared_resources[] = { 259 { 260 .name = "ge00 base", 261 }, 262}; 263 264static struct platform_device orion_ge00_shared = { 265 .name = MV643XX_ETH_SHARED_NAME, 266 .id = 0, 267 .dev = { 268 .platform_data = &orion_ge00_shared_data, 269 }, 270}; 271 272static struct resource orion_ge_mvmdio_resources[] = { 273 { 274 .name = "ge00 mvmdio base", 275 }, { 276 .name = "ge00 mvmdio err irq", 277 }, 278}; 279 280static struct platform_device orion_ge_mvmdio = { 281 .name = "orion-mdio", 282 .id = -1, 283}; 284 285static struct resource orion_ge00_resources[] = { 286 { 287 .name = "ge00 irq", 288 .flags = IORESOURCE_IRQ, 289 }, 290}; 291 292static struct platform_device orion_ge00 = { 293 .name = MV643XX_ETH_NAME, 294 .id = 0, 295 .num_resources = 1, 296 .resource = orion_ge00_resources, 297 .dev = { 298 .coherent_dma_mask = DMA_BIT_MASK(32), 299 }, 300}; 301 302void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, 303 unsigned long mapbase, 304 unsigned long irq, 305 unsigned long irq_err, 306 unsigned int tx_csum_limit) 307{ 308 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, 309 mapbase + 0x2000, SZ_16K - 1, NO_IRQ); 310 fill_resources(&orion_ge_mvmdio, orion_ge_mvmdio_resources, 311 mapbase + 0x2004, 0x84 - 1, irq_err); 312 orion_ge00_shared_data.tx_csum_limit = tx_csum_limit; 313 ge_complete(&orion_ge00_shared_data, 314 orion_ge00_resources, irq, &orion_ge00_shared, 315 &orion_ge_mvmdio, 316 eth_data, &orion_ge00); 317} 318 319/***************************************************************************** 320 * GE01 321 ****************************************************************************/ 322static struct mv643xx_eth_shared_platform_data orion_ge01_shared_data; 323 324static struct resource orion_ge01_shared_resources[] = { 325 { 326 .name = "ge01 base", 327 } 328}; 329 330static struct platform_device orion_ge01_shared = { 331 .name = MV643XX_ETH_SHARED_NAME, 332 .id = 1, 333 .dev = { 334 .platform_data = &orion_ge01_shared_data, 335 }, 336}; 337 338static struct resource orion_ge01_resources[] = { 339 { 340 .name = "ge01 irq", 341 .flags = IORESOURCE_IRQ, 342 }, 343}; 344 345static struct platform_device orion_ge01 = { 346 .name = MV643XX_ETH_NAME, 347 .id = 1, 348 .num_resources = 1, 349 .resource = orion_ge01_resources, 350 .dev = { 351 .coherent_dma_mask = DMA_BIT_MASK(32), 352 }, 353}; 354 355void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, 356 unsigned long mapbase, 357 unsigned long irq, 358 unsigned long irq_err, 359 unsigned int tx_csum_limit) 360{ 361 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, 362 mapbase + 0x2000, SZ_16K - 1, NO_IRQ); 363 orion_ge01_shared_data.tx_csum_limit = tx_csum_limit; 364 ge_complete(&orion_ge01_shared_data, 365 orion_ge01_resources, irq, &orion_ge01_shared, 366 NULL, 367 eth_data, &orion_ge01); 368} 369 370/***************************************************************************** 371 * GE10 372 ****************************************************************************/ 373static struct mv643xx_eth_shared_platform_data orion_ge10_shared_data; 374 375static struct resource orion_ge10_shared_resources[] = { 376 { 377 .name = "ge10 base", 378 } 379}; 380 381static struct platform_device orion_ge10_shared = { 382 .name = MV643XX_ETH_SHARED_NAME, 383 .id = 2, 384 .dev = { 385 .platform_data = &orion_ge10_shared_data, 386 }, 387}; 388 389static struct resource orion_ge10_resources[] = { 390 { 391 .name = "ge10 irq", 392 .flags = IORESOURCE_IRQ, 393 }, 394}; 395 396static struct platform_device orion_ge10 = { 397 .name = MV643XX_ETH_NAME, 398 .id = 2, 399 .num_resources = 1, 400 .resource = orion_ge10_resources, 401 .dev = { 402 .coherent_dma_mask = DMA_BIT_MASK(32), 403 }, 404}; 405 406void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, 407 unsigned long mapbase, 408 unsigned long irq, 409 unsigned long irq_err) 410{ 411 fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, 412 mapbase + 0x2000, SZ_16K - 1, NO_IRQ); 413 ge_complete(&orion_ge10_shared_data, 414 orion_ge10_resources, irq, &orion_ge10_shared, 415 NULL, 416 eth_data, &orion_ge10); 417} 418 419/***************************************************************************** 420 * GE11 421 ****************************************************************************/ 422static struct mv643xx_eth_shared_platform_data orion_ge11_shared_data; 423 424static struct resource orion_ge11_shared_resources[] = { 425 { 426 .name = "ge11 base", 427 }, 428}; 429 430static struct platform_device orion_ge11_shared = { 431 .name = MV643XX_ETH_SHARED_NAME, 432 .id = 3, 433 .dev = { 434 .platform_data = &orion_ge11_shared_data, 435 }, 436}; 437 438static struct resource orion_ge11_resources[] = { 439 { 440 .name = "ge11 irq", 441 .flags = IORESOURCE_IRQ, 442 }, 443}; 444 445static struct platform_device orion_ge11 = { 446 .name = MV643XX_ETH_NAME, 447 .id = 3, 448 .num_resources = 1, 449 .resource = orion_ge11_resources, 450 .dev = { 451 .coherent_dma_mask = DMA_BIT_MASK(32), 452 }, 453}; 454 455void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, 456 unsigned long mapbase, 457 unsigned long irq, 458 unsigned long irq_err) 459{ 460 fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, 461 mapbase + 0x2000, SZ_16K - 1, NO_IRQ); 462 ge_complete(&orion_ge11_shared_data, 463 orion_ge11_resources, irq, &orion_ge11_shared, 464 NULL, 465 eth_data, &orion_ge11); 466} 467 468/***************************************************************************** 469 * Ethernet switch 470 ****************************************************************************/ 471static struct resource orion_switch_resources[] = { 472 { 473 .start = 0, 474 .end = 0, 475 .flags = IORESOURCE_IRQ, 476 }, 477}; 478 479static struct platform_device orion_switch_device = { 480 .name = "dsa", 481 .id = 0, 482 .num_resources = 0, 483 .resource = orion_switch_resources, 484}; 485 486void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq) 487{ 488 int i; 489 490 if (irq != NO_IRQ) { 491 orion_switch_resources[0].start = irq; 492 orion_switch_resources[0].end = irq; 493 orion_switch_device.num_resources = 1; 494 } 495 496 d->netdev = &orion_ge00.dev; 497 for (i = 0; i < d->nr_chips; i++) 498 d->chip[i].host_dev = &orion_ge_mvmdio.dev; 499 orion_switch_device.dev.platform_data = d; 500 501 platform_device_register(&orion_switch_device); 502} 503 504/***************************************************************************** 505 * I2C 506 ****************************************************************************/ 507static struct mv64xxx_i2c_pdata orion_i2c_pdata = { 508 .freq_n = 3, 509 .timeout = 1000, /* Default timeout of 1 second */ 510}; 511 512static struct resource orion_i2c_resources[2]; 513 514static struct platform_device orion_i2c = { 515 .name = MV64XXX_I2C_CTLR_NAME, 516 .id = 0, 517 .dev = { 518 .platform_data = &orion_i2c_pdata, 519 }, 520}; 521 522static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { 523 .freq_n = 3, 524 .timeout = 1000, /* Default timeout of 1 second */ 525}; 526 527static struct resource orion_i2c_1_resources[2]; 528 529static struct platform_device orion_i2c_1 = { 530 .name = MV64XXX_I2C_CTLR_NAME, 531 .id = 1, 532 .dev = { 533 .platform_data = &orion_i2c_1_pdata, 534 }, 535}; 536 537void __init orion_i2c_init(unsigned long mapbase, 538 unsigned long irq, 539 unsigned long freq_m) 540{ 541 orion_i2c_pdata.freq_m = freq_m; 542 fill_resources(&orion_i2c, orion_i2c_resources, mapbase, 543 SZ_32 - 1, irq); 544 platform_device_register(&orion_i2c); 545} 546 547void __init orion_i2c_1_init(unsigned long mapbase, 548 unsigned long irq, 549 unsigned long freq_m) 550{ 551 orion_i2c_1_pdata.freq_m = freq_m; 552 fill_resources(&orion_i2c_1, orion_i2c_1_resources, mapbase, 553 SZ_32 - 1, irq); 554 platform_device_register(&orion_i2c_1); 555} 556 557/***************************************************************************** 558 * SPI 559 ****************************************************************************/ 560static struct resource orion_spi_resources; 561 562static struct platform_device orion_spi = { 563 .name = "orion_spi", 564 .id = 0, 565}; 566 567static struct resource orion_spi_1_resources; 568 569static struct platform_device orion_spi_1 = { 570 .name = "orion_spi", 571 .id = 1, 572}; 573 574/* Note: The SPI silicon core does have interrupts. However the 575 * current Linux software driver does not use interrupts. */ 576 577void __init orion_spi_init(unsigned long mapbase) 578{ 579 fill_resources(&orion_spi, &orion_spi_resources, 580 mapbase, SZ_512 - 1, NO_IRQ); 581 platform_device_register(&orion_spi); 582} 583 584void __init orion_spi_1_init(unsigned long mapbase) 585{ 586 fill_resources(&orion_spi_1, &orion_spi_1_resources, 587 mapbase, SZ_512 - 1, NO_IRQ); 588 platform_device_register(&orion_spi_1); 589} 590 591/***************************************************************************** 592 * Watchdog 593 ****************************************************************************/ 594static struct resource orion_wdt_resource[] = { 595 DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04), 596 DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04), 597}; 598 599static struct platform_device orion_wdt_device = { 600 .name = "orion_wdt", 601 .id = -1, 602 .num_resources = ARRAY_SIZE(orion_wdt_resource), 603 .resource = orion_wdt_resource, 604}; 605 606void __init orion_wdt_init(void) 607{ 608 platform_device_register(&orion_wdt_device); 609} 610 611/***************************************************************************** 612 * XOR 613 ****************************************************************************/ 614static u64 orion_xor_dmamask = DMA_BIT_MASK(32); 615 616/***************************************************************************** 617 * XOR0 618 ****************************************************************************/ 619static struct resource orion_xor0_shared_resources[] = { 620 { 621 .name = "xor 0 low", 622 .flags = IORESOURCE_MEM, 623 }, { 624 .name = "xor 0 high", 625 .flags = IORESOURCE_MEM, 626 }, { 627 .name = "irq channel 0", 628 .flags = IORESOURCE_IRQ, 629 }, { 630 .name = "irq channel 1", 631 .flags = IORESOURCE_IRQ, 632 }, 633}; 634 635static struct mv_xor_channel_data orion_xor0_channels_data[2]; 636 637static struct mv_xor_platform_data orion_xor0_pdata = { 638 .channels = orion_xor0_channels_data, 639}; 640 641static struct platform_device orion_xor0_shared = { 642 .name = MV_XOR_NAME, 643 .id = 0, 644 .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), 645 .resource = orion_xor0_shared_resources, 646 .dev = { 647 .dma_mask = &orion_xor_dmamask, 648 .coherent_dma_mask = DMA_BIT_MASK(64), 649 .platform_data = &orion_xor0_pdata, 650 }, 651}; 652 653void __init orion_xor0_init(unsigned long mapbase_low, 654 unsigned long mapbase_high, 655 unsigned long irq_0, 656 unsigned long irq_1) 657{ 658 orion_xor0_shared_resources[0].start = mapbase_low; 659 orion_xor0_shared_resources[0].end = mapbase_low + 0xff; 660 orion_xor0_shared_resources[1].start = mapbase_high; 661 orion_xor0_shared_resources[1].end = mapbase_high + 0xff; 662 663 orion_xor0_shared_resources[2].start = irq_0; 664 orion_xor0_shared_resources[2].end = irq_0; 665 orion_xor0_shared_resources[3].start = irq_1; 666 orion_xor0_shared_resources[3].end = irq_1; 667 668 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask); 669 dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask); 670 671 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask); 672 dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask); 673 674 platform_device_register(&orion_xor0_shared); 675} 676 677/***************************************************************************** 678 * XOR1 679 ****************************************************************************/ 680static struct resource orion_xor1_shared_resources[] = { 681 { 682 .name = "xor 1 low", 683 .flags = IORESOURCE_MEM, 684 }, { 685 .name = "xor 1 high", 686 .flags = IORESOURCE_MEM, 687 }, { 688 .name = "irq channel 0", 689 .flags = IORESOURCE_IRQ, 690 }, { 691 .name = "irq channel 1", 692 .flags = IORESOURCE_IRQ, 693 }, 694}; 695 696static struct mv_xor_channel_data orion_xor1_channels_data[2]; 697 698static struct mv_xor_platform_data orion_xor1_pdata = { 699 .channels = orion_xor1_channels_data, 700}; 701 702static struct platform_device orion_xor1_shared = { 703 .name = MV_XOR_NAME, 704 .id = 1, 705 .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), 706 .resource = orion_xor1_shared_resources, 707 .dev = { 708 .dma_mask = &orion_xor_dmamask, 709 .coherent_dma_mask = DMA_BIT_MASK(64), 710 .platform_data = &orion_xor1_pdata, 711 }, 712}; 713 714void __init orion_xor1_init(unsigned long mapbase_low, 715 unsigned long mapbase_high, 716 unsigned long irq_0, 717 unsigned long irq_1) 718{ 719 orion_xor1_shared_resources[0].start = mapbase_low; 720 orion_xor1_shared_resources[0].end = mapbase_low + 0xff; 721 orion_xor1_shared_resources[1].start = mapbase_high; 722 orion_xor1_shared_resources[1].end = mapbase_high + 0xff; 723 724 orion_xor1_shared_resources[2].start = irq_0; 725 orion_xor1_shared_resources[2].end = irq_0; 726 orion_xor1_shared_resources[3].start = irq_1; 727 orion_xor1_shared_resources[3].end = irq_1; 728 729 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask); 730 dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask); 731 732 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask); 733 dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask); 734 735 platform_device_register(&orion_xor1_shared); 736} 737 738/***************************************************************************** 739 * EHCI 740 ****************************************************************************/ 741static struct orion_ehci_data orion_ehci_data; 742static u64 ehci_dmamask = DMA_BIT_MASK(32); 743 744 745/***************************************************************************** 746 * EHCI0 747 ****************************************************************************/ 748static struct resource orion_ehci_resources[2]; 749 750static struct platform_device orion_ehci = { 751 .name = "orion-ehci", 752 .id = 0, 753 .dev = { 754 .dma_mask = &ehci_dmamask, 755 .coherent_dma_mask = DMA_BIT_MASK(32), 756 .platform_data = &orion_ehci_data, 757 }, 758}; 759 760void __init orion_ehci_init(unsigned long mapbase, 761 unsigned long irq, 762 enum orion_ehci_phy_ver phy_version) 763{ 764 orion_ehci_data.phy_version = phy_version; 765 fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, 766 irq); 767 768 platform_device_register(&orion_ehci); 769} 770 771/***************************************************************************** 772 * EHCI1 773 ****************************************************************************/ 774static struct resource orion_ehci_1_resources[2]; 775 776static struct platform_device orion_ehci_1 = { 777 .name = "orion-ehci", 778 .id = 1, 779 .dev = { 780 .dma_mask = &ehci_dmamask, 781 .coherent_dma_mask = DMA_BIT_MASK(32), 782 .platform_data = &orion_ehci_data, 783 }, 784}; 785 786void __init orion_ehci_1_init(unsigned long mapbase, 787 unsigned long irq) 788{ 789 fill_resources(&orion_ehci_1, orion_ehci_1_resources, 790 mapbase, SZ_4K - 1, irq); 791 792 platform_device_register(&orion_ehci_1); 793} 794 795/***************************************************************************** 796 * EHCI2 797 ****************************************************************************/ 798static struct resource orion_ehci_2_resources[2]; 799 800static struct platform_device orion_ehci_2 = { 801 .name = "orion-ehci", 802 .id = 2, 803 .dev = { 804 .dma_mask = &ehci_dmamask, 805 .coherent_dma_mask = DMA_BIT_MASK(32), 806 .platform_data = &orion_ehci_data, 807 }, 808}; 809 810void __init orion_ehci_2_init(unsigned long mapbase, 811 unsigned long irq) 812{ 813 fill_resources(&orion_ehci_2, orion_ehci_2_resources, 814 mapbase, SZ_4K - 1, irq); 815 816 platform_device_register(&orion_ehci_2); 817} 818 819/***************************************************************************** 820 * SATA 821 ****************************************************************************/ 822static struct resource orion_sata_resources[2] = { 823 { 824 .name = "sata base", 825 }, { 826 .name = "sata irq", 827 }, 828}; 829 830static struct platform_device orion_sata = { 831 .name = "sata_mv", 832 .id = 0, 833 .dev = { 834 .coherent_dma_mask = DMA_BIT_MASK(32), 835 }, 836}; 837 838void __init orion_sata_init(struct mv_sata_platform_data *sata_data, 839 unsigned long mapbase, 840 unsigned long irq) 841{ 842 orion_sata.dev.platform_data = sata_data; 843 fill_resources(&orion_sata, orion_sata_resources, 844 mapbase, 0x5000 - 1, irq); 845 846 platform_device_register(&orion_sata); 847} 848 849/***************************************************************************** 850 * Cryptographic Engines and Security Accelerator (CESA) 851 ****************************************************************************/ 852static struct resource orion_crypto_resources[] = { 853 { 854 .name = "regs", 855 }, { 856 .name = "crypto interrupt", 857 }, { 858 .name = "sram", 859 .flags = IORESOURCE_MEM, 860 }, 861}; 862 863static struct platform_device orion_crypto = { 864 .name = "mv_crypto", 865 .id = -1, 866}; 867 868void __init orion_crypto_init(unsigned long mapbase, 869 unsigned long srambase, 870 unsigned long sram_size, 871 unsigned long irq) 872{ 873 fill_resources(&orion_crypto, orion_crypto_resources, 874 mapbase, 0xffff, irq); 875 orion_crypto.num_resources = 3; 876 orion_crypto_resources[2].start = srambase; 877 orion_crypto_resources[2].end = srambase + sram_size - 1; 878 879 platform_device_register(&orion_crypto); 880} 881