1/*
2 * linux/arch/arm/mach-sa1100/neponset.c
3 */
4#include <linux/err.h>
5#include <linux/init.h>
6#include <linux/ioport.h>
7#include <linux/irq.h>
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/platform_data/sa11x0-serial.h>
11#include <linux/platform_device.h>
12#include <linux/pm.h>
13#include <linux/serial_core.h>
14#include <linux/slab.h>
15#include <linux/smc91x.h>
16
17#include <asm/mach-types.h>
18#include <asm/mach/map.h>
19#include <asm/hardware/sa1111.h>
20#include <asm/sizes.h>
21
22#include <mach/hardware.h>
23#include <mach/assabet.h>
24#include <mach/neponset.h>
25#include <mach/irqs.h>
26
27#define NEP_IRQ_SMC91X	0
28#define NEP_IRQ_USAR	1
29#define NEP_IRQ_SA1111	2
30#define NEP_IRQ_NR	3
31
32#define WHOAMI		0x00
33#define LEDS		0x10
34#define SWPK		0x20
35#define IRR		0x24
36#define KP_Y_IN		0x80
37#define KP_X_OUT	0x90
38#define NCR_0		0xa0
39#define MDM_CTL_0	0xb0
40#define MDM_CTL_1	0xb4
41#define AUD_CTL		0xc0
42
43#define IRR_ETHERNET	(1 << 0)
44#define IRR_USAR	(1 << 1)
45#define IRR_SA1111	(1 << 2)
46
47#define MDM_CTL0_RTS1	(1 << 0)
48#define MDM_CTL0_DTR1	(1 << 1)
49#define MDM_CTL0_RTS2	(1 << 2)
50#define MDM_CTL0_DTR2	(1 << 3)
51
52#define MDM_CTL1_CTS1	(1 << 0)
53#define MDM_CTL1_DSR1	(1 << 1)
54#define MDM_CTL1_DCD1	(1 << 2)
55#define MDM_CTL1_CTS2	(1 << 3)
56#define MDM_CTL1_DSR2	(1 << 4)
57#define MDM_CTL1_DCD2	(1 << 5)
58
59#define AUD_SEL_1341	(1 << 0)
60#define AUD_MUTE_1341	(1 << 1)
61
62extern void sa1110_mb_disable(void);
63
64struct neponset_drvdata {
65	void __iomem *base;
66	struct platform_device *sa1111;
67	struct platform_device *smc91x;
68	unsigned irq_base;
69#ifdef CONFIG_PM_SLEEP
70	u32 ncr0;
71	u32 mdm_ctl_0;
72#endif
73};
74
75static void __iomem *nep_base;
76
77void neponset_ncr_frob(unsigned int mask, unsigned int val)
78{
79	void __iomem *base = nep_base;
80
81	if (base) {
82		unsigned long flags;
83		unsigned v;
84
85		local_irq_save(flags);
86		v = readb_relaxed(base + NCR_0);
87		writeb_relaxed((v & ~mask) | val, base + NCR_0);
88		local_irq_restore(flags);
89	} else {
90		WARN(1, "nep_base unset\n");
91	}
92}
93EXPORT_SYMBOL(neponset_ncr_frob);
94
95static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
96{
97	void __iomem *base = nep_base;
98	u_int mdm_ctl0;
99
100	if (!base)
101		return;
102
103	mdm_ctl0 = readb_relaxed(base + MDM_CTL_0);
104	if (port->mapbase == _Ser1UTCR0) {
105		if (mctrl & TIOCM_RTS)
106			mdm_ctl0 &= ~MDM_CTL0_RTS2;
107		else
108			mdm_ctl0 |= MDM_CTL0_RTS2;
109
110		if (mctrl & TIOCM_DTR)
111			mdm_ctl0 &= ~MDM_CTL0_DTR2;
112		else
113			mdm_ctl0 |= MDM_CTL0_DTR2;
114	} else if (port->mapbase == _Ser3UTCR0) {
115		if (mctrl & TIOCM_RTS)
116			mdm_ctl0 &= ~MDM_CTL0_RTS1;
117		else
118			mdm_ctl0 |= MDM_CTL0_RTS1;
119
120		if (mctrl & TIOCM_DTR)
121			mdm_ctl0 &= ~MDM_CTL0_DTR1;
122		else
123			mdm_ctl0 |= MDM_CTL0_DTR1;
124	}
125
126	writeb_relaxed(mdm_ctl0, base + MDM_CTL_0);
127}
128
129static u_int neponset_get_mctrl(struct uart_port *port)
130{
131	void __iomem *base = nep_base;
132	u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
133	u_int mdm_ctl1;
134
135	if (!base)
136		return ret;
137
138	mdm_ctl1 = readb_relaxed(base + MDM_CTL_1);
139	if (port->mapbase == _Ser1UTCR0) {
140		if (mdm_ctl1 & MDM_CTL1_DCD2)
141			ret &= ~TIOCM_CD;
142		if (mdm_ctl1 & MDM_CTL1_CTS2)
143			ret &= ~TIOCM_CTS;
144		if (mdm_ctl1 & MDM_CTL1_DSR2)
145			ret &= ~TIOCM_DSR;
146	} else if (port->mapbase == _Ser3UTCR0) {
147		if (mdm_ctl1 & MDM_CTL1_DCD1)
148			ret &= ~TIOCM_CD;
149		if (mdm_ctl1 & MDM_CTL1_CTS1)
150			ret &= ~TIOCM_CTS;
151		if (mdm_ctl1 & MDM_CTL1_DSR1)
152			ret &= ~TIOCM_DSR;
153	}
154
155	return ret;
156}
157
158static struct sa1100_port_fns neponset_port_fns = {
159	.set_mctrl	= neponset_set_mctrl,
160	.get_mctrl	= neponset_get_mctrl,
161};
162
163/*
164 * Install handler for Neponset IRQ.  Note that we have to loop here
165 * since the ETHERNET and USAR IRQs are level based, and we need to
166 * ensure that the IRQ signal is deasserted before returning.  This
167 * is rather unfortunate.
168 */
169static void neponset_irq_handler(struct irq_desc *desc)
170{
171	struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
172	unsigned int irr;
173
174	while (1) {
175		/*
176		 * Acknowledge the parent IRQ.
177		 */
178		desc->irq_data.chip->irq_ack(&desc->irq_data);
179
180		/*
181		 * Read the interrupt reason register.  Let's have all
182		 * active IRQ bits high.  Note: there is a typo in the
183		 * Neponset user's guide for the SA1111 IRR level.
184		 */
185		irr = readb_relaxed(d->base + IRR);
186		irr ^= IRR_ETHERNET | IRR_USAR;
187
188		if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
189			break;
190
191		/*
192		 * Since there is no individual mask, we have to
193		 * mask the parent IRQ.  This is safe, since we'll
194		 * recheck the register for any pending IRQs.
195		 */
196		if (irr & (IRR_ETHERNET | IRR_USAR)) {
197			desc->irq_data.chip->irq_mask(&desc->irq_data);
198
199			/*
200			 * Ack the interrupt now to prevent re-entering
201			 * this neponset handler.  Again, this is safe
202			 * since we'll check the IRR register prior to
203			 * leaving.
204			 */
205			desc->irq_data.chip->irq_ack(&desc->irq_data);
206
207			if (irr & IRR_ETHERNET)
208				generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X);
209
210			if (irr & IRR_USAR)
211				generic_handle_irq(d->irq_base + NEP_IRQ_USAR);
212
213			desc->irq_data.chip->irq_unmask(&desc->irq_data);
214		}
215
216		if (irr & IRR_SA1111)
217			generic_handle_irq(d->irq_base + NEP_IRQ_SA1111);
218	}
219}
220
221/* Yes, we really do not have any kind of masking or unmasking */
222static void nochip_noop(struct irq_data *irq)
223{
224}
225
226static struct irq_chip nochip = {
227	.name = "neponset",
228	.irq_ack = nochip_noop,
229	.irq_mask = nochip_noop,
230	.irq_unmask = nochip_noop,
231};
232
233static struct sa1111_platform_data sa1111_info = {
234	.disable_devs	= SA1111_DEVID_PS2_MSE,
235};
236
237static int neponset_probe(struct platform_device *dev)
238{
239	struct neponset_drvdata *d;
240	struct resource *nep_res, *sa1111_res, *smc91x_res;
241	struct resource sa1111_resources[] = {
242		DEFINE_RES_MEM(0x40000000, SZ_8K),
243		{ .flags = IORESOURCE_IRQ },
244	};
245	struct platform_device_info sa1111_devinfo = {
246		.parent = &dev->dev,
247		.name = "sa1111",
248		.id = 0,
249		.res = sa1111_resources,
250		.num_res = ARRAY_SIZE(sa1111_resources),
251		.data = &sa1111_info,
252		.size_data = sizeof(sa1111_info),
253		.dma_mask = 0xffffffffUL,
254	};
255	struct resource smc91x_resources[] = {
256		DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS,
257			0x02000000, "smc91x-regs"),
258		DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
259			0x02000000, "smc91x-attrib"),
260		{ .flags = IORESOURCE_IRQ },
261	};
262	struct smc91x_platdata smc91x_platdata = {
263		.flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT,
264	};
265	struct platform_device_info smc91x_devinfo = {
266		.parent = &dev->dev,
267		.name = "smc91x",
268		.id = 0,
269		.res = smc91x_resources,
270		.num_res = ARRAY_SIZE(smc91x_resources),
271		.data = &smc91x_platdata,
272		.size_data = sizeof(smc91x_platdata),
273	};
274	int ret, irq;
275
276	if (nep_base)
277		return -EBUSY;
278
279	irq = ret = platform_get_irq(dev, 0);
280	if (ret < 0)
281		goto err_alloc;
282
283	nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
284	smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
285	sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2);
286	if (!nep_res || !smc91x_res || !sa1111_res) {
287		ret = -ENXIO;
288		goto err_alloc;
289	}
290
291	d = kzalloc(sizeof(*d), GFP_KERNEL);
292	if (!d) {
293		ret = -ENOMEM;
294		goto err_alloc;
295	}
296
297	d->base = ioremap(nep_res->start, SZ_4K);
298	if (!d->base) {
299		ret = -ENOMEM;
300		goto err_ioremap;
301	}
302
303	if (readb_relaxed(d->base + WHOAMI) != 0x11) {
304		dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n",
305			 readb_relaxed(d->base + WHOAMI));
306		ret = -ENODEV;
307		goto err_id;
308	}
309
310	ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1);
311	if (ret <= 0) {
312		dev_err(&dev->dev, "unable to allocate %u irqs: %d\n",
313			NEP_IRQ_NR, ret);
314		if (ret == 0)
315			ret = -ENOMEM;
316		goto err_irq_alloc;
317	}
318
319	d->irq_base = ret;
320
321	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
322		handle_simple_irq);
323	irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST | IRQ_NOPROBE);
324	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
325		handle_simple_irq);
326	irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST | IRQ_NOPROBE);
327	irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);
328
329	irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
330	irq_set_chained_handler_and_data(irq, neponset_irq_handler, d);
331
332	/*
333	 * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
334	 * something on the Neponset activates this IRQ on sleep (eth?)
335	 */
336#if 0
337	enable_irq_wake(irq);
338#endif
339
340	dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
341		 d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
342	nep_base = d->base;
343
344	sa1100_register_uart_fns(&neponset_port_fns);
345
346	/* Ensure that the memory bus request/grant signals are setup */
347	sa1110_mb_disable();
348
349	/* Disable GPIO 0/1 drivers so the buttons work on the Assabet */
350	writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0);
351
352	sa1111_resources[0].parent = sa1111_res;
353	sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111;
354	sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111;
355	d->sa1111 = platform_device_register_full(&sa1111_devinfo);
356
357	smc91x_resources[0].parent = smc91x_res;
358	smc91x_resources[1].parent = smc91x_res;
359	smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X;
360	smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X;
361	d->smc91x = platform_device_register_full(&smc91x_devinfo);
362
363	platform_set_drvdata(dev, d);
364
365	return 0;
366
367 err_irq_alloc:
368 err_id:
369	iounmap(d->base);
370 err_ioremap:
371	kfree(d);
372 err_alloc:
373	return ret;
374}
375
376static int neponset_remove(struct platform_device *dev)
377{
378	struct neponset_drvdata *d = platform_get_drvdata(dev);
379	int irq = platform_get_irq(dev, 0);
380
381	if (!IS_ERR(d->sa1111))
382		platform_device_unregister(d->sa1111);
383	if (!IS_ERR(d->smc91x))
384		platform_device_unregister(d->smc91x);
385	irq_set_chained_handler(irq, NULL);
386	irq_free_descs(d->irq_base, NEP_IRQ_NR);
387	nep_base = NULL;
388	iounmap(d->base);
389	kfree(d);
390
391	return 0;
392}
393
394#ifdef CONFIG_PM_SLEEP
395static int neponset_suspend(struct device *dev)
396{
397	struct neponset_drvdata *d = dev_get_drvdata(dev);
398
399	d->ncr0 = readb_relaxed(d->base + NCR_0);
400	d->mdm_ctl_0 = readb_relaxed(d->base + MDM_CTL_0);
401
402	return 0;
403}
404
405static int neponset_resume(struct device *dev)
406{
407	struct neponset_drvdata *d = dev_get_drvdata(dev);
408
409	writeb_relaxed(d->ncr0, d->base + NCR_0);
410	writeb_relaxed(d->mdm_ctl_0, d->base + MDM_CTL_0);
411
412	return 0;
413}
414
415static const struct dev_pm_ops neponset_pm_ops = {
416	.suspend_noirq = neponset_suspend,
417	.resume_noirq = neponset_resume,
418	.freeze_noirq = neponset_suspend,
419	.restore_noirq = neponset_resume,
420};
421#define PM_OPS &neponset_pm_ops
422#else
423#define PM_OPS NULL
424#endif
425
426static struct platform_driver neponset_device_driver = {
427	.probe		= neponset_probe,
428	.remove		= neponset_remove,
429	.driver		= {
430		.name	= "neponset",
431		.pm	= PM_OPS,
432	},
433};
434
435static int __init neponset_init(void)
436{
437	return platform_driver_register(&neponset_device_driver);
438}
439
440subsys_initcall(neponset_init);
441