1/* 2 * linux/arch/arm/mach-pxa/viper.c 3 * 4 * Support for the Arcom VIPER SBC. 5 * 6 * Author: Ian Campbell 7 * Created: Feb 03, 2003 8 * Copyright: Arcom Control Systems 9 * 10 * Maintained by Marc Zyngier <maz@misterjones.org> 11 * <marc.zyngier@altran.com> 12 * 13 * Based on lubbock.c: 14 * Author: Nicolas Pitre 15 * Created: Jun 15, 2001 16 * Copyright: MontaVista Software Inc. 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License version 2 as 20 * published by the Free Software Foundation. 21 */ 22 23#include <linux/types.h> 24#include <linux/memory.h> 25#include <linux/cpu.h> 26#include <linux/cpufreq.h> 27#include <linux/delay.h> 28#include <linux/fs.h> 29#include <linux/init.h> 30#include <linux/slab.h> 31#include <linux/interrupt.h> 32#include <linux/major.h> 33#include <linux/module.h> 34#include <linux/pm.h> 35#include <linux/sched.h> 36#include <linux/gpio.h> 37#include <linux/jiffies.h> 38#include <linux/i2c-gpio.h> 39#include <linux/i2c/pxa-i2c.h> 40#include <linux/serial_8250.h> 41#include <linux/smc91x.h> 42#include <linux/pwm.h> 43#include <linux/pwm_backlight.h> 44#include <linux/usb/isp116x.h> 45#include <linux/mtd/mtd.h> 46#include <linux/mtd/partitions.h> 47#include <linux/mtd/physmap.h> 48#include <linux/syscore_ops.h> 49 50#include <mach/pxa25x.h> 51#include <mach/audio.h> 52#include <linux/platform_data/video-pxafb.h> 53#include <mach/regs-uart.h> 54#include <linux/platform_data/pcmcia-pxa2xx_viper.h> 55#include <mach/viper.h> 56 57#include <asm/setup.h> 58#include <asm/mach-types.h> 59#include <asm/irq.h> 60#include <asm/sizes.h> 61#include <asm/system_info.h> 62 63#include <asm/mach/arch.h> 64#include <asm/mach/map.h> 65#include <asm/mach/irq.h> 66 67#include "generic.h" 68#include "devices.h" 69 70static unsigned int icr; 71 72static void viper_icr_set_bit(unsigned int bit) 73{ 74 icr |= bit; 75 VIPER_ICR = icr; 76} 77 78static void viper_icr_clear_bit(unsigned int bit) 79{ 80 icr &= ~bit; 81 VIPER_ICR = icr; 82} 83 84/* This function is used from the pcmcia module to reset the CF */ 85static void viper_cf_reset(int state) 86{ 87 if (state) 88 viper_icr_set_bit(VIPER_ICR_CF_RST); 89 else 90 viper_icr_clear_bit(VIPER_ICR_CF_RST); 91} 92 93static struct arcom_pcmcia_pdata viper_pcmcia_info = { 94 .cd_gpio = VIPER_CF_CD_GPIO, 95 .rdy_gpio = VIPER_CF_RDY_GPIO, 96 .pwr_gpio = VIPER_CF_POWER_GPIO, 97 .reset = viper_cf_reset, 98}; 99 100static struct platform_device viper_pcmcia_device = { 101 .name = "viper-pcmcia", 102 .id = -1, 103 .dev = { 104 .platform_data = &viper_pcmcia_info, 105 }, 106}; 107 108/* 109 * The CPLD version register was not present on VIPER boards prior to 110 * v2i1. On v1 boards where the version register is not present we 111 * will just read back the previous value from the databus. 112 * 113 * Therefore we do two reads. The first time we write 0 to the 114 * (read-only) register before reading and the second time we write 115 * 0xff first. If the two reads do not match or they read back as 0xff 116 * or 0x00 then we have version 1 hardware. 117 */ 118static u8 viper_hw_version(void) 119{ 120 u8 v1, v2; 121 unsigned long flags; 122 123 local_irq_save(flags); 124 125 VIPER_VERSION = 0; 126 v1 = VIPER_VERSION; 127 VIPER_VERSION = 0xff; 128 v2 = VIPER_VERSION; 129 130 v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1; 131 132 local_irq_restore(flags); 133 return v1; 134} 135 136/* CPU system core operations. */ 137static int viper_cpu_suspend(void) 138{ 139 viper_icr_set_bit(VIPER_ICR_R_DIS); 140 return 0; 141} 142 143static void viper_cpu_resume(void) 144{ 145 viper_icr_clear_bit(VIPER_ICR_R_DIS); 146} 147 148static struct syscore_ops viper_cpu_syscore_ops = { 149 .suspend = viper_cpu_suspend, 150 .resume = viper_cpu_resume, 151}; 152 153static unsigned int current_voltage_divisor; 154 155/* 156 * If force is not true then step from existing to new divisor. If 157 * force is true then jump straight to the new divisor. Stepping is 158 * used because if the jump in voltage is too large, the VCC can dip 159 * too low and the regulator cuts out. 160 * 161 * force can be used to initialize the divisor to a know state by 162 * setting the value for the current clock speed, since we are already 163 * running at that speed we know the voltage should be pretty close so 164 * the jump won't be too large 165 */ 166static void viper_set_core_cpu_voltage(unsigned long khz, int force) 167{ 168 int i = 0; 169 unsigned int divisor = 0; 170 const char *v; 171 172 if (khz < 200000) { 173 v = "1.0"; divisor = 0xfff; 174 } else if (khz < 300000) { 175 v = "1.1"; divisor = 0xde5; 176 } else { 177 v = "1.3"; divisor = 0x325; 178 } 179 180 pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n", 181 v, (int)khz / 1000, (int)khz % 1000); 182 183#define STEP 0x100 184 do { 185 int step; 186 187 if (force) 188 step = divisor; 189 else if (current_voltage_divisor < divisor - STEP) 190 step = current_voltage_divisor + STEP; 191 else if (current_voltage_divisor > divisor + STEP) 192 step = current_voltage_divisor - STEP; 193 else 194 step = divisor; 195 force = 0; 196 197 gpio_set_value(VIPER_PSU_CLK_GPIO, 0); 198 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); 199 200 for (i = 1 << 11 ; i > 0 ; i >>= 1) { 201 udelay(1); 202 203 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i); 204 udelay(1); 205 206 gpio_set_value(VIPER_PSU_CLK_GPIO, 1); 207 udelay(1); 208 209 gpio_set_value(VIPER_PSU_CLK_GPIO, 0); 210 } 211 udelay(1); 212 213 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1); 214 udelay(1); 215 216 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0); 217 218 current_voltage_divisor = step; 219 } while (current_voltage_divisor != divisor); 220} 221 222/* Interrupt handling */ 223static unsigned long viper_irq_enabled_mask; 224static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 }; 225static const int viper_isa_irq_map[] = { 226 0, /* ISA irq #0, invalid */ 227 0, /* ISA irq #1, invalid */ 228 0, /* ISA irq #2, invalid */ 229 1 << 0, /* ISA irq #3 */ 230 1 << 1, /* ISA irq #4 */ 231 1 << 2, /* ISA irq #5 */ 232 1 << 3, /* ISA irq #6 */ 233 1 << 4, /* ISA irq #7 */ 234 0, /* ISA irq #8, invalid */ 235 1 << 8, /* ISA irq #9 */ 236 1 << 5, /* ISA irq #10 */ 237 1 << 6, /* ISA irq #11 */ 238 1 << 7, /* ISA irq #12 */ 239 0, /* ISA irq #13, invalid */ 240 1 << 9, /* ISA irq #14 */ 241 1 << 10, /* ISA irq #15 */ 242}; 243 244static inline int viper_irq_to_bitmask(unsigned int irq) 245{ 246 return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)]; 247} 248 249static inline int viper_bit_to_irq(int bit) 250{ 251 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); 252} 253 254static void viper_ack_irq(struct irq_data *d) 255{ 256 int viper_irq = viper_irq_to_bitmask(d->irq); 257 258 if (viper_irq & 0xff) 259 VIPER_LO_IRQ_STATUS = viper_irq; 260 else 261 VIPER_HI_IRQ_STATUS = (viper_irq >> 8); 262} 263 264static void viper_mask_irq(struct irq_data *d) 265{ 266 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq)); 267} 268 269static void viper_unmask_irq(struct irq_data *d) 270{ 271 viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq); 272} 273 274static inline unsigned long viper_irq_pending(void) 275{ 276 return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) & 277 viper_irq_enabled_mask; 278} 279 280static void viper_irq_handler(struct irq_desc *desc) 281{ 282 unsigned int irq; 283 unsigned long pending; 284 285 pending = viper_irq_pending(); 286 do { 287 /* we're in a chained irq handler, 288 * so ack the interrupt by hand */ 289 desc->irq_data.chip->irq_ack(&desc->irq_data); 290 291 if (likely(pending)) { 292 irq = viper_bit_to_irq(__ffs(pending)); 293 generic_handle_irq(irq); 294 } 295 pending = viper_irq_pending(); 296 } while (pending); 297} 298 299static struct irq_chip viper_irq_chip = { 300 .name = "ISA", 301 .irq_ack = viper_ack_irq, 302 .irq_mask = viper_mask_irq, 303 .irq_unmask = viper_unmask_irq 304}; 305 306static void __init viper_init_irq(void) 307{ 308 int level; 309 int isa_irq; 310 311 pxa25x_init_irq(); 312 313 /* setup ISA IRQs */ 314 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { 315 isa_irq = viper_bit_to_irq(level); 316 irq_set_chip_and_handler(isa_irq, &viper_irq_chip, 317 handle_edge_irq); 318 irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE); 319 } 320 321 irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), 322 viper_irq_handler); 323 irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); 324} 325 326/* Flat Panel */ 327static struct pxafb_mode_info fb_mode_info[] = { 328 { 329 .pixclock = 157500, 330 331 .xres = 320, 332 .yres = 240, 333 334 .bpp = 16, 335 336 .hsync_len = 63, 337 .left_margin = 7, 338 .right_margin = 13, 339 340 .vsync_len = 20, 341 .upper_margin = 0, 342 .lower_margin = 0, 343 344 .sync = 0, 345 }, 346}; 347 348static struct pxafb_mach_info fb_info = { 349 .modes = fb_mode_info, 350 .num_modes = 1, 351 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, 352}; 353 354static struct pwm_lookup viper_pwm_lookup[] = { 355 PWM_LOOKUP("pxa25x-pwm.0", 0, "pwm-backlight.0", NULL, 1000000, 356 PWM_POLARITY_NORMAL), 357}; 358 359static int viper_backlight_init(struct device *dev) 360{ 361 int ret; 362 363 /* GPIO9 and 10 control FB backlight. Initialise to off */ 364 ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight"); 365 if (ret) 366 goto err_request_bckl; 367 368 ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD"); 369 if (ret) 370 goto err_request_lcd; 371 372 ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0); 373 if (ret) 374 goto err_dir; 375 376 ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0); 377 if (ret) 378 goto err_dir; 379 380 return 0; 381 382err_dir: 383 gpio_free(VIPER_LCD_EN_GPIO); 384err_request_lcd: 385 gpio_free(VIPER_BCKLIGHT_EN_GPIO); 386err_request_bckl: 387 dev_err(dev, "Failed to setup LCD GPIOs\n"); 388 389 return ret; 390} 391 392static int viper_backlight_notify(struct device *dev, int brightness) 393{ 394 gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness); 395 gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness); 396 397 return brightness; 398} 399 400static void viper_backlight_exit(struct device *dev) 401{ 402 gpio_free(VIPER_LCD_EN_GPIO); 403 gpio_free(VIPER_BCKLIGHT_EN_GPIO); 404} 405 406static struct platform_pwm_backlight_data viper_backlight_data = { 407 .max_brightness = 100, 408 .dft_brightness = 100, 409 .enable_gpio = -1, 410 .init = viper_backlight_init, 411 .notify = viper_backlight_notify, 412 .exit = viper_backlight_exit, 413}; 414 415static struct platform_device viper_backlight_device = { 416 .name = "pwm-backlight", 417 .dev = { 418 .parent = &pxa25x_device_pwm0.dev, 419 .platform_data = &viper_backlight_data, 420 }, 421}; 422 423/* Ethernet */ 424static struct resource smc91x_resources[] = { 425 [0] = { 426 .name = "smc91x-regs", 427 .start = VIPER_ETH_PHYS + 0x300, 428 .end = VIPER_ETH_PHYS + 0x30f, 429 .flags = IORESOURCE_MEM, 430 }, 431 [1] = { 432 .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), 433 .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), 434 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 435 }, 436 [2] = { 437 .name = "smc91x-data32", 438 .start = VIPER_ETH_DATA_PHYS, 439 .end = VIPER_ETH_DATA_PHYS + 3, 440 .flags = IORESOURCE_MEM, 441 }, 442}; 443 444static struct smc91x_platdata viper_smc91x_info = { 445 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 446 .leda = RPC_LED_100_10, 447 .ledb = RPC_LED_TX_RX, 448}; 449 450static struct platform_device smc91x_device = { 451 .name = "smc91x", 452 .id = -1, 453 .num_resources = ARRAY_SIZE(smc91x_resources), 454 .resource = smc91x_resources, 455 .dev = { 456 .platform_data = &viper_smc91x_info, 457 }, 458}; 459 460/* i2c */ 461static struct i2c_gpio_platform_data i2c_bus_data = { 462 .sda_pin = VIPER_RTC_I2C_SDA_GPIO, 463 .scl_pin = VIPER_RTC_I2C_SCL_GPIO, 464 .udelay = 10, 465 .timeout = HZ, 466}; 467 468static struct platform_device i2c_bus_device = { 469 .name = "i2c-gpio", 470 .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */ 471 .dev = { 472 .platform_data = &i2c_bus_data, 473 } 474}; 475 476static struct i2c_board_info __initdata viper_i2c_devices[] = { 477 { 478 I2C_BOARD_INFO("ds1338", 0x68), 479 }, 480}; 481 482/* 483 * Serial configuration: 484 * You can either have the standard PXA ports driven by the PXA driver, 485 * or all the ports (PXA + 16850) driven by the 8250 driver. 486 * Choose your poison. 487 */ 488 489static struct resource viper_serial_resources[] = { 490#ifndef CONFIG_SERIAL_PXA 491 { 492 .start = 0x40100000, 493 .end = 0x4010001f, 494 .flags = IORESOURCE_MEM, 495 }, 496 { 497 .start = 0x40200000, 498 .end = 0x4020001f, 499 .flags = IORESOURCE_MEM, 500 }, 501 { 502 .start = 0x40700000, 503 .end = 0x4070001f, 504 .flags = IORESOURCE_MEM, 505 }, 506 { 507 .start = VIPER_UARTA_PHYS, 508 .end = VIPER_UARTA_PHYS + 0xf, 509 .flags = IORESOURCE_MEM, 510 }, 511 { 512 .start = VIPER_UARTB_PHYS, 513 .end = VIPER_UARTB_PHYS + 0xf, 514 .flags = IORESOURCE_MEM, 515 }, 516#else 517 { 518 0, 519 }, 520#endif 521}; 522 523static struct plat_serial8250_port serial_platform_data[] = { 524#ifndef CONFIG_SERIAL_PXA 525 /* Internal UARTs */ 526 { 527 .membase = (void *)&FFUART, 528 .mapbase = __PREG(FFUART), 529 .irq = IRQ_FFUART, 530 .uartclk = 921600 * 16, 531 .regshift = 2, 532 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 533 .iotype = UPIO_MEM, 534 }, 535 { 536 .membase = (void *)&BTUART, 537 .mapbase = __PREG(BTUART), 538 .irq = IRQ_BTUART, 539 .uartclk = 921600 * 16, 540 .regshift = 2, 541 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 542 .iotype = UPIO_MEM, 543 }, 544 { 545 .membase = (void *)&STUART, 546 .mapbase = __PREG(STUART), 547 .irq = IRQ_STUART, 548 .uartclk = 921600 * 16, 549 .regshift = 2, 550 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 551 .iotype = UPIO_MEM, 552 }, 553 /* External UARTs */ 554 { 555 .mapbase = VIPER_UARTA_PHYS, 556 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO), 557 .irqflags = IRQF_TRIGGER_RISING, 558 .uartclk = 1843200, 559 .regshift = 1, 560 .iotype = UPIO_MEM, 561 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | 562 UPF_SKIP_TEST, 563 }, 564 { 565 .mapbase = VIPER_UARTB_PHYS, 566 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO), 567 .irqflags = IRQF_TRIGGER_RISING, 568 .uartclk = 1843200, 569 .regshift = 1, 570 .iotype = UPIO_MEM, 571 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | 572 UPF_SKIP_TEST, 573 }, 574#endif 575 { }, 576}; 577 578static struct platform_device serial_device = { 579 .name = "serial8250", 580 .id = 0, 581 .dev = { 582 .platform_data = serial_platform_data, 583 }, 584 .num_resources = ARRAY_SIZE(viper_serial_resources), 585 .resource = viper_serial_resources, 586}; 587 588/* USB */ 589static void isp116x_delay(struct device *dev, int delay) 590{ 591 ndelay(delay); 592} 593 594static struct resource isp116x_resources[] = { 595 [0] = { /* DATA */ 596 .start = VIPER_USB_PHYS + 0, 597 .end = VIPER_USB_PHYS + 1, 598 .flags = IORESOURCE_MEM, 599 }, 600 [1] = { /* ADDR */ 601 .start = VIPER_USB_PHYS + 2, 602 .end = VIPER_USB_PHYS + 3, 603 .flags = IORESOURCE_MEM, 604 }, 605 [2] = { 606 .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), 607 .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), 608 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 609 }, 610}; 611 612/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */ 613static struct isp116x_platform_data isp116x_platform_data = { 614 /* Enable internal resistors on downstream ports */ 615 .sel15Kres = 1, 616 /* On-chip overcurrent protection */ 617 .oc_enable = 1, 618 /* INT output polarity */ 619 .int_act_high = 1, 620 /* INT edge or level triggered */ 621 .int_edge_triggered = 0, 622 623 /* WAKEUP pin connected - NOT SUPPORTED */ 624 /* .remote_wakeup_connected = 0, */ 625 /* Wakeup by devices on usb bus enabled */ 626 .remote_wakeup_enable = 0, 627 .delay = isp116x_delay, 628}; 629 630static struct platform_device isp116x_device = { 631 .name = "isp116x-hcd", 632 .id = -1, 633 .num_resources = ARRAY_SIZE(isp116x_resources), 634 .resource = isp116x_resources, 635 .dev = { 636 .platform_data = &isp116x_platform_data, 637 }, 638 639}; 640 641/* MTD */ 642static struct resource mtd_resources[] = { 643 [0] = { /* RedBoot config + filesystem flash */ 644 .start = VIPER_FLASH_PHYS, 645 .end = VIPER_FLASH_PHYS + SZ_32M - 1, 646 .flags = IORESOURCE_MEM, 647 }, 648 [1] = { /* Boot flash */ 649 .start = VIPER_BOOT_PHYS, 650 .end = VIPER_BOOT_PHYS + SZ_1M - 1, 651 .flags = IORESOURCE_MEM, 652 }, 653 [2] = { /* 654 * SRAM size is actually 256KB, 8bits, with a sparse mapping 655 * (each byte is on a 16bit boundary). 656 */ 657 .start = _VIPER_SRAM_BASE, 658 .end = _VIPER_SRAM_BASE + SZ_512K - 1, 659 .flags = IORESOURCE_MEM, 660 }, 661}; 662 663static struct mtd_partition viper_boot_flash_partition = { 664 .name = "RedBoot", 665 .size = SZ_1M, 666 .offset = 0, 667 .mask_flags = MTD_WRITEABLE, /* force R/O */ 668}; 669 670static struct physmap_flash_data viper_flash_data[] = { 671 [0] = { 672 .width = 2, 673 .parts = NULL, 674 .nr_parts = 0, 675 }, 676 [1] = { 677 .width = 2, 678 .parts = &viper_boot_flash_partition, 679 .nr_parts = 1, 680 }, 681}; 682 683static struct platform_device viper_mtd_devices[] = { 684 [0] = { 685 .name = "physmap-flash", 686 .id = 0, 687 .dev = { 688 .platform_data = &viper_flash_data[0], 689 }, 690 .resource = &mtd_resources[0], 691 .num_resources = 1, 692 }, 693 [1] = { 694 .name = "physmap-flash", 695 .id = 1, 696 .dev = { 697 .platform_data = &viper_flash_data[1], 698 }, 699 .resource = &mtd_resources[1], 700 .num_resources = 1, 701 }, 702}; 703 704static struct platform_device *viper_devs[] __initdata = { 705 &smc91x_device, 706 &i2c_bus_device, 707 &serial_device, 708 &isp116x_device, 709 &viper_mtd_devices[0], 710 &viper_mtd_devices[1], 711 &viper_backlight_device, 712 &viper_pcmcia_device, 713}; 714 715static mfp_cfg_t viper_pin_config[] __initdata = { 716 /* Chip selects */ 717 GPIO15_nCS_1, 718 GPIO78_nCS_2, 719 GPIO79_nCS_3, 720 GPIO80_nCS_4, 721 GPIO33_nCS_5, 722 723 /* AC97 */ 724 GPIO28_AC97_BITCLK, 725 GPIO29_AC97_SDATA_IN_0, 726 GPIO30_AC97_SDATA_OUT, 727 GPIO31_AC97_SYNC, 728 729 /* FP Backlight */ 730 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */ 731 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */ 732 GPIO16_PWM0_OUT, 733 734 /* Ethernet PHY Ready */ 735 GPIO18_RDY, 736 737 /* Serial shutdown */ 738 GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */ 739 740 /* Compact-Flash / PC104 */ 741 GPIO48_nPOE, 742 GPIO49_nPWE, 743 GPIO50_nPIOR, 744 GPIO51_nPIOW, 745 GPIO52_nPCE_1, 746 GPIO53_nPCE_2, 747 GPIO54_nPSKTSEL, 748 GPIO55_nPREG, 749 GPIO56_nPWAIT, 750 GPIO57_nIOIS16, 751 GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */ 752 GPIO32_GPIO, /* VIPER_CF_CD_GPIO */ 753 GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */ 754 755 /* Integrated UPS control */ 756 GPIO20_GPIO, /* VIPER_UPS_GPIO */ 757 758 /* Vcc regulator control */ 759 GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */ 760 GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */ 761 GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */ 762 763 /* i2c busses */ 764 GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */ 765 GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */ 766 GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */ 767 GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */ 768 769 /* PC/104 Interrupt */ 770 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */ 771}; 772 773static unsigned long viper_tpm; 774 775static int __init viper_tpm_setup(char *str) 776{ 777 return kstrtoul(str, 10, &viper_tpm) >= 0; 778} 779 780__setup("tpm=", viper_tpm_setup); 781 782static void __init viper_tpm_init(void) 783{ 784 struct platform_device *tpm_device; 785 struct i2c_gpio_platform_data i2c_tpm_data = { 786 .sda_pin = VIPER_TPM_I2C_SDA_GPIO, 787 .scl_pin = VIPER_TPM_I2C_SCL_GPIO, 788 .udelay = 10, 789 .timeout = HZ, 790 }; 791 char *errstr; 792 793 /* Allocate TPM i2c bus if requested */ 794 if (!viper_tpm) 795 return; 796 797 tpm_device = platform_device_alloc("i2c-gpio", 2); 798 if (tpm_device) { 799 if (!platform_device_add_data(tpm_device, 800 &i2c_tpm_data, 801 sizeof(i2c_tpm_data))) { 802 if (platform_device_add(tpm_device)) { 803 errstr = "register TPM i2c bus"; 804 goto error_free_tpm; 805 } 806 } else { 807 errstr = "allocate TPM i2c bus data"; 808 goto error_free_tpm; 809 } 810 } else { 811 errstr = "allocate TPM i2c device"; 812 goto error_tpm; 813 } 814 815 return; 816 817error_free_tpm: 818 kfree(tpm_device); 819error_tpm: 820 pr_err("viper: Couldn't %s, giving up\n", errstr); 821} 822 823static void __init viper_init_vcore_gpios(void) 824{ 825 if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data")) 826 goto err_request_data; 827 828 if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock")) 829 goto err_request_clk; 830 831 if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs")) 832 goto err_request_cs; 833 834 if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) || 835 gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) || 836 gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0)) 837 goto err_dir; 838 839 /* c/should assume redboot set the correct level ??? */ 840 viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1); 841 842 return; 843 844err_dir: 845 gpio_free(VIPER_PSU_nCS_LD_GPIO); 846err_request_cs: 847 gpio_free(VIPER_PSU_CLK_GPIO); 848err_request_clk: 849 gpio_free(VIPER_PSU_DATA_GPIO); 850err_request_data: 851 pr_err("viper: Failed to setup vcore control GPIOs\n"); 852} 853 854static void __init viper_init_serial_gpio(void) 855{ 856 if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown")) 857 goto err_request; 858 859 if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0)) 860 goto err_dir; 861 862 return; 863 864err_dir: 865 gpio_free(VIPER_UART_SHDN_GPIO); 866err_request: 867 pr_err("viper: Failed to setup UART shutdown GPIO\n"); 868} 869 870#ifdef CONFIG_CPU_FREQ 871static int viper_cpufreq_notifier(struct notifier_block *nb, 872 unsigned long val, void *data) 873{ 874 struct cpufreq_freqs *freq = data; 875 876 /* TODO: Adjust timings??? */ 877 878 switch (val) { 879 case CPUFREQ_PRECHANGE: 880 if (freq->old < freq->new) { 881 /* we are getting faster so raise the voltage 882 * before we change freq */ 883 viper_set_core_cpu_voltage(freq->new, 0); 884 } 885 break; 886 case CPUFREQ_POSTCHANGE: 887 if (freq->old > freq->new) { 888 /* we are slowing down so drop the power 889 * after we change freq */ 890 viper_set_core_cpu_voltage(freq->new, 0); 891 } 892 break; 893 default: 894 /* ignore */ 895 break; 896 } 897 898 return 0; 899} 900 901static struct notifier_block viper_cpufreq_notifier_block = { 902 .notifier_call = viper_cpufreq_notifier 903}; 904 905static void __init viper_init_cpufreq(void) 906{ 907 if (cpufreq_register_notifier(&viper_cpufreq_notifier_block, 908 CPUFREQ_TRANSITION_NOTIFIER)) 909 pr_err("viper: Failed to setup cpufreq notifier\n"); 910} 911#else 912static inline void viper_init_cpufreq(void) {} 913#endif 914 915static void viper_power_off(void) 916{ 917 pr_notice("Shutting off UPS\n"); 918 gpio_set_value(VIPER_UPS_GPIO, 1); 919 /* Spin to death... */ 920 while (1); 921} 922 923static void __init viper_init(void) 924{ 925 u8 version; 926 927 pm_power_off = viper_power_off; 928 929 pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config)); 930 931 pxa_set_ffuart_info(NULL); 932 pxa_set_btuart_info(NULL); 933 pxa_set_stuart_info(NULL); 934 935 /* Wake-up serial console */ 936 viper_init_serial_gpio(); 937 938 pxa_set_fb_info(NULL, &fb_info); 939 940 /* v1 hardware cannot use the datacs line */ 941 version = viper_hw_version(); 942 if (version == 0) 943 smc91x_device.num_resources--; 944 945 pxa_set_i2c_info(NULL); 946 pwm_add_table(viper_pwm_lookup, ARRAY_SIZE(viper_pwm_lookup)); 947 platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs)); 948 949 viper_init_vcore_gpios(); 950 viper_init_cpufreq(); 951 952 register_syscore_ops(&viper_cpu_syscore_ops); 953 954 if (version) { 955 pr_info("viper: hardware v%di%d detected. " 956 "CPLD revision %d.\n", 957 VIPER_BOARD_VERSION(version), 958 VIPER_BOARD_ISSUE(version), 959 VIPER_CPLD_REVISION(version)); 960 system_rev = (VIPER_BOARD_VERSION(version) << 8) | 961 (VIPER_BOARD_ISSUE(version) << 4) | 962 VIPER_CPLD_REVISION(version); 963 } else { 964 pr_info("viper: No version register.\n"); 965 } 966 967 i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices)); 968 969 viper_tpm_init(); 970 pxa_set_ac97_info(NULL); 971} 972 973static struct map_desc viper_io_desc[] __initdata = { 974 { 975 .virtual = VIPER_CPLD_BASE, 976 .pfn = __phys_to_pfn(VIPER_CPLD_PHYS), 977 .length = 0x00300000, 978 .type = MT_DEVICE, 979 }, 980 { 981 .virtual = VIPER_PC104IO_BASE, 982 .pfn = __phys_to_pfn(0x30000000), 983 .length = 0x00800000, 984 .type = MT_DEVICE, 985 }, 986}; 987 988static void __init viper_map_io(void) 989{ 990 pxa25x_map_io(); 991 992 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc)); 993 994 PCFR |= PCFR_OPDE; 995} 996 997MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") 998 /* Maintainer: Marc Zyngier <maz@misterjones.org> */ 999 .atag_offset = 0x100, 1000 .map_io = viper_map_io, 1001 .nr_irqs = PXA_NR_IRQS, 1002 .init_irq = viper_init_irq, 1003 .handle_irq = pxa25x_handle_irq, 1004 .init_time = pxa_timer_init, 1005 .init_machine = viper_init, 1006 .restart = pxa_restart, 1007MACHINE_END 1008